1/**
2\defgroup cache_functions_m7 Cache Functions (Level-1)
3\brief Functions for level-1 instruction and data cache.
4\details
5Enhanced Cortex processors (like M7 and M55) include a memory system, which includes an optional
6Harvard level-1 data and instruction cache with ECC. The optional CPU cache has an instruction
7and data cache with sizes of \token{[0;4;8;16;32;64]KB}.
8Both instruction and data cache RAM can be configured at implementation time to have Error
9Correcting Code (ECC) to protect the data stored in the memory from errors.
10
11All cache maintenance operations are executed by writing to registers in the memory mapped
12System Control Space (SCS) region of the internal PPB memory space.
13
14\note
15After reset, you must invalidate each cache before enabling it.
16
17The functions are grouped for:
18 - \ref Icache_functions_m7
19 - \ref Dcache_functions_m7
20
21@{
22*/
23
24/**
25  \defgroup Icache_functions_m7 I-Cache Functions
26  \brief Functions for the level-1 instruction cache.
27  @{
28*/
29
30
31
32/**
33  \brief Enable I-Cache.
34
35  The function turns on the instruction cache.
36\note
37Before enabling the instruction cache, you must invalidate (\ref SCB_InvalidateICache) the entire instruction cache if
38external memory might have changed since the cache was disabled.
39\note
40After reset, you must invalidate (\ref SCB_InvalidateICache) each cache before enabling it.
41*/
42__STATIC_FORCEINLINE void SCB_EnableICache (void);
43
44
45/**
46  \brief Disable I-Cache.
47
48  The function turns off the instruction cache.
49
50*/
51__STATIC_FORCEINLINE void SCB_DisableICache (void);
52
53
54/**
55  \brief Invalidate I-Cache.
56
57  The function invalidates the instruction cache.
58  The instruction cache is never dirty so cache RAM errors are always recoverable by invalidating the cache and retrying the instruction.
59\note
60After reset, you must invalidate each cache before enabling (\ref SCB_EnableICache) it.
61
62*/
63__STATIC_FORCEINLINE void SCB_InvalidateICache (void);
64
65
66/**
67  \brief   I-Cache Invalidate by address
68  \details Invalidates I-Cache for the given address.
69           I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
70           I-Cache memory blocks which are part of given address + given size are invalidated.
71  \param[in]   addr    address
72  \param[in]   isize   size of memory block (in number of bytes)
73*/
74__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize);
75
76/**
77  @}  // close ICache functions
78*/
79
80/**
81  \defgroup Dcache_functions_m7 D-Cache Functions
82  \brief Functions for the level-1 data cache.
83
84  @{
85*/
86
87/**
88  \brief Enable D-Cache.
89
90  The function turns on the entire data cache.
91\note
92Before enabling the data cache, you must invalidate the entire data cache (\ref SCB_InvalidateDCache), because external
93memory might have changed from when the cache was disabled.
94
95\note
96After reset, you must invalidate (\ref SCB_InvalidateDCache) each cache before enabling it.
97*/
98__STATIC_FORCEINLINE void SCB_EnableDCache (void);
99
100
101/**
102  \brief Disable D-Cache.
103
104  The function turns off the entire data cache.
105
106\note
107When disabling the data cache, you must clean (\ref SCB_CleanDCache) the entire cache to ensure that any dirty data is
108flushed to external memory.
109
110*/
111__STATIC_FORCEINLINE void SCB_DisableDCache (void);
112
113
114/**
115  \brief Invalidate D-Cache.
116
117  The function invalidates the entire data cache.
118
119\note
120After reset, you must invalidate each cache before enabling (\ref SCB_EnableDCache) it.
121
122*/
123__STATIC_FORCEINLINE void SCB_InvalidateDCache (void);
124
125
126/**
127  \brief Clean D-Cache.
128
129  The function cleans the entire data cache.
130*/
131__STATIC_FORCEINLINE void SCB_CleanDCache (void);
132
133
134/**
135  \brief Clean & Invalidate D-Cache.
136
137  The function cleans and invalidates the entire data cache.
138*/
139__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void);
140
141
142/**
143  \brief       D-Cache Invalidate by address
144  \param[in]   addr    address (aligned to 32-byte boundary)
145  \param[in]   dsize   size of memory block (in number of bytes)
146
147  The function invalidates a memory block of size \em dsize [bytes] starting at address \em address. The address is aligned to 32-byte boundary.
148*/
149__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize);
150
151
152/**
153  \brief       D-Cache Clean by address
154  \param[in]   addr    address (aligned to 32-byte boundary)
155  \param[in]   dsize   size of memory block (in number of bytes)
156
157  The function cleans a memory block of size \em dsize [bytes] starting at address \em address. The address is aligned to 32-byte boundary.
158
159
160*/
161__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize);
162
163
164/**
165  \brief       D-Cache Clean and Invalidate by address
166  \param[in]   addr    address (aligned to 32-byte boundary)
167  \param[in]   dsize   size of memory block (in number of bytes)
168
169  The function invalidates and cleans a memory block of size \em dsize [bytes] starting at address \em address. The address is aligned to 32-byte boundary.
170*/
171__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize);
172
173/**
174@}  // close D-Cache Functions
175@}
176*/
177