1 /*
2  * Copyright 2017-2019 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /***********************************************************************************************************************
9  * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10  * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11  **********************************************************************************************************************/
12 
13 /* clang-format off */
14 /*
15  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
16 !!GlobalInfo
17 product: Pins v6.0
18 processor: LPC55S69
19 package_id: LPC55S69JBD100
20 mcu_data: ksdk2_0
21 processor_version: 0.0.0
22  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
23  */
24 /* clang-format on */
25 
26 #include "fsl_common.h"
27 #include "fsl_iocon.h"
28 #include "pin_mux.h"
29 
30 /* FUNCTION ************************************************************************************************************
31  *
32  * Function Name : BOARD_InitBootPins
33  * Description   : Calls initialization functions.
34  *
35  * END ****************************************************************************************************************/
BOARD_InitBootPins(void)36 void BOARD_InitBootPins(void)
37 {
38     BOARD_InitPins();
39 }
40 
41 /* clang-format off */
42 /*
43  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
44 BOARD_InitPins:
45 - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
46 - pin_list:
47   - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
48     mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
49   - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
50     slew_rate: standard, invert: disabled, open_drain: disabled}
51  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
52  */
53 /* clang-format on */
54 
55 /* FUNCTION ************************************************************************************************************
56  *
57  * Function Name : BOARD_InitPins
58  * Description   : Configures pin routing and optionally pin electrical features.
59  *
60  * END ****************************************************************************************************************/
61 /* Function assigned for the Cortex-M33 (Core #0) */
BOARD_InitPins(void)62 void BOARD_InitPins(void)
63 {
64     /* Enables the clock for the I/O controller.: Enable Clock. */
65     CLOCK_EnableClock(kCLOCK_Iocon);
66 
67     const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
68                                          IOCON_PIO_FUNC1 |
69                                          /* No addition pin function */
70                                          IOCON_PIO_MODE_INACT |
71                                          /* Standard mode, output slew rate control is enabled */
72                                          IOCON_PIO_SLEW_STANDARD |
73                                          /* Input function is not inverted */
74                                          IOCON_PIO_INV_DI |
75                                          /* Enables digital function */
76                                          IOCON_PIO_DIGITAL_EN |
77                                          /* Open drain is disabled */
78                                          IOCON_PIO_OPENDRAIN_DI);
79     /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
80     IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
81 
82     const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
83                                          IOCON_PIO_FUNC1 |
84                                          /* No addition pin function */
85                                          IOCON_PIO_MODE_INACT |
86                                          /* Standard mode, output slew rate control is enabled */
87                                          IOCON_PIO_SLEW_STANDARD |
88                                          /* Input function is not inverted */
89                                          IOCON_PIO_INV_DI |
90                                          /* Enables digital function */
91                                          IOCON_PIO_DIGITAL_EN |
92                                          /* Open drain is disabled */
93                                          IOCON_PIO_OPENDRAIN_DI);
94     /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
95     IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
96 }
97 /***********************************************************************************************************************
98  * EOF
99  **********************************************************************************************************************/
100