1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_pwr.c
4 * @author MCD Application Team
5 * @brief PWR HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Power Controller (PWR) peripheral:
8 * + Initialization/de-initialization functions
9 * + Peripheral Control functions
10 *
11 ******************************************************************************
12 * @attention
13 *
14 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
15 *
16 * Redistribution and use in source and binary forms, with or without modification,
17 * are permitted provided that the following conditions are met:
18 * 1. Redistributions of source code must retain the above copyright notice,
19 * this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials provided with the distribution.
23 * 3. Neither the name of STMicroelectronics nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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35 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 ******************************************************************************
39 */
40
41 /* Includes ------------------------------------------------------------------*/
42 #include "stm32l4xx_hal.h"
43
44 /** @addtogroup STM32L4xx_HAL_Driver
45 * @{
46 */
47
48 /** @defgroup PWR PWR
49 * @brief PWR HAL module driver
50 * @{
51 */
52
53 #ifdef HAL_PWR_MODULE_ENABLED
54
55 /* Private typedef -----------------------------------------------------------*/
56 /* Private define ------------------------------------------------------------*/
57
58 /** @defgroup PWR_Private_Defines PWR Private Defines
59 * @{
60 */
61
62 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
63 * @{
64 */
65 #define PVD_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVD threshold crossing */
66 #define PVD_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVD threshold crossing */
67 #define PVD_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVD trigger */
68 #define PVD_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVD trigger */
69 /**
70 * @}
71 */
72
73 /**
74 * @}
75 */
76
77 /* Private macro -------------------------------------------------------------*/
78 /* Private variables ---------------------------------------------------------*/
79 /* Private function prototypes -----------------------------------------------*/
80 /* Exported functions --------------------------------------------------------*/
81
82 /** @defgroup PWR_Exported_Functions PWR Exported Functions
83 * @{
84 */
85
86 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
87 * @brief Initialization and de-initialization functions
88 *
89 @verbatim
90 ===============================================================================
91 ##### Initialization and de-initialization functions #####
92 ===============================================================================
93 [..]
94
95 @endverbatim
96 * @{
97 */
98
99 /**
100 * @brief Deinitialize the HAL PWR peripheral registers to their default reset values.
101 * @retval None
102 */
HAL_PWR_DeInit(void)103 void HAL_PWR_DeInit(void)
104 {
105 __HAL_RCC_PWR_FORCE_RESET();
106 __HAL_RCC_PWR_RELEASE_RESET();
107 }
108
109 /**
110 * @brief Enable access to the backup domain
111 * (RTC registers, RTC backup data registers).
112 * @note After reset, the backup domain is protected against
113 * possible unwanted write accesses.
114 * @note RTCSEL that sets the RTC clock source selection is in the RTC back-up domain.
115 * In order to set or modify the RTC clock, the backup domain access must be
116 * disabled.
117 * @note LSEON bit that switches on and off the LSE crystal belongs as well to the
118 * back-up domain.
119 * @retval None
120 */
HAL_PWR_EnableBkUpAccess(void)121 void HAL_PWR_EnableBkUpAccess(void)
122 {
123 SET_BIT(PWR->CR1, PWR_CR1_DBP);
124 }
125
126 /**
127 * @brief Disable access to the backup domain
128 * (RTC registers, RTC backup data registers).
129 * @retval None
130 */
HAL_PWR_DisableBkUpAccess(void)131 void HAL_PWR_DisableBkUpAccess(void)
132 {
133 CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);
134 }
135
136
137
138
139 /**
140 * @}
141 */
142
143
144
145 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
146 * @brief Low Power modes configuration functions
147 *
148 @verbatim
149
150 ===============================================================================
151 ##### Peripheral Control functions #####
152 ===============================================================================
153
154 [..]
155 *** PVD configuration ***
156 =========================
157 [..]
158 (+) The PVD is used to monitor the VDD power supply by comparing it to a
159 threshold selected by the PVD Level (PLS[2:0] bits in PWR_CR2 register).
160
161 (+) PVDO flag is available to indicate if VDD/VDDA is higher or lower
162 than the PVD threshold. This event is internally connected to the EXTI
163 line16 and can generate an interrupt if enabled. This is done through
164 __HAL_PVD_EXTI_ENABLE_IT() macro.
165 (+) The PVD is stopped in Standby mode.
166
167
168 *** WakeUp pin configuration ***
169 ================================
170 [..]
171 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode.
172 The polarity of these pins can be set to configure event detection on high
173 level (rising edge) or low level (falling edge).
174
175
176
177 *** Low Power modes configuration ***
178 =====================================
179 [..]
180 The devices feature 8 low-power modes:
181 (+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator on.
182 (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on.
183 (+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, low power regulator on.
184 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on.
185 (+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on.
186 (+) Stop 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, reduced set of waking up IPs compared to Stop 1 mode.
187 (+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, main regulator off, low power regulator on.
188 (+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regulators off.
189 (+) Shutdown mode: all clocks are stopped except LSE, main and low power regulators off.
190
191
192 *** Low-power run mode ***
193 ==========================
194 [..]
195 (+) Entry: (from main run mode)
196 (++) set LPR bit with HAL_PWREx_EnableLowPowerRunMode() API after having decreased the system clock below 2 MHz.
197
198 (+) Exit:
199 (++) clear LPR bit then wait for REGLP bit to be reset with HAL_PWREx_DisableLowPowerRunMode() API. Only
200 then can the system clock frequency be increased above 2 MHz.
201
202
203 *** Sleep mode / Low-power sleep mode ***
204 =========================================
205 [..]
206 (+) Entry:
207 The Sleep mode / Low-power Sleep mode is entered thru HAL_PWR_EnterSLEEPMode() API
208 in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered.
209 (++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode).
210 (++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode).
211 In the latter case, the system clock frequency must have been decreased below 2 MHz beforehand.
212 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
213 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
214
215 (+) WFI Exit:
216 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
217 controller (NVIC) or any wake-up event.
218
219 (+) WFE Exit:
220 (++) Any wake-up event such as an EXTI line configured in event mode.
221
222 [..] When exiting the Low-power sleep mode by issuing an interrupt or a wakeup event,
223 the MCU is in Low-power Run mode.
224
225 *** Stop 0, Stop 1 and Stop 2 modes ***
226 ===============================
227 [..]
228 (+) Entry:
229 The Stop 0, Stop 1 or Stop 2 modes are entered thru the following API's:
230 (++) HAL_PWREx_EnterSTOP0Mode() for mode 0 or HAL_PWREx_EnterSTOP1Mode() for mode 1 or for porting reasons HAL_PWR_EnterSTOPMode().
231 (++) HAL_PWREx_EnterSTOP2Mode() for mode 2.
232 (+) Regulator setting (applicable to HAL_PWR_EnterSTOPMode() only):
233 (++) PWR_MAINREGULATOR_ON
234 (++) PWR_LOWPOWERREGULATOR_ON
235 (+) Exit (interrupt or event-triggered, specified when entering STOP mode):
236 (++) PWR_STOPENTRY_WFI: enter Stop mode with WFI instruction
237 (++) PWR_STOPENTRY_WFE: enter Stop mode with WFE instruction
238
239 (+) WFI Exit:
240 (++) Any EXTI Line (Internal or External) configured in Interrupt mode.
241 (++) Some specific communication peripherals (USART, LPUART, I2C) interrupts
242 when programmed in wakeup mode.
243 (+) WFE Exit:
244 (++) Any EXTI Line (Internal or External) configured in Event mode.
245
246 [..]
247 When exiting Stop 0 and Stop 1 modes, the MCU is either in Run mode or in Low-power Run mode
248 depending on the LPR bit setting.
249 When exiting Stop 2 mode, the MCU is in Run mode.
250
251 *** Standby mode ***
252 ====================
253 [..]
254 The Standby mode offers two options:
255 (+) option a) all clocks off except LSI and LSE, RRS bit set (keeps voltage regulator in low power mode).
256 SRAM and registers contents are lost except for the SRAM2 content, the RTC registers, RTC backup registers
257 and Standby circuitry.
258 (+) option b) all clocks off except LSI and LSE, RRS bit cleared (voltage regulator then disabled).
259 SRAM and register contents are lost except for the RTC registers, RTC backup registers
260 and Standby circuitry.
261
262 (++) Entry:
263 (+++) The Standby mode is entered thru HAL_PWR_EnterSTANDBYMode() API.
264 SRAM1 and register contents are lost except for registers in the Backup domain and
265 Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
266 To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
267 to set RRS bit.
268
269 (++) Exit:
270 (+++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
271 external reset in NRST pin, IWDG reset.
272
273 [..] After waking up from Standby mode, program execution restarts in the same way as after a Reset.
274
275
276 *** Shutdown mode ***
277 ======================
278 [..]
279 In Shutdown mode,
280 voltage regulator is disabled, all clocks are off except LSE, RRS bit is cleared.
281 SRAM and registers contents are lost except for backup domain registers.
282
283 (+) Entry:
284 The Shutdown mode is entered thru HAL_PWREx_EnterSHUTDOWNMode() API.
285
286 (+) Exit:
287 (++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
288 external reset in NRST pin.
289
290 [..] After waking up from Shutdown mode, program execution restarts in the same way as after a Reset.
291
292
293 *** Auto-wakeup (AWU) from low-power mode ***
294 =============================================
295 [..]
296 The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
297 Wakeup event, a tamper event or a time-stamp event, without depending on
298 an external interrupt (Auto-wakeup mode).
299
300 (+) RTC auto-wakeup (AWU) from the Stop, Standby and Shutdown modes
301
302
303 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
304 configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
305
306 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
307 is necessary to configure the RTC to detect the tamper or time stamp event using the
308 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
309
310 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
311 configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
312
313 @endverbatim
314 * @{
315 */
316
317
318
319 /**
320 * @brief Configure the voltage threshold detected by the Power Voltage Detector (PVD).
321 * @param sConfigPVD: pointer to a PWR_PVDTypeDef structure that contains the PVD
322 * configuration information.
323 * @note Refer to the electrical characteristics of your device datasheet for
324 * more details about the voltage thresholds corresponding to each
325 * detection level.
326 * @retval None
327 */
HAL_PWR_ConfigPVD(PWR_PVDTypeDef * sConfigPVD)328 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
329 {
330 /* Check the parameters */
331 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
332 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
333
334 /* Set PLS bits according to PVDLevel value */
335 MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel);
336
337 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
338 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
339 __HAL_PWR_PVD_EXTI_DISABLE_IT();
340 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
341 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
342
343 /* Configure interrupt mode */
344 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
345 {
346 __HAL_PWR_PVD_EXTI_ENABLE_IT();
347 }
348
349 /* Configure event mode */
350 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
351 {
352 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
353 }
354
355 /* Configure the edge */
356 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
357 {
358 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
359 }
360
361 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
362 {
363 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
364 }
365
366 return HAL_OK;
367 }
368
369
370 /**
371 * @brief Enable the Power Voltage Detector (PVD).
372 * @retval None
373 */
HAL_PWR_EnablePVD(void)374 void HAL_PWR_EnablePVD(void)
375 {
376 SET_BIT(PWR->CR2, PWR_CR2_PVDE);
377 }
378
379 /**
380 * @brief Disable the Power Voltage Detector (PVD).
381 * @retval None
382 */
HAL_PWR_DisablePVD(void)383 void HAL_PWR_DisablePVD(void)
384 {
385 CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE);
386 }
387
388
389
390
391 /**
392 * @brief Enable the WakeUp PINx functionality.
393 * @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable.
394 * This parameter can be one of the following legacy values which set the default polarity
395 * i.e. detection on high level (rising edge):
396 * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
397 *
398 * or one of the following value where the user can explicitly specify the enabled pin and
399 * the chosen polarity:
400 * @arg @ref PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW
401 * @arg @ref PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW
402 * @arg @ref PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW
403 * @arg @ref PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW
404 * @arg @ref PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW
405 * @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent.
406 * @retval None
407 */
HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity)408 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity)
409 {
410 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity));
411
412 /* Specifies the Wake-Up pin polarity for the event detection
413 (rising or falling edge) */
414 MODIFY_REG(PWR->CR4, (PWR_CR3_EWUP & WakeUpPinPolarity), (WakeUpPinPolarity >> PWR_WUP_POLARITY_SHIFT));
415
416 /* Enable wake-up pin */
417 SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity));
418
419
420 }
421
422 /**
423 * @brief Disable the WakeUp PINx functionality.
424 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
425 * This parameter can be one of the following values:
426 * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
427 * @retval None
428 */
HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)429 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
430 {
431 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
432
433 CLEAR_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinx));
434 }
435
436
437 /**
438 * @brief Enter Sleep or Low-power Sleep mode.
439 * @note In Sleep/Low-power Sleep mode, all I/O pins keep the same state as in Run mode.
440 * @param Regulator: Specifies the regulator state in Sleep/Low-power Sleep mode.
441 * This parameter can be one of the following values:
442 * @arg @ref PWR_MAINREGULATOR_ON Sleep mode (regulator in main mode)
443 * @arg @ref PWR_LOWPOWERREGULATOR_ON Low-power Sleep mode (regulator in low-power mode)
444 * @note Low-power Sleep mode is entered from Low-power Run mode. Therefore, if not yet
445 * in Low-power Run mode before calling HAL_PWR_EnterSLEEPMode() with Regulator set
446 * to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the
447 * Flash in power-down monde in setting the SLEEP_PD bit in FLASH_ACR register.
448 * Additionally, the clock frequency must be reduced below 2 MHz.
449 * Setting SLEEP_PD in FLASH_ACR then appropriately reducing the clock frequency must
450 * be done before calling HAL_PWR_EnterSLEEPMode() API.
451 * @note When exiting Low-power Sleep mode, the MCU is in Low-power Run mode. To move in
452 * Run mode, the user must resort to HAL_PWREx_DisableLowPowerRunMode() API.
453 * @param SLEEPEntry: Specifies if Sleep mode is entered with WFI or WFE instruction.
454 * This parameter can be one of the following values:
455 * @arg @ref PWR_SLEEPENTRY_WFI enter Sleep or Low-power Sleep mode with WFI instruction
456 * @arg @ref PWR_SLEEPENTRY_WFE enter Sleep or Low-power Sleep mode with WFE instruction
457 * @note When WFI entry is used, tick interrupt have to be disabled if not desired as
458 * the interrupt wake up source.
459 * @retval None
460 */
HAL_PWR_EnterSLEEPMode(uint32_t Regulator,uint8_t SLEEPEntry)461 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
462 {
463 /* Check the parameters */
464 assert_param(IS_PWR_REGULATOR(Regulator));
465 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
466
467 /* Set Regulator parameter */
468 if (Regulator == PWR_MAINREGULATOR_ON)
469 {
470 /* If in low-power run mode at this point, exit it */
471 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
472 {
473 if (HAL_PWREx_DisableLowPowerRunMode() != HAL_OK)
474 {
475 return ;
476 }
477 }
478 /* Regulator now in main mode. */
479 }
480 else
481 {
482 /* If in run mode, first move to low-power run mode.
483 The system clock frequency must be below 2 MHz at this point. */
484 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == RESET)
485 {
486 HAL_PWREx_EnableLowPowerRunMode();
487 }
488 }
489
490 /* Clear SLEEPDEEP bit of Cortex System Control Register */
491 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
492
493 /* Select SLEEP mode entry -------------------------------------------------*/
494 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
495 {
496 /* Request Wait For Interrupt */
497 __WFI();
498 }
499 else
500 {
501 /* Request Wait For Event */
502 __SEV();
503 __WFE();
504 __WFE();
505 }
506
507 }
508
509
510 /**
511 * @brief Enter Stop mode
512 * @note This API is named HAL_PWR_EnterSTOPMode to ensure compatibility with legacy code running
513 * on devices where only "Stop mode" is mentioned with main or low power regulator ON.
514 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
515 * @note All clocks in the VCORE domain are stopped; the PLL, the MSI,
516 * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability
517 * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI
518 * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated
519 * only to the peripheral requesting it.
520 * SRAM1, SRAM2 and register contents are preserved.
521 * The BOR is available.
522 * The voltage regulator can be configured either in normal (Stop 0) or low-power mode (Stop 1).
523 * @note When exiting Stop 0 or Stop 1 mode by issuing an interrupt or a wakeup event,
524 * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register
525 * is set; the MSI oscillator is selected if STOPWUCK is cleared.
526 * @note When the voltage regulator operates in low power mode (Stop 1), an additional
527 * startup delay is incurred when waking up.
528 * By keeping the internal regulator ON during Stop mode (Stop 0), the consumption
529 * is higher although the startup time is reduced.
530 * @param Regulator: Specifies the regulator state in Stop mode.
531 * This parameter can be one of the following values:
532 * @arg @ref PWR_MAINREGULATOR_ON Stop 0 mode (main regulator ON)
533 * @arg @ref PWR_LOWPOWERREGULATOR_ON Stop 1 mode (low power regulator ON)
534 * @param STOPEntry: Specifies Stop 0 or Stop 1 mode is entered with WFI or WFE instruction.
535 * This parameter can be one of the following values:
536 * @arg @ref PWR_STOPENTRY_WFI Enter Stop 0 or Stop 1 mode with WFI instruction.
537 * @arg @ref PWR_STOPENTRY_WFE Enter Stop 0 or Stop 1 mode with WFE instruction.
538 * @retval None
539 */
HAL_PWR_EnterSTOPMode(uint32_t Regulator,uint8_t STOPEntry)540 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
541 {
542 /* Check the parameters */
543 assert_param(IS_PWR_REGULATOR(Regulator));
544
545 if(Regulator == PWR_LOWPOWERREGULATOR_ON)
546 {
547 HAL_PWREx_EnterSTOP1Mode(STOPEntry);
548 }
549 else
550 {
551 HAL_PWREx_EnterSTOP0Mode(STOPEntry);
552 }
553 }
554
555 /**
556 * @brief Enter Standby mode.
557 * @note In Standby mode, the PLL, the HSI, the MSI and the HSE oscillators are switched
558 * off. The voltage regulator is disabled, except when SRAM2 content is preserved
559 * in which case the regulator is in low-power mode.
560 * SRAM1 and register contents are lost except for registers in the Backup domain and
561 * Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
562 * To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
563 * to set RRS bit.
564 * The BOR is available.
565 * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state.
566 * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull Up and
567 * Pull Down state, HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() disable the
568 * same.
569 * These states are effective in Standby mode only if APC bit is set through
570 * HAL_PWREx_EnablePullUpPullDownConfig() API.
571 * @retval None
572 */
HAL_PWR_EnterSTANDBYMode(void)573 void HAL_PWR_EnterSTANDBYMode(void)
574 {
575 /* Set Stand-by mode */
576 MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STANDBY);
577
578 /* Set SLEEPDEEP bit of Cortex System Control Register */
579 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
580
581 /* This option is used to ensure that store operations are completed */
582 #if defined ( __CC_ARM)
583 __force_stores();
584 #endif
585 /* Request Wait For Interrupt */
586 __WFI();
587 }
588
589
590
591 /**
592 * @brief Indicate Sleep-On-Exit when returning from Handler mode to Thread mode.
593 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
594 * re-enters SLEEP mode when an interruption handling is over.
595 * Setting this bit is useful when the processor is expected to run only on
596 * interruptions handling.
597 * @retval None
598 */
HAL_PWR_EnableSleepOnExit(void)599 void HAL_PWR_EnableSleepOnExit(void)
600 {
601 /* Set SLEEPONEXIT bit of Cortex System Control Register */
602 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
603 }
604
605
606 /**
607 * @brief Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode.
608 * @note Clear SLEEPONEXIT bit of SCR register. When this bit is set, the processor
609 * re-enters SLEEP mode when an interruption handling is over.
610 * @retval None
611 */
HAL_PWR_DisableSleepOnExit(void)612 void HAL_PWR_DisableSleepOnExit(void)
613 {
614 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
615 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
616 }
617
618
619
620 /**
621 * @brief Enable CORTEX M4 SEVONPEND bit.
622 * @note Set SEVONPEND bit of SCR register. When this bit is set, this causes
623 * WFE to wake up when an interrupt moves from inactive to pended.
624 * @retval None
625 */
HAL_PWR_EnableSEVOnPend(void)626 void HAL_PWR_EnableSEVOnPend(void)
627 {
628 /* Set SEVONPEND bit of Cortex System Control Register */
629 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
630 }
631
632
633 /**
634 * @brief Disable CORTEX M4 SEVONPEND bit.
635 * @note Clear SEVONPEND bit of SCR register. When this bit is set, this causes
636 * WFE to wake up when an interrupt moves from inactive to pended.
637 * @retval None
638 */
HAL_PWR_DisableSEVOnPend(void)639 void HAL_PWR_DisableSEVOnPend(void)
640 {
641 /* Clear SEVONPEND bit of Cortex System Control Register */
642 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
643 }
644
645
646
647
648
649 /**
650 * @brief PWR PVD interrupt callback
651 * @retval None
652 */
HAL_PWR_PVDCallback(void)653 __weak void HAL_PWR_PVDCallback(void)
654 {
655 /* NOTE : This function should not be modified; when the callback is needed,
656 the HAL_PWR_PVDCallback can be implemented in the user file
657 */
658 }
659
660 /**
661 * @}
662 */
663
664 /**
665 * @}
666 */
667
668 #endif /* HAL_PWR_MODULE_ENABLED */
669 /**
670 * @}
671 */
672
673 /**
674 * @}
675 */
676
677 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
678
