1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Convertor (ADC)
7 * peripheral:
8 * + Operation functions
9 * ++ Start, stop, get result of conversions of ADC group injected,
10 * using 2 possible modes: polling, interruption.
11 * ++ Calibration
12 * +++ ADC automatic self-calibration
13 * +++ Calibration factors get or set
14 * ++ Multimode feature when available
15 * + Control functions
16 * ++ Channels configuration on ADC group injected
17 * + State functions
18 * ++ ADC group injected contexts queue management
19 * Other functions (generic functions) are available in file
20 * "stm32l4xx_hal_adc.c".
21 *
22 @verbatim
23 [..]
24 (@) Sections "ADC peripheral features" and "How to use this driver" are
25 available in file of generic functions "stm32l4xx_hal_adc.c".
26 [..]
27 @endverbatim
28 ******************************************************************************
29 * @attention
30 *
31 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
32 *
33 * Redistribution and use in source and binary forms, with or without modification,
34 * are permitted provided that the following conditions are met:
35 * 1. Redistributions of source code must retain the above copyright notice,
36 * this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright notice,
38 * this list of conditions and the following disclaimer in the documentation
39 * and/or other materials provided with the distribution.
40 * 3. Neither the name of STMicroelectronics nor the names of its contributors
41 * may be used to endorse or promote products derived from this software
42 * without specific prior written permission.
43 *
44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
45 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
47 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
50 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
51 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 ******************************************************************************
56 */
57
58 /* Includes ------------------------------------------------------------------*/
59 #include "stm32l4xx_hal.h"
60
61 /** @addtogroup STM32L4xx_HAL_Driver
62 * @{
63 */
64
65 /** @defgroup ADCEx ADCEx
66 * @brief ADC Extended HAL module driver
67 * @{
68 */
69
70 #ifdef HAL_ADC_MODULE_ENABLED
71
72 /* Private typedef -----------------------------------------------------------*/
73 /* Private define ------------------------------------------------------------*/
74
75 /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
76 * @{
77 */
78
79 #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
80 ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
81 ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime
82 once the ADC is enabled */
83
84 /* Fixed timeout value for ADC calibration. */
85 /* Values defined to be higher than worst cases: maximum ratio between ADC */
86 /* and CPU clock frequencies. */
87 /* Example of profile low frequency : ADC frequency at 31.25kHz (ADC clock */
88 /* source PLL SAI 8MHz, ADC clock prescaler 256), CPU frequency 80MHz. */
89 /* Calibration time max = 116 / fADC (refer to datasheet) */
90 /* = 296 960 CPU cycles */
91 #define ADC_CALIBRATION_TIMEOUT (296960UL) /*!< ADC calibration time-out value (unit: CPU cycles) */
92
93 /**
94 * @}
95 */
96
97 /* Private macro -------------------------------------------------------------*/
98 /* Private variables ---------------------------------------------------------*/
99 /* Private function prototypes -----------------------------------------------*/
100 /* Exported functions --------------------------------------------------------*/
101
102 /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
103 * @{
104 */
105
106 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
107 * @brief Extended IO operation functions
108 *
109 @verbatim
110 ===============================================================================
111 ##### IO operation functions #####
112 ===============================================================================
113 [..] This section provides functions allowing to:
114
115 (+) Perform the ADC self-calibration for single or differential ending.
116 (+) Get calibration factors for single or differential ending.
117 (+) Set calibration factors for single or differential ending.
118
119 (+) Start conversion of ADC group injected.
120 (+) Stop conversion of ADC group injected.
121 (+) Poll for conversion complete on ADC group injected.
122 (+) Get result of ADC group injected channel conversion.
123 (+) Start conversion of ADC group injected and enable interruptions.
124 (+) Stop conversion of ADC group injected and disable interruptions.
125
126 (+) When multimode feature is available, start multimode and enable DMA transfer.
127 (+) Stop multimode and disable ADC DMA transfer.
128 (+) Get result of multimode conversion.
129
130 @endverbatim
131 * @{
132 */
133
134 /**
135 * @brief Perform an ADC automatic self-calibration
136 * Calibration prerequisite: ADC must be disabled (execute this
137 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
138 * @param hadc ADC handle
139 * @param SingleDiff Selection of single-ended or differential input
140 * This parameter can be one of the following values:
141 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
142 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
143 * @retval HAL status
144 */
HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)145 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
146 {
147 HAL_StatusTypeDef tmp_hal_status;
148 __IO uint32_t wait_loop_index = 0UL;
149
150 /* Check the parameters */
151 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
152 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
153
154 /* Process locked */
155 __HAL_LOCK(hadc);
156
157 /* Calibration prerequisite: ADC must be disabled. */
158
159 /* Disable the ADC (if not already disabled) */
160 tmp_hal_status = ADC_Disable(hadc);
161
162 /* Check if ADC is effectively disabled */
163 if (tmp_hal_status == HAL_OK)
164 {
165 /* Set ADC state */
166 ADC_STATE_CLR_SET(hadc->State,
167 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
168 HAL_ADC_STATE_BUSY_INTERNAL);
169
170
171
172 /* Select calibration mode single ended or differential ended */
173 MODIFY_REG(hadc->Instance->CR, ADC_CR_ADCALDIF, SingleDiff);
174
175 /* Start ADC calibration */
176 SET_BIT(hadc->Instance->CR, ADC_CR_ADCAL);
177
178 /* Wait for calibration completion */
179 while(LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
180 {
181 wait_loop_index++;
182 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
183 {
184 /* Update ADC state machine to error */
185 ADC_STATE_CLR_SET(hadc->State,
186 HAL_ADC_STATE_BUSY_INTERNAL,
187 HAL_ADC_STATE_ERROR_INTERNAL);
188
189 /* Process unlocked */
190 __HAL_UNLOCK(hadc);
191
192 return HAL_ERROR;
193 }
194 }
195
196 /* Set ADC state */
197 ADC_STATE_CLR_SET(hadc->State,
198 HAL_ADC_STATE_BUSY_INTERNAL,
199 HAL_ADC_STATE_READY);
200 }
201 else
202 {
203 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
204
205 /* Note: No need to update variable "tmp_hal_status" here: already set */
206 /* to state "HAL_ERROR" by function disabling the ADC. */
207 }
208
209 /* Process unlocked */
210 __HAL_UNLOCK(hadc);
211
212 /* Return function status */
213 return tmp_hal_status;
214 }
215
216 /**
217 * @brief Get the calibration factor.
218 * @param hadc ADC handle.
219 * @param SingleDiff This parameter can be only:
220 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
221 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
222 * @retval Calibration value.
223 */
HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)224 uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
225 {
226 /* Check the parameters */
227 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
228 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
229
230 /* Return the selected ADC calibration value */
231 return LL_ADC_GetCalibrationFactor(hadc->Instance, SingleDiff);
232 }
233
234 /**
235 * @brief Set the calibration factor to overwrite automatic conversion result.
236 * ADC must be enabled and no conversion is ongoing.
237 * @param hadc ADC handle
238 * @param SingleDiff This parameter can be only:
239 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
240 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
241 * @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
242 * @retval HAL state
243 */
HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff,uint32_t CalibrationFactor)244 HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
245 {
246 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
247 uint32_t tmp_adc_is_conversion_on_going_regular;
248 uint32_t tmp_adc_is_conversion_on_going_injected;
249
250 /* Check the parameters */
251 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
252 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
253 assert_param(IS_ADC_CALFACT(CalibrationFactor));
254
255 /* Process locked */
256 __HAL_LOCK(hadc);
257
258 /* Verification of hardware constraints before modifying the calibration */
259 /* factors register: ADC must be enabled, no conversion on going. */
260 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
261 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
262
263 if ( (LL_ADC_IsEnabled(hadc->Instance) != 0UL)
264 && (tmp_adc_is_conversion_on_going_regular == 0UL)
265 && (tmp_adc_is_conversion_on_going_injected == 0UL)
266 )
267 {
268 /* Set the selected ADC calibration value */
269 LL_ADC_SetCalibrationFactor(hadc->Instance, SingleDiff, CalibrationFactor);
270 }
271 else
272 {
273 /* Update ADC state machine */
274 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
275 /* Update ADC error code */
276 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
277
278 /* Update ADC state machine to error */
279 tmp_hal_status = HAL_ERROR;
280 }
281
282 /* Process unlocked */
283 __HAL_UNLOCK(hadc);
284
285 /* Return function status */
286 return tmp_hal_status;
287 }
288
289 /**
290 * @brief Enable ADC, start conversion of injected group.
291 * @note Interruptions enabled in this function: None.
292 * @note Case of multimode enabled when multimode feature is available:
293 * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
294 * then for ADC master.
295 * For ADC slave, ADC is enabled only (conversion is not started).
296 * For ADC master, ADC is enabled and multimode conversion is started.
297 * @param hadc ADC handle.
298 * @retval HAL status
299 */
HAL_ADCEx_InjectedStart(ADC_HandleTypeDef * hadc)300 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
301 {
302 HAL_StatusTypeDef tmp_hal_status;
303 uint32_t tmp_config_injected_queue;
304 #if defined(ADC_MULTIMODE_SUPPORT)
305 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
306 #endif
307
308 /* Check the parameters */
309 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
310
311 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
312 {
313 return HAL_BUSY;
314 }
315 else
316 {
317 /* In case of software trigger detection enabled, JQDIS must be set
318 (which can be done only if ADSTART and JADSTART are both cleared).
319 If JQDIS is not set at that point, returns an error
320 - since software trigger detection is disabled. User needs to
321 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
322 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
323 the queue is empty */
324 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
325
326 if ( (READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
327 && (tmp_config_injected_queue == 0UL)
328 )
329 {
330 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
331 return HAL_ERROR;
332 }
333
334 /* Process locked */
335 __HAL_LOCK(hadc);
336
337 /* Enable the ADC peripheral */
338 tmp_hal_status = ADC_Enable(hadc);
339
340 /* Start conversion if ADC is effectively enabled */
341 if (tmp_hal_status == HAL_OK)
342 {
343 /* Check if a regular conversion is ongoing */
344 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
345 {
346 /* Reset ADC error code field related to injected conversions only */
347 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
348 }
349 else
350 {
351 /* Set ADC error code to none */
352 ADC_CLEAR_ERRORCODE(hadc);
353 }
354
355 /* Set ADC state */
356 /* - Clear state bitfield related to injected group conversion results */
357 /* - Set state bitfield related to injected operation */
358 ADC_STATE_CLR_SET(hadc->State,
359 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
360 HAL_ADC_STATE_INJ_BUSY);
361
362 #if defined(ADC_MULTIMODE_SUPPORT)
363 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
364 - if ADC instance is master or if multimode feature is not available
365 - if multimode setting is disabled (ADC instance slave in independent mode) */
366 if ( (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
367 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
368 )
369 {
370 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
371 }
372 #endif
373
374 /* Clear ADC group injected group conversion flag */
375 /* (To ensure of no unknown state from potential previous ADC operations) */
376 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
377
378 /* Process unlocked */
379 /* Unlock before starting ADC conversions: in case of potential */
380 /* interruption, to let the process to ADC IRQ Handler. */
381 __HAL_UNLOCK(hadc);
382
383 /* Enable conversion of injected group, if automatic injected conversion */
384 /* is disabled. */
385 /* If software start has been selected, conversion starts immediately. */
386 /* If external trigger has been selected, conversion will start at next */
387 /* trigger event. */
388 /* Case of multimode enabled (when multimode feature is available): */
389 /* if ADC is slave, */
390 /* - ADC is enabled only (conversion is not started), */
391 /* - if multimode only concerns regular conversion, ADC is enabled */
392 /* and conversion is started. */
393 /* If ADC is master or independent, */
394 /* - ADC is enabled and conversion is started. */
395 #if defined(ADC_MULTIMODE_SUPPORT)
396 if ( (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
397 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
398 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
399 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
400 )
401 {
402 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
403 if(LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
404 {
405 LL_ADC_INJ_StartConversion(hadc->Instance);
406 }
407 }
408 else
409 {
410 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
411 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
412 }
413 #else
414 if(LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
415 {
416 /* Start ADC group injected conversion */
417 LL_ADC_INJ_StartConversion(hadc->Instance);
418 }
419 #endif
420
421 }
422 else
423 {
424 /* Process unlocked */
425 __HAL_UNLOCK(hadc);
426 }
427
428 /* Return function status */
429 return tmp_hal_status;
430 }
431 }
432
433 /**
434 * @brief Stop conversion of injected channels. Disable ADC peripheral if
435 * no regular conversion is on going.
436 * @note If ADC must be disabled and if conversion is on going on
437 * regular group, function HAL_ADC_Stop must be used to stop both
438 * injected and regular groups, and disable the ADC.
439 * @note If injected group mode auto-injection is enabled,
440 * function HAL_ADC_Stop must be used.
441 * @note In case of multimode enabled (when multimode feature is available),
442 * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
443 * For ADC master, conversion is stopped and ADC is disabled.
444 * For ADC slave, ADC is disabled only (conversion stop of ADC master
445 * has already stopped conversion of ADC slave).
446 * @param hadc ADC handle.
447 * @retval HAL status
448 */
HAL_ADCEx_InjectedStop(ADC_HandleTypeDef * hadc)449 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
450 {
451 HAL_StatusTypeDef tmp_hal_status;
452
453 /* Check the parameters */
454 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
455
456 /* Process locked */
457 __HAL_LOCK(hadc);
458
459 /* 1. Stop potential conversion on going on injected group only. */
460 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
461
462 /* Disable ADC peripheral if injected conversions are effectively stopped */
463 /* and if no conversion on regular group is on-going */
464 if (tmp_hal_status == HAL_OK)
465 {
466 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
467 {
468 /* 2. Disable the ADC peripheral */
469 tmp_hal_status = ADC_Disable(hadc);
470
471 /* Check if ADC is effectively disabled */
472 if (tmp_hal_status == HAL_OK)
473 {
474 /* Set ADC state */
475 ADC_STATE_CLR_SET(hadc->State,
476 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
477 HAL_ADC_STATE_READY);
478 }
479 }
480 /* Conversion on injected group is stopped, but ADC not disabled since */
481 /* conversion on regular group is still running. */
482 else
483 {
484 /* Set ADC state */
485 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
486 }
487 }
488
489 /* Process unlocked */
490 __HAL_UNLOCK(hadc);
491
492 /* Return function status */
493 return tmp_hal_status;
494 }
495
496 /**
497 * @brief Wait for injected group conversion to be completed.
498 * @param hadc ADC handle
499 * @param Timeout Timeout value in millisecond.
500 * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
501 * checked and cleared depending on AUTDLY bit status.
502 * @retval HAL status
503 */
HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)504 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
505 {
506 uint32_t tickstart;
507 uint32_t tmp_Flag_End;
508 uint32_t tmp_adc_inj_is_trigger_source_sw_start;
509 uint32_t tmp_adc_reg_is_trigger_source_sw_start;
510 uint32_t tmp_cfgr;
511 #if defined(ADC_MULTIMODE_SUPPORT)
512 const ADC_TypeDef *tmpADC_Master;
513 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
514 #endif
515
516 /* Check the parameters */
517 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
518
519 /* If end of sequence selected */
520 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
521 {
522 tmp_Flag_End = ADC_FLAG_JEOS;
523 }
524 else /* end of conversion selected */
525 {
526 tmp_Flag_End = ADC_FLAG_JEOC;
527 }
528
529 /* Get timeout */
530 tickstart = HAL_GetTick();
531
532 /* Wait until End of Conversion or Sequence flag is raised */
533 while((hadc->Instance->ISR & tmp_Flag_End) == 0UL)
534 {
535 /* Check if timeout is disabled (set to infinite wait) */
536 if(Timeout != HAL_MAX_DELAY)
537 {
538 if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
539 {
540 /* Update ADC state machine to timeout */
541 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
542
543 /* Process unlocked */
544 __HAL_UNLOCK(hadc);
545
546 return HAL_TIMEOUT;
547 }
548 }
549 }
550
551 /* Retrieve ADC configuration */
552 tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance);
553 tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance);
554 /* Get relevant register CFGR in ADC instance of ADC master or slave */
555 /* in function of multimode state (for devices with multimode */
556 /* available). */
557 #if defined(ADC_MULTIMODE_SUPPORT)
558 if ( (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
559 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
560 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
561 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
562 )
563 {
564 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
565 }
566 else
567 {
568 tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance);
569 tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
570 }
571 #else
572 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
573 #endif
574
575 /* Update ADC state machine */
576 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
577
578 /* Determine whether any further conversion upcoming on group injected */
579 /* by external trigger or by automatic injected conversion */
580 /* from group regular. */
581 if((tmp_adc_inj_is_trigger_source_sw_start != 0UL) ||
582 ((READ_BIT (tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) &&
583 ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) &&
584 (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) == 0UL) ) ) )
585 {
586 /* Check whether end of sequence is reached */
587 if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) )
588 {
589 /* Particular case if injected contexts queue is enabled: */
590 /* when the last context has been fully processed, JSQR is reset */
591 /* by the hardware. Even if no injected conversion is planned to come */
592 /* (queue empty, triggers are ignored), it can start again */
593 /* immediately after setting a new context (JADSTART is still set). */
594 /* Therefore, state of HAL ADC injected group is kept to busy. */
595 if(READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL)
596 {
597 /* Set ADC state */
598 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
599
600 if((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL)
601 {
602 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
603 }
604 }
605 }
606 }
607
608 /* Clear polled flag */
609 if (tmp_Flag_End == ADC_FLAG_JEOS)
610 {
611 /* Clear end of sequence JEOS flag of injected group if low power feature */
612 /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
613 /* For injected groups, no new conversion will start before JEOS is */
614 /* cleared. */
615 if (READ_BIT (tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL)
616 {
617 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
618 }
619 }
620 else
621 {
622 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
623 }
624
625 /* Return API HAL status */
626 return HAL_OK;
627 }
628
629 /**
630 * @brief Enable ADC, start conversion of injected group with interruption.
631 * @note Interruptions enabled in this function according to initialization
632 * setting : JEOC (end of conversion) or JEOS (end of sequence)
633 * @note Case of multimode enabled (when multimode feature is enabled):
634 * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
635 * then for ADC master.
636 * For ADC slave, ADC is enabled only (conversion is not started).
637 * For ADC master, ADC is enabled and multimode conversion is started.
638 * @param hadc ADC handle.
639 * @retval HAL status.
640 */
HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef * hadc)641 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
642 {
643 HAL_StatusTypeDef tmp_hal_status;
644 uint32_t tmp_config_injected_queue;
645 #if defined(ADC_MULTIMODE_SUPPORT)
646 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
647 #endif
648
649 /* Check the parameters */
650 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
651
652 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
653 {
654 return HAL_BUSY;
655 }
656 else
657 {
658 /* In case of software trigger detection enabled, JQDIS must be set
659 (which can be done only if ADSTART and JADSTART are both cleared).
660 If JQDIS is not set at that point, returns an error
661 - since software trigger detection is disabled. User needs to
662 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
663 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
664 the queue is empty */
665 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
666
667 if ( (READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
668 && (tmp_config_injected_queue == 0UL)
669 )
670 {
671 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
672 return HAL_ERROR;
673 }
674
675 /* Process locked */
676 __HAL_LOCK(hadc);
677
678 /* Enable the ADC peripheral */
679 tmp_hal_status = ADC_Enable(hadc);
680
681 /* Start conversion if ADC is effectively enabled */
682 if (tmp_hal_status == HAL_OK)
683 {
684 /* Check if a regular conversion is ongoing */
685 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
686 {
687 /* Reset ADC error code field related to injected conversions only */
688 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
689 }
690 else
691 {
692 /* Set ADC error code to none */
693 ADC_CLEAR_ERRORCODE(hadc);
694 }
695
696 /* Set ADC state */
697 /* - Clear state bitfield related to injected group conversion results */
698 /* - Set state bitfield related to injected operation */
699 ADC_STATE_CLR_SET(hadc->State,
700 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
701 HAL_ADC_STATE_INJ_BUSY);
702
703 #if defined(ADC_MULTIMODE_SUPPORT)
704 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
705 - if ADC instance is master or if multimode feature is not available
706 - if multimode setting is disabled (ADC instance slave in independent mode) */
707 if ( (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
708 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
709 )
710 {
711 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
712 }
713 #endif
714
715 /* Clear ADC group injected group conversion flag */
716 /* (To ensure of no unknown state from potential previous ADC operations) */
717 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
718
719 /* Process unlocked */
720 /* Unlock before starting ADC conversions: in case of potential */
721 /* interruption, to let the process to ADC IRQ Handler. */
722 __HAL_UNLOCK(hadc);
723
724 /* Enable ADC Injected context queue overflow interrupt if this feature */
725 /* is enabled. */
726 if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL)
727 {
728 __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
729 }
730
731 /* Enable ADC end of conversion interrupt */
732 switch(hadc->Init.EOCSelection)
733 {
734 case ADC_EOC_SEQ_CONV:
735 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
736 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
737 break;
738 /* case ADC_EOC_SINGLE_CONV */
739 default:
740 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
741 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
742 break;
743 }
744
745 /* Enable conversion of injected group, if automatic injected conversion */
746 /* is disabled. */
747 /* If software start has been selected, conversion starts immediately. */
748 /* If external trigger has been selected, conversion will start at next */
749 /* trigger event. */
750 /* Case of multimode enabled (when multimode feature is available): */
751 /* if ADC is slave, */
752 /* - ADC is enabled only (conversion is not started), */
753 /* - if multimode only concerns regular conversion, ADC is enabled */
754 /* and conversion is started. */
755 /* If ADC is master or independent, */
756 /* - ADC is enabled and conversion is started. */
757 #if defined(ADC_MULTIMODE_SUPPORT)
758 if ( (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
759 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
760 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
761 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
762 )
763 {
764 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
765 if(LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
766 {
767 LL_ADC_INJ_StartConversion(hadc->Instance);
768 }
769 }
770 else
771 {
772 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
773 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
774 }
775 #else
776 if(LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
777 {
778 /* Start ADC group injected conversion */
779 LL_ADC_INJ_StartConversion(hadc->Instance);
780 }
781 #endif
782
783 }
784 else
785 {
786 /* Process unlocked */
787 __HAL_UNLOCK(hadc);
788 }
789
790 /* Return function status */
791 return tmp_hal_status;
792 }
793 }
794
795 /**
796 * @brief Stop conversion of injected channels, disable interruption of
797 * end-of-conversion. Disable ADC peripheral if no regular conversion
798 * is on going.
799 * @note If ADC must be disabled and if conversion is on going on
800 * regular group, function HAL_ADC_Stop must be used to stop both
801 * injected and regular groups, and disable the ADC.
802 * @note If injected group mode auto-injection is enabled,
803 * function HAL_ADC_Stop must be used.
804 * @note Case of multimode enabled (when multimode feature is available):
805 * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
806 * then for ADC slave.
807 * For ADC master, conversion is stopped and ADC is disabled.
808 * For ADC slave, ADC is disabled only (conversion stop of ADC master
809 * has already stopped conversion of ADC slave).
810 * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
811 * @param hadc ADC handle
812 * @retval HAL status
813 */
HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef * hadc)814 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
815 {
816 HAL_StatusTypeDef tmp_hal_status;
817
818 /* Check the parameters */
819 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
820
821 /* Process locked */
822 __HAL_LOCK(hadc);
823
824 /* 1. Stop potential conversion on going on injected group only. */
825 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
826
827 /* Disable ADC peripheral if injected conversions are effectively stopped */
828 /* and if no conversion on the other group (regular group) is intended to */
829 /* continue. */
830 if (tmp_hal_status == HAL_OK)
831 {
832 /* Disable ADC end of conversion interrupt for injected channels */
833 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF));
834
835 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
836 {
837 /* 2. Disable the ADC peripheral */
838 tmp_hal_status = ADC_Disable(hadc);
839
840 /* Check if ADC is effectively disabled */
841 if (tmp_hal_status == HAL_OK)
842 {
843 /* Set ADC state */
844 ADC_STATE_CLR_SET(hadc->State,
845 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
846 HAL_ADC_STATE_READY);
847 }
848 }
849 /* Conversion on injected group is stopped, but ADC not disabled since */
850 /* conversion on regular group is still running. */
851 else
852 {
853 /* Set ADC state */
854 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
855 }
856 }
857
858 /* Process unlocked */
859 __HAL_UNLOCK(hadc);
860
861 /* Return function status */
862 return tmp_hal_status;
863 }
864
865 #if defined(ADC_MULTIMODE_SUPPORT)
866 /**
867 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
868 * @note Multimode must have been previously configured using
869 * HAL_ADCEx_MultiModeConfigChannel() function.
870 * Interruptions enabled in this function:
871 * overrun, DMA half transfer, DMA transfer complete.
872 * Each of these interruptions has its dedicated callback function.
873 * @note State field of Slave ADC handle is not updated in this configuration:
874 * user should not rely on it for information related to Slave regular
875 * conversions.
876 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
877 * @param pData Destination Buffer address.
878 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
879 * @retval HAL status
880 */
HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef * hadc,uint32_t * pData,uint32_t Length)881 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
882 {
883 HAL_StatusTypeDef tmp_hal_status;
884 ADC_HandleTypeDef tmphadcSlave;
885 ADC_Common_TypeDef *tmpADC_Common;
886
887 /* Check the parameters */
888 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
889 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
890 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
891 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
892
893 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
894 {
895 return HAL_BUSY;
896 }
897 else
898 {
899 /* Process locked */
900 __HAL_LOCK(hadc);
901
902 /* Set a temporary handle of the ADC slave associated to the ADC master */
903 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
904
905 if (tmphadcSlave.Instance == NULL)
906 {
907 /* Set ADC state */
908 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
909
910 /* Process unlocked */
911 __HAL_UNLOCK(hadc);
912
913 return HAL_ERROR;
914 }
915
916 /* Enable the ADC peripherals: master and slave (in case if not already */
917 /* enabled previously) */
918 tmp_hal_status = ADC_Enable(hadc);
919 if (tmp_hal_status == HAL_OK)
920 {
921 tmp_hal_status = ADC_Enable(&tmphadcSlave);
922 }
923
924 /* Start multimode conversion of ADCs pair */
925 if (tmp_hal_status == HAL_OK)
926 {
927 /* Set ADC state */
928 ADC_STATE_CLR_SET(hadc->State,
929 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP),
930 HAL_ADC_STATE_REG_BUSY);
931
932 /* Set ADC error code to none */
933 ADC_CLEAR_ERRORCODE(hadc);
934
935 /* Set the DMA transfer complete callback */
936 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
937
938 /* Set the DMA half transfer complete callback */
939 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
940
941 /* Set the DMA error callback */
942 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
943
944 /* Pointer to the common control register */
945 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
946
947 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
948 /* start (in case of SW start): */
949
950 /* Clear regular group conversion flag and overrun flag */
951 /* (To ensure of no unknown state from potential previous ADC operations) */
952 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
953
954 /* Process unlocked */
955 /* Unlock before starting ADC conversions: in case of potential */
956 /* interruption, to let the process to ADC IRQ Handler. */
957 __HAL_UNLOCK(hadc);
958
959 /* Enable ADC overrun interrupt */
960 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
961
962 /* Start the DMA channel */
963 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
964
965 /* Enable conversion of regular group. */
966 /* If software start has been selected, conversion starts immediately. */
967 /* If external trigger has been selected, conversion will start at next */
968 /* trigger event. */
969 /* Start ADC group regular conversion */
970 LL_ADC_REG_StartConversion(hadc->Instance);
971 }
972 else
973 {
974 /* Process unlocked */
975 __HAL_UNLOCK(hadc);
976 }
977
978 /* Return function status */
979 return tmp_hal_status;
980 }
981 }
982
983 /**
984 * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
985 * @note Multimode is kept enabled after this function. MultiMode DMA bits
986 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
987 * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
988 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
989 * resort to HAL_ADCEx_DisableMultiMode() API.
990 * @note In case of DMA configured in circular mode, function
991 * HAL_ADC_Stop_DMA() must be called after this function with handle of
992 * ADC slave, to properly disable the DMA channel.
993 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
994 * @retval HAL status
995 */
HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef * hadc)996 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
997 {
998 HAL_StatusTypeDef tmp_hal_status;
999 uint32_t tickstart;
1000 ADC_HandleTypeDef tmphadcSlave;
1001 uint32_t tmphadcSlave_conversion_on_going;
1002 HAL_StatusTypeDef tmphadcSlave_disable_status;
1003
1004 /* Check the parameters */
1005 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1006
1007 /* Process locked */
1008 __HAL_LOCK(hadc);
1009
1010
1011 /* 1. Stop potential multimode conversion on going, on regular and injected groups */
1012 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
1013
1014 /* Disable ADC peripheral if conversions are effectively stopped */
1015 if (tmp_hal_status == HAL_OK)
1016 {
1017 /* Set a temporary handle of the ADC slave associated to the ADC master */
1018 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1019
1020 if (tmphadcSlave.Instance == NULL)
1021 {
1022 /* Update ADC state machine to error */
1023 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1024
1025 /* Process unlocked */
1026 __HAL_UNLOCK(hadc);
1027
1028 return HAL_ERROR;
1029 }
1030
1031 /* Procedure to disable the ADC peripheral: wait for conversions */
1032 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1033
1034 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1035 tickstart = HAL_GetTick();
1036
1037 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1038 while( (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1039 || (tmphadcSlave_conversion_on_going == 1UL)
1040 )
1041 {
1042 if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1043 {
1044 /* Update ADC state machine to error */
1045 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1046
1047 /* Process unlocked */
1048 __HAL_UNLOCK(hadc);
1049
1050 return HAL_ERROR;
1051 }
1052
1053 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1054 }
1055
1056 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1057 /* while DMA transfer is on going) */
1058 /* Note: DMA channel of ADC slave should be stopped after this function */
1059 /* with HAL_ADC_Stop_DMA() API. */
1060 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1061
1062 /* Check if DMA channel effectively disabled */
1063 if (tmp_hal_status == HAL_ERROR)
1064 {
1065 /* Update ADC state machine to error */
1066 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1067 }
1068
1069 /* Disable ADC overrun interrupt */
1070 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1071
1072 /* 2. Disable the ADC peripherals: master and slave */
1073 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1074 /* memory a potential failing status. */
1075 if (tmp_hal_status == HAL_OK)
1076 {
1077 tmphadcSlave_disable_status = ADC_Disable(&tmphadcSlave);
1078 if ((ADC_Disable(hadc) == HAL_OK) &&
1079 (tmphadcSlave_disable_status == HAL_OK) )
1080 {
1081 tmp_hal_status = HAL_OK;
1082 }
1083 }
1084 else
1085 {
1086 /* In case of error, attempt to disable ADC master and slave without status assert */
1087 (void) ADC_Disable(hadc);
1088 (void) ADC_Disable(&tmphadcSlave);
1089 }
1090
1091 /* Set ADC state (ADC master) */
1092 ADC_STATE_CLR_SET(hadc->State,
1093 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1094 HAL_ADC_STATE_READY);
1095 }
1096
1097 /* Process unlocked */
1098 __HAL_UNLOCK(hadc);
1099
1100 /* Return function status */
1101 return tmp_hal_status;
1102 }
1103
1104 /**
1105 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
1106 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1107 * @retval The converted data values.
1108 */
HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef * hadc)1109 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
1110 {
1111 const ADC_Common_TypeDef *tmpADC_Common;
1112
1113 /* Check the parameters */
1114 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1115
1116 /* Prevent unused argument(s) compilation warning if no assert_param check */
1117 /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1118 UNUSED(hadc);
1119
1120 /* Pointer to the common control register */
1121 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1122
1123 /* Return the multi mode conversion value */
1124 return tmpADC_Common->CDR;
1125 }
1126 #endif /* ADC_MULTIMODE_SUPPORT */
1127
1128 /**
1129 * @brief Get ADC injected group conversion result.
1130 * @note Reading register JDRx automatically clears ADC flag JEOC
1131 * (ADC group injected end of unitary conversion).
1132 * @note This function does not clear ADC flag JEOS
1133 * (ADC group injected end of sequence conversion)
1134 * Occurrence of flag JEOS rising:
1135 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
1136 * to flag JEOC.
1137 * - If sequencer is composed of several ranks, during the scan
1138 * sequence flag JEOC only is raised, at the end of the scan sequence
1139 * both flags JEOC and EOS are raised.
1140 * Flag JEOS must not be cleared by this function because
1141 * it would not be compliant with low power features
1142 * (feature low power auto-wait, not available on all STM32 families).
1143 * To clear this flag, either use function:
1144 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1145 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
1146 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
1147 * @param hadc ADC handle
1148 * @param InjectedRank the converted ADC injected rank.
1149 * This parameter can be one of the following values:
1150 * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
1151 * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
1152 * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
1153 * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
1154 * @retval ADC group injected conversion data
1155 */
HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef * hadc,uint32_t InjectedRank)1156 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
1157 {
1158 uint32_t tmp_jdr;
1159
1160 /* Check the parameters */
1161 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1162 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
1163
1164 /* Get ADC converted value */
1165 switch(InjectedRank)
1166 {
1167 case ADC_INJECTED_RANK_4:
1168 tmp_jdr = hadc->Instance->JDR4;
1169 break;
1170 case ADC_INJECTED_RANK_3:
1171 tmp_jdr = hadc->Instance->JDR3;
1172 break;
1173 case ADC_INJECTED_RANK_2:
1174 tmp_jdr = hadc->Instance->JDR2;
1175 break;
1176 case ADC_INJECTED_RANK_1:
1177 default:
1178 tmp_jdr = hadc->Instance->JDR1;
1179 break;
1180 }
1181
1182 /* Return ADC converted value */
1183 return tmp_jdr;
1184 }
1185
1186 /**
1187 * @brief Injected conversion complete callback in non-blocking mode.
1188 * @param hadc ADC handle
1189 * @retval None
1190 */
HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef * hadc)1191 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
1192 {
1193 /* Prevent unused argument(s) compilation warning */
1194 UNUSED(hadc);
1195
1196 /* NOTE : This function should not be modified. When the callback is needed,
1197 function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
1198 */
1199 }
1200
1201 /**
1202 * @brief Injected context queue overflow callback.
1203 * @note This callback is called if injected context queue is enabled
1204 (parameter "QueueInjectedContext" in injected channel configuration)
1205 and if a new injected context is set when queue is full (maximum 2
1206 contexts).
1207 * @param hadc ADC handle
1208 * @retval None
1209 */
HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef * hadc)1210 __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc)
1211 {
1212 /* Prevent unused argument(s) compilation warning */
1213 UNUSED(hadc);
1214
1215 /* NOTE : This function should not be modified. When the callback is needed,
1216 function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
1217 */
1218 }
1219
1220 /**
1221 * @brief Analog watchdog 2 callback in non-blocking mode.
1222 * @param hadc ADC handle
1223 * @retval None
1224 */
HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef * hadc)1225 __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc)
1226 {
1227 /* Prevent unused argument(s) compilation warning */
1228 UNUSED(hadc);
1229
1230 /* NOTE : This function should not be modified. When the callback is needed,
1231 function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
1232 */
1233 }
1234
1235 /**
1236 * @brief Analog watchdog 3 callback in non-blocking mode.
1237 * @param hadc ADC handle
1238 * @retval None
1239 */
HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef * hadc)1240 __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc)
1241 {
1242 /* Prevent unused argument(s) compilation warning */
1243 UNUSED(hadc);
1244
1245 /* NOTE : This function should not be modified. When the callback is needed,
1246 function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
1247 */
1248 }
1249
1250
1251 /**
1252 * @brief End Of Sampling callback in non-blocking mode.
1253 * @param hadc ADC handle
1254 * @retval None
1255 */
HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef * hadc)1256 __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc)
1257 {
1258 /* Prevent unused argument(s) compilation warning */
1259 UNUSED(hadc);
1260
1261 /* NOTE : This function should not be modified. When the callback is needed,
1262 function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
1263 */
1264 }
1265
1266 /**
1267 * @brief Stop ADC conversion of regular group (and injected channels in
1268 * case of auto_injection mode), disable ADC peripheral if no
1269 * conversion is on going on injected group.
1270 * @param hadc ADC handle
1271 * @retval HAL status.
1272 */
HAL_ADCEx_RegularStop(ADC_HandleTypeDef * hadc)1273 HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef* hadc)
1274 {
1275 HAL_StatusTypeDef tmp_hal_status;
1276
1277 /* Check the parameters */
1278 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1279
1280 /* Process locked */
1281 __HAL_LOCK(hadc);
1282
1283 /* 1. Stop potential regular conversion on going */
1284 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1285
1286 /* Disable ADC peripheral if regular conversions are effectively stopped
1287 and if no injected conversions are on-going */
1288 if (tmp_hal_status == HAL_OK)
1289 {
1290 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1291 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1292
1293 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1294 {
1295 /* 2. Disable the ADC peripheral */
1296 tmp_hal_status = ADC_Disable(hadc);
1297
1298 /* Check if ADC is effectively disabled */
1299 if (tmp_hal_status == HAL_OK)
1300 {
1301 /* Set ADC state */
1302 ADC_STATE_CLR_SET(hadc->State,
1303 HAL_ADC_STATE_INJ_BUSY,
1304 HAL_ADC_STATE_READY);
1305 }
1306 }
1307 /* Conversion on injected group is stopped, but ADC not disabled since */
1308 /* conversion on regular group is still running. */
1309 else
1310 {
1311 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1312 }
1313 }
1314
1315 /* Process unlocked */
1316 __HAL_UNLOCK(hadc);
1317
1318 /* Return function status */
1319 return tmp_hal_status;
1320 }
1321
1322
1323 /**
1324 * @brief Stop ADC conversion of ADC groups regular and injected,
1325 * disable interrution of end-of-conversion,
1326 * disable ADC peripheral if no conversion is on going
1327 * on injected group.
1328 * @param hadc ADC handle
1329 * @retval HAL status.
1330 */
HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef * hadc)1331 HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef* hadc)
1332 {
1333 HAL_StatusTypeDef tmp_hal_status;
1334
1335 /* Check the parameters */
1336 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1337
1338 /* Process locked */
1339 __HAL_LOCK(hadc);
1340
1341 /* 1. Stop potential regular conversion on going */
1342 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1343
1344 /* Disable ADC peripheral if conversions are effectively stopped
1345 and if no injected conversion is on-going */
1346 if (tmp_hal_status == HAL_OK)
1347 {
1348 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1349 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1350
1351 /* Disable all regular-related interrupts */
1352 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1353
1354 /* 2. Disable ADC peripheral if no injected conversions are on-going */
1355 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1356 {
1357 tmp_hal_status = ADC_Disable(hadc);
1358 /* if no issue reported */
1359 if (tmp_hal_status == HAL_OK)
1360 {
1361 /* Set ADC state */
1362 ADC_STATE_CLR_SET(hadc->State,
1363 HAL_ADC_STATE_INJ_BUSY,
1364 HAL_ADC_STATE_READY);
1365 }
1366 }
1367 else
1368 {
1369 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1370 }
1371 }
1372
1373 /* Process unlocked */
1374 __HAL_UNLOCK(hadc);
1375
1376 /* Return function status */
1377 return tmp_hal_status;
1378 }
1379
1380 /**
1381 * @brief Stop ADC conversion of regular group (and injected group in
1382 * case of auto_injection mode), disable ADC DMA transfer, disable
1383 * ADC peripheral if no conversion is on going
1384 * on injected group.
1385 * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
1386 * For multimode (when multimode feature is available),
1387 * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
1388 * @param hadc ADC handle
1389 * @retval HAL status.
1390 */
HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef * hadc)1391 HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef* hadc)
1392 {
1393 HAL_StatusTypeDef tmp_hal_status;
1394
1395 /* Check the parameters */
1396 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1397
1398 /* Process locked */
1399 __HAL_LOCK(hadc);
1400
1401 /* 1. Stop potential regular conversion on going */
1402 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1403
1404 /* Disable ADC peripheral if conversions are effectively stopped
1405 and if no injected conversion is on-going */
1406 if (tmp_hal_status == HAL_OK)
1407 {
1408 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1409 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1410
1411 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1412 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN);
1413
1414 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1415 /* while DMA transfer is on going) */
1416 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1417
1418 /* Check if DMA channel effectively disabled */
1419 if (tmp_hal_status != HAL_OK)
1420 {
1421 /* Update ADC state machine to error */
1422 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1423 }
1424
1425 /* Disable ADC overrun interrupt */
1426 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1427
1428 /* 2. Disable the ADC peripheral */
1429 /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1430 /* to keep in memory a potential failing status. */
1431 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1432 {
1433 if (tmp_hal_status == HAL_OK)
1434 {
1435 tmp_hal_status = ADC_Disable(hadc);
1436 }
1437 else
1438 {
1439 (void)ADC_Disable(hadc);
1440 }
1441
1442 /* Check if ADC is effectively disabled */
1443 if (tmp_hal_status == HAL_OK)
1444 {
1445 /* Set ADC state */
1446 ADC_STATE_CLR_SET(hadc->State,
1447 HAL_ADC_STATE_INJ_BUSY,
1448 HAL_ADC_STATE_READY);
1449 }
1450 }
1451 else
1452 {
1453 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1454 }
1455 }
1456
1457 /* Process unlocked */
1458 __HAL_UNLOCK(hadc);
1459
1460 /* Return function status */
1461 return tmp_hal_status;
1462 }
1463
1464 #if defined(ADC_MULTIMODE_SUPPORT)
1465 /**
1466 * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going.
1467 * @note Multimode is kept enabled after this function. Multimode DMA bits
1468 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1469 * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1470 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1471 * resort to HAL_ADCEx_DisableMultiMode() API.
1472 * @note In case of DMA configured in circular mode, function
1473 * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
1474 * ADC slave, to properly disable the DMA channel.
1475 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1476 * @retval HAL status
1477 */
HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef * hadc)1478 HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc)
1479 {
1480 HAL_StatusTypeDef tmp_hal_status;
1481 uint32_t tickstart;
1482 ADC_HandleTypeDef tmphadcSlave;
1483 uint32_t tmphadcSlave_conversion_on_going;
1484
1485 /* Check the parameters */
1486 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1487
1488 /* Process locked */
1489 __HAL_LOCK(hadc);
1490
1491
1492 /* 1. Stop potential multimode conversion on going, on regular groups */
1493 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1494
1495 /* Disable ADC peripheral if conversions are effectively stopped */
1496 if (tmp_hal_status == HAL_OK)
1497 {
1498 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1499 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1500
1501 /* Set a temporary handle of the ADC slave associated to the ADC master */
1502 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1503
1504 if (tmphadcSlave.Instance == NULL)
1505 {
1506 /* Update ADC state machine to error */
1507 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1508
1509 /* Process unlocked */
1510 __HAL_UNLOCK(hadc);
1511
1512 return HAL_ERROR;
1513 }
1514
1515 /* Procedure to disable the ADC peripheral: wait for conversions */
1516 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1517
1518 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1519 tickstart = HAL_GetTick();
1520
1521 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1522 while( (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1523 || (tmphadcSlave_conversion_on_going == 1UL)
1524 )
1525 {
1526 if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1527 {
1528 /* Update ADC state machine to error */
1529 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1530
1531 /* Process unlocked */
1532 __HAL_UNLOCK(hadc);
1533
1534 return HAL_ERROR;
1535 }
1536
1537 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1538 }
1539
1540 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1541 /* while DMA transfer is on going) */
1542 /* Note: DMA channel of ADC slave should be stopped after this function */
1543 /* with HAL_ADCEx_RegularStop_DMA() API. */
1544 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1545
1546 /* Check if DMA channel effectively disabled */
1547 if (tmp_hal_status != HAL_OK)
1548 {
1549 /* Update ADC state machine to error */
1550 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1551 }
1552
1553 /* Disable ADC overrun interrupt */
1554 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1555
1556 /* 2. Disable the ADC peripherals: master and slave if no injected */
1557 /* conversion is on-going. */
1558 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1559 /* memory a potential failing status. */
1560 if (tmp_hal_status == HAL_OK)
1561 {
1562 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1563 {
1564 tmp_hal_status = ADC_Disable(hadc);
1565 if (tmp_hal_status == HAL_OK)
1566 {
1567 if (LL_ADC_INJ_IsConversionOngoing((&tmphadcSlave)->Instance) == 0UL)
1568 {
1569 tmp_hal_status = ADC_Disable(&tmphadcSlave);
1570 }
1571 }
1572 }
1573
1574 if (tmp_hal_status == HAL_OK)
1575 {
1576 /* Both Master and Slave ADC's could be disabled. Update Master State */
1577 /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
1578 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1579 }
1580 else
1581 {
1582 /* injected (Master or Slave) conversions are still on-going,
1583 no Master State change */
1584 }
1585 }
1586 }
1587
1588 /* Process unlocked */
1589 __HAL_UNLOCK(hadc);
1590
1591 /* Return function status */
1592 return tmp_hal_status;
1593 }
1594 #endif /* ADC_MULTIMODE_SUPPORT */
1595
1596 /**
1597 * @}
1598 */
1599
1600 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
1601 * @brief ADC Extended Peripheral Control functions
1602 *
1603 @verbatim
1604 ===============================================================================
1605 ##### Peripheral Control functions #####
1606 ===============================================================================
1607 [..] This section provides functions allowing to:
1608 (+) Configure channels on injected group
1609 (+) Configure multimode when multimode feature is available
1610 (+) Enable or Disable Injected Queue
1611 (+) Disable ADC voltage regulator
1612 (+) Enter ADC deep-power-down mode
1613
1614 @endverbatim
1615 * @{
1616 */
1617
1618 /**
1619 * @brief Configure a channel to be assigned to ADC group injected.
1620 * @note Possibility to update parameters on the fly:
1621 * This function initializes injected group, following calls to this
1622 * function can be used to reconfigure some parameters of structure
1623 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
1624 * The setting of these parameters is conditioned to ADC state:
1625 * Refer to comments of structure "ADC_InjectionConfTypeDef".
1626 * @note In case of usage of internal measurement channels:
1627 * Vbat/VrefInt/TempSensor.
1628 * These internal paths can be disabled using function
1629 * HAL_ADC_DeInit().
1630 * @note Caution: For Injected Context Queue use, a context must be fully
1631 * defined before start of injected conversion. All channels are configured
1632 * consecutively for the same ADC instance. Therefore, the number of calls to
1633 * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
1634 * InjectedNbrOfConversion for each context.
1635 * - Example 1: If 1 context is intended to be used (or if there is no use of the
1636 * Injected Queue Context feature) and if the context contains 3 injected ranks
1637 * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
1638 * called once for each channel (i.e. 3 times) before starting a conversion.
1639 * This function must not be called to configure a 4th injected channel:
1640 * it would start a new context into context queue.
1641 * - Example 2: If 2 contexts are intended to be used and each of them contains
1642 * 3 injected ranks (InjectedNbrOfConversion = 3),
1643 * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
1644 * for each context (3 channels x 2 contexts = 6 calls). Conversion can
1645 * start once the 1st context is set, that is after the first three
1646 * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
1647 * @param hadc ADC handle
1648 * @param sConfigInjected Structure of ADC injected group and ADC channel for
1649 * injected group.
1650 * @retval HAL status
1651 */
HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef * hadc,ADC_InjectionConfTypeDef * sConfigInjected)1652 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
1653 {
1654 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1655 uint32_t tmpOffsetShifted;
1656 uint32_t tmp_config_internal_channel;
1657 uint32_t tmp_adc_is_conversion_on_going_regular;
1658 uint32_t tmp_adc_is_conversion_on_going_injected;
1659 __IO uint32_t wait_loop_index = 0;
1660
1661 uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U;
1662
1663 /* Check the parameters */
1664 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1665 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
1666 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
1667 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
1668 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
1669 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
1670 assert_param(IS_ADC_EXTTRIGINJEC(hadc, sConfigInjected->ExternalTrigInjecConv));
1671 assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
1672 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
1673 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode));
1674
1675 if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
1676 {
1677 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
1678 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
1679 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
1680 }
1681
1682
1683 /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
1684 ignored (considered as reset) */
1685 assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->InjecOversamplingMode == ENABLE)));
1686
1687 /* JDISCEN and JAUTO bits can't be set at the same time */
1688 assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1689
1690 /* DISCEN and JAUTO bits can't be set at the same time */
1691 assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1692
1693 /* Verification of channel number */
1694 if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
1695 {
1696 assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel));
1697 }
1698 else
1699 {
1700 assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel));
1701 }
1702
1703 /* Process locked */
1704 __HAL_LOCK(hadc);
1705
1706 /* Configuration of injected group sequencer: */
1707 /* Hardware constraint: Must fully define injected context register JSQR */
1708 /* before make it entering into injected sequencer queue. */
1709 /* */
1710 /* - if scan mode is disabled: */
1711 /* * Injected channels sequence length is set to 0x00: 1 channel */
1712 /* converted (channel on injected rank 1) */
1713 /* Parameter "InjectedNbrOfConversion" is discarded. */
1714 /* * Injected context register JSQR setting is simple: register is fully */
1715 /* defined on one call of this function (for injected rank 1) and can */
1716 /* be entered into queue directly. */
1717 /* - if scan mode is enabled: */
1718 /* * Injected channels sequence length is set to parameter */
1719 /* "InjectedNbrOfConversion". */
1720 /* * Injected context register JSQR setting more complex: register is */
1721 /* fully defined over successive calls of this function, for each */
1722 /* injected channel rank. It is entered into queue only when all */
1723 /* injected ranks have been set. */
1724 /* Note: Scan mode is not present by hardware on this device, but used */
1725 /* by software for alignment over all STM32 devices. */
1726
1727 if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
1728 (sConfigInjected->InjectedNbrOfConversion == 1U) )
1729 {
1730 /* Configuration of context register JSQR: */
1731 /* - number of ranks in injected group sequencer: fixed to 1st rank */
1732 /* (scan mode disabled, only rank 1 used) */
1733 /* - external trigger to start conversion */
1734 /* - external trigger polarity */
1735 /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
1736
1737 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1738 {
1739 /* Enable external trigger if trigger selection is different of */
1740 /* software start. */
1741 /* Note: This configuration keeps the hardware feature of parameter */
1742 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1743 /* software start. */
1744 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1745 {
1746 tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1)
1747 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1748 | sConfigInjected->ExternalTrigInjecConvEdge
1749 );
1750 }
1751 else
1752 {
1753 tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) );
1754 }
1755
1756 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt);
1757 /* For debug and informative reasons, hadc handle saves JSQR setting */
1758 hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt;
1759
1760 }
1761 }
1762 else
1763 {
1764 /* Case of scan mode enabled, several channels to set into injected group */
1765 /* sequencer. */
1766 /* */
1767 /* Procedure to define injected context register JSQR over successive */
1768 /* calls of this function, for each injected channel rank: */
1769 /* 1. Start new context and set parameters related to all injected */
1770 /* channels: injected sequence length and trigger. */
1771
1772 /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
1773 /* call of the context under setting */
1774 if (hadc->InjectionConfig.ChannelCount == 0U)
1775 {
1776 /* Initialize number of channels that will be configured on the context */
1777 /* being built */
1778 hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion;
1779 /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
1780 call, this context will be written in JSQR register at the last call.
1781 At this point, the context is merely reset */
1782 hadc->InjectionConfig.ContextQueue = 0x00000000U;
1783
1784 /* Configuration of context register JSQR: */
1785 /* - number of ranks in injected group sequencer */
1786 /* - external trigger to start conversion */
1787 /* - external trigger polarity */
1788
1789 /* Enable external trigger if trigger selection is different of */
1790 /* software start. */
1791 /* Note: This configuration keeps the hardware feature of parameter */
1792 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1793 /* software start. */
1794 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1795 {
1796 tmp_JSQR_ContextQueueBeingBuilt = ( (sConfigInjected->InjectedNbrOfConversion - 1U)
1797 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1798 | sConfigInjected->ExternalTrigInjecConvEdge
1799 );
1800 }
1801 else
1802 {
1803 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U) );
1804 }
1805
1806 }
1807
1808 /* 2. Continue setting of context under definition with parameter */
1809 /* related to each channel: channel rank sequence */
1810 /* Clear the old JSQx bits for the selected rank */
1811 tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
1812
1813 /* Set the JSQx bits for the selected rank */
1814 tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
1815
1816 /* Decrease channel count */
1817 hadc->InjectionConfig.ChannelCount--;
1818
1819 /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel()
1820 call, aggregate the setting to those already built during the previous
1821 HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
1822 hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt;
1823
1824 /* 4. End of context setting: if this is the last channel set, then write context
1825 into register JSQR and make it enter into queue */
1826 if (hadc->InjectionConfig.ChannelCount == 0U)
1827 {
1828 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
1829 }
1830 }
1831
1832 /* Parameters update conditioned to ADC state: */
1833 /* Parameters that can be updated when ADC is disabled or enabled without */
1834 /* conversion on going on injected group: */
1835 /* - Injected context queue: Queue disable (active context is kept) or */
1836 /* enable (context decremented, up to 2 contexts queued) */
1837 /* - Injected discontinuous mode: can be enabled only if auto-injected */
1838 /* mode is disabled. */
1839 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1840 {
1841 /* If auto-injected mode is disabled: no constraint */
1842 if (sConfigInjected->AutoInjectedConv == DISABLE)
1843 {
1844 MODIFY_REG(hadc->Instance->CFGR,
1845 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1846 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) |
1847 ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousConvMode) );
1848 }
1849 /* If auto-injected mode is enabled: Injected discontinuous setting is */
1850 /* discarded. */
1851 else
1852 {
1853 MODIFY_REG(hadc->Instance->CFGR,
1854 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1855 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) );
1856 }
1857
1858 }
1859
1860 /* Parameters update conditioned to ADC state: */
1861 /* Parameters that can be updated when ADC is disabled or enabled without */
1862 /* conversion on going on regular and injected groups: */
1863 /* - Automatic injected conversion: can be enabled if injected group */
1864 /* external triggers are disabled. */
1865 /* - Channel sampling time */
1866 /* - Channel offset */
1867 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
1868 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
1869
1870 if ( (tmp_adc_is_conversion_on_going_regular == 0UL)
1871 && (tmp_adc_is_conversion_on_going_injected == 0UL)
1872 )
1873 {
1874 /* If injected group external triggers are disabled (set to injected */
1875 /* software start): no constraint */
1876 if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
1877 || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
1878 {
1879 if (sConfigInjected->AutoInjectedConv == ENABLE)
1880 {
1881 SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1882 }
1883 else
1884 {
1885 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1886 }
1887 }
1888 /* If Automatic injected conversion was intended to be set and could not */
1889 /* due to injected group external triggers enabled, error is reported. */
1890 else
1891 {
1892 if (sConfigInjected->AutoInjectedConv == ENABLE)
1893 {
1894 /* Update ADC state machine to error */
1895 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1896
1897 tmp_hal_status = HAL_ERROR;
1898 }
1899 else
1900 {
1901 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1902 }
1903 }
1904
1905 if (sConfigInjected->InjecOversamplingMode == ENABLE)
1906 {
1907 assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
1908 assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift));
1909
1910 /* JOVSE must be reset in case of triggered regular mode */
1911 assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE|ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVSE|ADC_CFGR2_TROVS)));
1912
1913 /* Configuration of Injected Oversampler: */
1914 /* - Oversampling Ratio */
1915 /* - Right bit shift */
1916
1917 /* Enable OverSampling mode */
1918 MODIFY_REG(hadc->Instance->CFGR2,
1919 ADC_CFGR2_JOVSE |
1920 ADC_CFGR2_OVSR |
1921 ADC_CFGR2_OVSS,
1922 ADC_CFGR2_JOVSE |
1923 sConfigInjected->InjecOversampling.Ratio |
1924 sConfigInjected->InjecOversampling.RightBitShift
1925 );
1926 }
1927 else
1928 {
1929 /* Disable Regular OverSampling */
1930 CLEAR_BIT( hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
1931 }
1932
1933 #if defined(ADC_SMPR1_SMPPLUS)
1934 /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */
1935 if(sConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5)
1936 {
1937 /* Set sampling time of the selected ADC channel */
1938 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, LL_ADC_SAMPLINGTIME_2CYCLES_5);
1939
1940 /* Set ADC sampling time common configuration */
1941 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5);
1942 }
1943 else
1944 {
1945 /* Set sampling time of the selected ADC channel */
1946 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
1947
1948 /* Set ADC sampling time common configuration */
1949 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT);
1950 }
1951 #else
1952 /* Set sampling time of the selected ADC channel */
1953 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
1954 #endif
1955
1956 /* Configure the offset: offset enable/disable, channel, offset value */
1957
1958 /* Shift the offset with respect to the selected ADC resolution. */
1959 /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
1960 tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
1961
1962 if(sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
1963 {
1964 /* Set ADC selected offset number */
1965 LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->InjectedChannel, tmpOffsetShifted);
1966
1967 }
1968 else
1969 {
1970 /* Scan each offset register to check if the selected channel is targeted. */
1971 /* If this is the case, the corresponding offset number is disabled. */
1972 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1973 {
1974 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE);
1975 }
1976 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1977 {
1978 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE);
1979 }
1980 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1981 {
1982 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE);
1983 }
1984 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1985 {
1986 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE);
1987 }
1988 }
1989
1990 }
1991
1992 /* Parameters update conditioned to ADC state: */
1993 /* Parameters that can be updated only when ADC is disabled: */
1994 /* - Single or differential mode */
1995 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
1996 {
1997 /* Set mode single-ended or differential input of the selected ADC channel */
1998 LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSingleDiff);
1999
2000 /* Configuration of differential mode */
2001 /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */
2002 if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
2003 {
2004 /* Set sampling time of the selected ADC channel */
2005 LL_ADC_SetChannelSamplingTime(hadc->Instance, __LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel) + 1UL) & 0x1FUL), sConfigInjected->InjectedSamplingTime);
2006 }
2007
2008 }
2009
2010 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
2011 /* internal measurement paths enable: If internal channel selected, */
2012 /* enable dedicated internal buffers and path. */
2013 /* Note: these internal measurement paths can be disabled using */
2014 /* HAL_ADC_DeInit(). */
2015
2016 if(__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel))
2017 {
2018 tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
2019
2020 /* If the requested internal measurement path has already been enabled, */
2021 /* bypass the configuration processing. */
2022 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL))
2023 {
2024 if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
2025 {
2026 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel);
2027
2028 /* Delay for temperature sensor stabilization time */
2029 /* Wait loop initialization and execution */
2030 /* Note: Variable divided by 2 to compensate partially */
2031 /* CPU processing cycles, scaling in us split to not */
2032 /* exceed 32 bits register capacity and handle low frequency. */
2033 wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL)));
2034 while(wait_loop_index != 0UL)
2035 {
2036 wait_loop_index--;
2037 }
2038 }
2039 }
2040 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL))
2041 {
2042 if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
2043 {
2044 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel);
2045 }
2046 }
2047 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL))
2048 {
2049 if (ADC_VREFINT_INSTANCE(hadc))
2050 {
2051 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel);
2052 }
2053 }
2054 else
2055 {
2056 /* nothing to do */
2057 }
2058 }
2059
2060 /* Process unlocked */
2061 __HAL_UNLOCK(hadc);
2062
2063 /* Return function status */
2064 return tmp_hal_status;
2065 }
2066
2067 #if defined(ADC_MULTIMODE_SUPPORT)
2068 /**
2069 * @brief Enable ADC multimode and configure multimode parameters
2070 * @note Possibility to update parameters on the fly:
2071 * This function initializes multimode parameters, following
2072 * calls to this function can be used to reconfigure some parameters
2073 * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
2074 * the ADCs.
2075 * The setting of these parameters is conditioned to ADC state.
2076 * For parameters constraints, see comments of structure
2077 * "ADC_MultiModeTypeDef".
2078 * @note To move back configuration from multimode to single mode, ADC must
2079 * be reset (using function HAL_ADC_Init() ).
2080 * @param hadc Master ADC handle
2081 * @param multimode Structure of ADC multimode configuration
2082 * @retval HAL status
2083 */
HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef * hadc,ADC_MultiModeTypeDef * multimode)2084 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
2085 {
2086 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2087 ADC_Common_TypeDef *tmpADC_Common;
2088 ADC_HandleTypeDef tmphadcSlave;
2089 uint32_t tmphadcSlave_conversion_on_going;
2090
2091 /* Check the parameters */
2092 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2093 assert_param(IS_ADC_MULTIMODE(multimode->Mode));
2094 if(multimode->Mode != ADC_MODE_INDEPENDENT)
2095 {
2096 assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode));
2097 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
2098 }
2099
2100 /* Process locked */
2101 __HAL_LOCK(hadc);
2102
2103 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
2104
2105 if (tmphadcSlave.Instance == NULL)
2106 {
2107 /* Update ADC state machine to error */
2108 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2109
2110 /* Process unlocked */
2111 __HAL_UNLOCK(hadc);
2112
2113 return HAL_ERROR;
2114 }
2115
2116 /* Parameters update conditioned to ADC state: */
2117 /* Parameters that can be updated when ADC is disabled or enabled without */
2118 /* conversion on going on regular group: */
2119 /* - Multimode DMA configuration */
2120 /* - Multimode DMA mode */
2121 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
2122 if ( (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
2123 && (tmphadcSlave_conversion_on_going == 0UL) )
2124 {
2125 /* Pointer to the common control register */
2126 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
2127
2128 /* If multimode is selected, configure all multimode parameters. */
2129 /* Otherwise, reset multimode parameters (can be used in case of */
2130 /* transition from multimode to independent mode). */
2131 if(multimode->Mode != ADC_MODE_INDEPENDENT)
2132 {
2133 MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG,
2134 multimode->DMAAccessMode |
2135 ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests));
2136
2137 /* Parameters that can be updated only when ADC is disabled: */
2138 /* - Multimode mode selection */
2139 /* - Multimode delay */
2140 /* Note: Delay range depends on selected resolution: */
2141 /* from 1 to 12 clock cycles for 12 bits */
2142 /* from 1 to 10 clock cycles for 10 bits, */
2143 /* from 1 to 8 clock cycles for 8 bits */
2144 /* from 1 to 6 clock cycles for 6 bits */
2145 /* If a higher delay is selected, it will be clipped to maximum delay */
2146 /* range */
2147 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2148 {
2149 MODIFY_REG(tmpADC_Common->CCR,
2150 ADC_CCR_DUAL |
2151 ADC_CCR_DELAY,
2152 multimode->Mode |
2153 multimode->TwoSamplingDelay
2154 );
2155 }
2156 }
2157 else /* ADC_MODE_INDEPENDENT */
2158 {
2159 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG);
2160
2161 /* Parameters that can be updated only when ADC is disabled: */
2162 /* - Multimode mode selection */
2163 /* - Multimode delay */
2164 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2165 {
2166 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
2167 }
2168 }
2169 }
2170 /* If one of the ADC sharing the same common group is enabled, no update */
2171 /* could be done on neither of the multimode structure parameters. */
2172 else
2173 {
2174 /* Update ADC state machine to error */
2175 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2176
2177 tmp_hal_status = HAL_ERROR;
2178 }
2179
2180 /* Process unlocked */
2181 __HAL_UNLOCK(hadc);
2182
2183 /* Return function status */
2184 return tmp_hal_status;
2185 }
2186 #endif /* ADC_MULTIMODE_SUPPORT */
2187
2188 /**
2189 * @brief Enable Injected Queue
2190 * @note This function resets CFGR register JQDIS bit in order to enable the
2191 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2192 * are both equal to 0 to ensure that no regular nor injected
2193 * conversion is ongoing.
2194 * @param hadc ADC handle
2195 * @retval HAL status
2196 */
HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef * hadc)2197 HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef* hadc)
2198 {
2199 HAL_StatusTypeDef tmp_hal_status;
2200 uint32_t tmp_adc_is_conversion_on_going_regular;
2201 uint32_t tmp_adc_is_conversion_on_going_injected;
2202
2203 /* Check the parameters */
2204 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2205
2206 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2207 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2208
2209 /* Parameter can be set only if no conversion is on-going */
2210 if ( (tmp_adc_is_conversion_on_going_regular == 0UL)
2211 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2212 )
2213 {
2214 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
2215
2216 /* Update state, clear previous result related to injected queue overflow */
2217 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
2218
2219 tmp_hal_status = HAL_OK;
2220 }
2221 else
2222 {
2223 tmp_hal_status = HAL_ERROR;
2224 }
2225
2226 return tmp_hal_status;
2227 }
2228
2229 /**
2230 * @brief Disable Injected Queue
2231 * @note This function sets CFGR register JQDIS bit in order to disable the
2232 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2233 * are both equal to 0 to ensure that no regular nor injected
2234 * conversion is ongoing.
2235 * @param hadc ADC handle
2236 * @retval HAL status
2237 */
HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef * hadc)2238 HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc)
2239 {
2240 HAL_StatusTypeDef tmp_hal_status;
2241 uint32_t tmp_adc_is_conversion_on_going_regular;
2242 uint32_t tmp_adc_is_conversion_on_going_injected;
2243
2244 /* Check the parameters */
2245 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2246
2247 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2248 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2249
2250 /* Parameter can be set only if no conversion is on-going */
2251 if ( (tmp_adc_is_conversion_on_going_regular == 0UL)
2252 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2253 )
2254 {
2255 LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE);
2256 tmp_hal_status = HAL_OK;
2257 }
2258 else
2259 {
2260 tmp_hal_status = HAL_ERROR;
2261 }
2262
2263 return tmp_hal_status;
2264 }
2265
2266 /**
2267 * @brief Disable ADC voltage regulator.
2268 * @note Disabling voltage regulator allows to save power. This operation can
2269 * be carried out only when ADC is disabled.
2270 * @note To enable again the voltage regulator, the user is expected to
2271 * resort to HAL_ADC_Init() API.
2272 * @param hadc ADC handle
2273 * @retval HAL status
2274 */
HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef * hadc)2275 HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc)
2276 {
2277 HAL_StatusTypeDef tmp_hal_status;
2278
2279 /* Check the parameters */
2280 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2281
2282 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2283 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2284 {
2285 LL_ADC_DisableInternalRegulator(hadc->Instance);
2286 tmp_hal_status = HAL_OK;
2287 }
2288 else
2289 {
2290 tmp_hal_status = HAL_ERROR;
2291 }
2292
2293 return tmp_hal_status;
2294 }
2295
2296 /**
2297 * @brief Enter ADC deep-power-down mode
2298 * @note This mode is achieved in setting DEEPPWD bit and allows to save power
2299 * in reducing leakage currents. It is particularly interesting before
2300 * entering stop modes.
2301 * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
2302 * ADC voltage regulator. This means that this API encompasses
2303 * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
2304 * calibration is lost.
2305 * @note To exit the ADC deep-power-down mode, the user is expected to
2306 * resort to HAL_ADC_Init() API as well as to relaunch a calibration
2307 * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
2308 * saved calibration factor.
2309 * @param hadc ADC handle
2310 * @retval HAL status
2311 */
HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef * hadc)2312 HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef* hadc)
2313 {
2314 HAL_StatusTypeDef tmp_hal_status;
2315
2316 /* Check the parameters */
2317 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2318
2319 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2320 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2321 {
2322 LL_ADC_EnableDeepPowerDown(hadc->Instance);
2323 tmp_hal_status = HAL_OK;
2324 }
2325 else
2326 {
2327 tmp_hal_status = HAL_ERROR;
2328 }
2329
2330 return tmp_hal_status;
2331 }
2332
2333 /**
2334 * @}
2335 */
2336
2337 /**
2338 * @}
2339 */
2340
2341 #endif /* HAL_ADC_MODULE_ENABLED */
2342 /**
2343 * @}
2344 */
2345
2346 /**
2347 * @}
2348 */
2349
2350 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2351
