1 /**
2 ******************************************************************************
3 * @file stm32l0xx_hal_pwr.c
4 * @author MCD Application Team
5 * @brief PWR HAL module driver.
6 *
7 * This file provides firmware functions to manage the following
8 * functionalities of the Power Controller (PWR) peripheral:
9 * + Initialization/de-initialization functions
10 * + Peripheral Control functions
11 *
12 ******************************************************************************
13 * @attention
14 *
15 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
16 *
17 * Redistribution and use in source and binary forms, with or without modification,
18 * are permitted provided that the following conditions are met:
19 * 1. Redistributions of source code must retain the above copyright notice,
20 * this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright notice,
22 * this list of conditions and the following disclaimer in the documentation
23 * and/or other materials provided with the distribution.
24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 ******************************************************************************
40 */
41
42 /* Includes ------------------------------------------------------------------*/
43 #include "stm32l0xx_hal.h"
44
45 #ifdef HAL_PWR_MODULE_ENABLED
46 /** @addtogroup STM32L0xx_HAL_Driver
47 * @{
48 */
49
50 /** @addtogroup PWR
51 * @{
52 */
53
54 /** @addtogroup PWR_Private
55 * @{
56 */
57
58 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
59 * @{
60 */
61 #define PVD_MODE_IT ((uint32_t)0x00010000U)
62 #define PVD_MODE_EVT ((uint32_t)0x00020000U)
63 #define PVD_RISING_EDGE ((uint32_t)0x00000001U)
64 #define PVD_FALLING_EDGE ((uint32_t)0x00000002U)
65 /**
66 * @}
67 */
68
69 /**
70 * @}
71 */
72
73
74 /** @addtogroup PWR_Exported_Functions
75 * @{
76 */
77
78 /** @addtogroup PWR_Exported_Functions_Group1
79 * @brief Initialization and de-initialization functions
80 *
81 @verbatim
82 ===============================================================================
83 ##### Initialization and de-initialization functions #####
84 ===============================================================================
85
86 @endverbatim
87 * @{
88 */
89
90 /**
91 * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
92 * @retval None
93 */
HAL_PWR_DeInit(void)94 void HAL_PWR_DeInit(void)
95 {
96 __HAL_RCC_PWR_FORCE_RESET();
97 __HAL_RCC_PWR_RELEASE_RESET();
98 }
99
100 /**
101 * @}
102 */
103
104 /** @addtogroup PWR_Exported_Functions_Group2
105 * @brief Low Power modes configuration functions
106 *
107 @verbatim
108
109 ===============================================================================
110 ##### Peripheral Control functions #####
111 ===============================================================================
112
113 *** Backup domain ***
114 =========================
115 [..]
116 After reset, the backup domain (RTC registers, RTC backup data
117 registers) is protected against possible unwanted
118 write accesses.
119 To enable access to the RTC Domain and RTC registers, proceed as follows:
120 (+) Enable the Power Controller (PWR) APB1 interface clock using the
121 __HAL_RCC_PWR_CLK_ENABLE() macro.
122 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
123
124 *** PVD configuration ***
125 =========================
126 [..]
127 (+) The PVD is used to monitor the VDD power supply by comparing it to a
128 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
129 (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
130 internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
131 when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
132
133 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
134 than the PVD threshold. This event is internally connected to the EXTI
135 line16 and can generate an interrupt if enabled. This is done through
136 __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
137 (+) The PVD is stopped in Standby mode.
138
139 *** WakeUp pin configuration ***
140 ================================
141 [..]
142 (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
143 forced in input pull-down configuration and is active on rising edges.
144 (+) There are two WakeUp pins:
145 WakeUp Pin 1 on PA.00.
146 WakeUp Pin 2 on PC.13.
147 WakeUp Pin 3 on PE.06 .
148
149
150 [..]
151 *** Main and Backup Regulators configuration ***
152 ================================================
153
154 (+) The main internal regulator can be configured to have a tradeoff between
155 performance and power consumption when the device does not operate at
156 the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
157 macro which configures the two VOS bits in PWR_CR register:
158 (++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and
159 the System frequency can go up to 32 MHz.
160 (++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and
161 the System frequency can go up to 16 MHz.
162 (++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and
163 the System frequency can go up to 4.2 MHz.
164
165 Refer to the datasheets for more details.
166
167 *** Low Power modes configuration ***
168 =====================================
169 [..]
170 The device features 5 low-power modes:
171 (+) Low power run mode: regulator in low power mode, limited clock frequency,
172 limited number of peripherals running.
173 (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running.
174 (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency,
175 limited number of peripherals running, regulator in low power mode.
176 (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
177 (+) Standby mode: VCORE domain powered off
178
179 *** Low power run mode ***
180 =========================
181 [..]
182 To further reduce the consumption when the system is in Run mode, the regulator can be
183 configured in low power mode. In this mode, the system frequency should not exceed
184 MSI frequency range1.
185 In Low power run mode, all I/O pins keep the same state as in Run mode.
186
187 (+) Entry:
188 (++) VCORE in range2
189 (++) Decrease the system frequency not to exceed the frequency of MSI frequency range1.
190 (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
191 function.
192 (+) Exit:
193 (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
194 function.
195 (++) Increase the system frequency if needed.
196
197 *** Sleep mode ***
198 ==================
199 [..]
200 (+) Entry:
201 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
202 functions with
203 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
204 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
205
206 (+) Exit:
207 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
208 controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode,
209 the MCU exits Sleep mode as soon as an event occurs.
210
211 *** Low power sleep mode ***
212 ============================
213 [..]
214 (+) Entry:
215 The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
216 functions with
217 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
218 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
219 (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
220 This reduces power consumption but increases the wake-up time.
221
222 (+) Exit:
223 (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
224 acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
225 from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
226 the MCU exits Sleep mode as soon as an event occurs.
227
228 *** Stop mode ***
229 =================
230 [..]
231 The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral
232 clock gating. The voltage regulator can be configured either in normal or low-power mode.
233 In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
234 the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
235 To get the lowest consumption in Stop mode, the internal Flash memory also enters low
236 power mode. When the Flash memory is in power-down mode, an additional startup delay is
237 incurred when waking up from Stop mode.
238 To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
239 sensor can be switched off before entering Stop mode. They can be switched on again by
240 software after exiting Stop mode using the ULP bit in the PWR_CR register.
241 In Stop mode, all I/O pins keep the same state as in Run mode.
242
243 (+) Entry:
244 The Stop mode is entered using the HAL_PWR_EnterSTOPMode
245 function with:
246 (++) Main regulator ON.
247 (++) Low Power regulator ON.
248 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
249 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
250 (+) Exit:
251 (++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC
252 oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR
253 register
254
255 *** Standby mode ***
256 ====================
257 [..]
258 The Standby mode allows to achieve the lowest power consumption. It is based on the
259 Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is
260 consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
261 also switched off. SRAM and register contents are lost except for the RTC registers, RTC
262 backup registers and Standby circuitry.
263
264 To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
265 sensor can be switched off before entering the Standby mode. They can be switched
266 on again by software after exiting the Standby mode.
267 function.
268
269 (+) Entry:
270 (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
271 (+) Exit:
272 (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
273 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
274
275 *** Auto-wakeup (AWU) from low-power mode ***
276 =============================================
277 [..]
278 The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
279 Wakeup event, a tamper event, a time-stamp event, or a comparator event,
280 without depending on an external interrupt (Auto-wakeup mode).
281
282 (+) RTC auto-wakeup (AWU) from the Stop mode
283 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
284 (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
285 or Event modes) using the EXTI_Init() function.
286 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
287 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
288 and RTC_AlarmCmd() functions.
289 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
290 is necessary to:
291 (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
292 or Event modes) using the EXTI_Init() function.
293 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
294 function.
295 (+++) Configure the RTC to detect the tamper or time stamp event using the
296 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
297 functions.
298 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
299 (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt
300 or Event modes) using the EXTI_Init() function.
301 (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function.
302 (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
303 RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
304
305 (+) RTC auto-wakeup (AWU) from the Standby mode
306 (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
307 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
308 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
309 and RTC_AlarmCmd() functions.
310 (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
311 is necessary to:
312 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
313 function.
314 (+++) Configure the RTC to detect the tamper or time stamp event using the
315 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
316 functions.
317 (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
318 (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
319 (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
320 RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
321
322 (+) Comparator auto-wakeup (AWU) from the Stop mode
323 (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
324 event, it is necessary to:
325 (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
326 to be sensitive to to the selected edges (falling, rising or falling
327 and rising) (Interrupt or Event modes) using the EXTI_Init() function.
328 (+++) Configure the comparator to generate the event.
329 @endverbatim
330 * @{
331 */
332
333 /**
334 * @brief Enables access to the backup domain (RTC registers, RTC
335 * backup data registers ).
336 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
337 * Backup Domain Access should be kept enabled.
338 * @retval None
339 */
HAL_PWR_EnableBkUpAccess(void)340 void HAL_PWR_EnableBkUpAccess(void)
341 {
342 /* Enable access to RTC and backup registers */
343 SET_BIT(PWR->CR, PWR_CR_DBP);
344 }
345
346 /**
347 * @brief Disables access to the backup domain
348 * @note Applies to RTC registers, RTC backup data registers.
349 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
350 * Backup Domain Access should be kept enabled.
351 * @retval None
352 */
HAL_PWR_DisableBkUpAccess(void)353 void HAL_PWR_DisableBkUpAccess(void)
354 {
355 /* Disable access to RTC and backup registers */
356 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
357 }
358
359 /**
360 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
361 * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
362 * information for the PVD.
363 * @note Refer to the electrical characteristics of your device datasheet for
364 * more details about the voltage threshold corresponding to each
365 * detection level.
366 * @retval None
367 */
HAL_PWR_ConfigPVD(PWR_PVDTypeDef * sConfigPVD)368 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
369 {
370 /* Check the parameters */
371 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
372 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
373
374 /* Set PLS[7:5] bits according to PVDLevel value */
375 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
376
377 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
378 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
379 __HAL_PWR_PVD_EXTI_DISABLE_IT();
380 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
381 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
382
383 /* Configure interrupt mode */
384 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
385 {
386 __HAL_PWR_PVD_EXTI_ENABLE_IT();
387 }
388
389 /* Configure event mode */
390 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
391 {
392 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
393 }
394
395 /* Configure the edge */
396 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
397 {
398 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
399 }
400
401 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
402 {
403 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
404 }
405 }
406
407 /**
408 * @brief Enables the Power Voltage Detector(PVD).
409 * @retval None
410 */
HAL_PWR_EnablePVD(void)411 void HAL_PWR_EnablePVD(void)
412 {
413 /* Enable the power voltage detector */
414 SET_BIT(PWR->CR, PWR_CR_PVDE);
415 }
416
417 /**
418 * @brief Disables the Power Voltage Detector(PVD).
419 * @retval None
420 */
HAL_PWR_DisablePVD(void)421 void HAL_PWR_DisablePVD(void)
422 {
423 /* Disable the power voltage detector */
424 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
425 }
426
427 /**
428 * @brief Enables the WakeUp PINx functionality.
429 * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
430 * This parameter can be one of the following values:
431 * @arg PWR_WAKEUP_PIN1
432 * @arg PWR_WAKEUP_PIN2
433 * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
434 * @retval None
435 */
HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)436 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
437 {
438 /* Check the parameter */
439 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
440 /* Enable the EWUPx pin */
441 SET_BIT(PWR->CSR, WakeUpPinx);
442 }
443
444 /**
445 * @brief Disables the WakeUp PINx functionality.
446 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
447 * This parameter can be one of the following values:
448 * @arg PWR_WAKEUP_PIN1
449 * @arg PWR_WAKEUP_PIN2
450 * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
451 * @retval None
452 */
HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)453 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
454 {
455 /* Check the parameter */
456 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
457 /* Disable the EWUPx pin */
458 CLEAR_BIT(PWR->CSR, WakeUpPinx);
459 }
460
461 /**
462 * @brief Enters Sleep mode.
463 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
464 * @param Regulator: Specifies the regulator state in SLEEP mode.
465 * This parameter can be one of the following values:
466 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
467 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
468 * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
469 * When WFI entry is used, tick interrupt have to be disabled if not desired as
470 * the interrupt wake up source.
471 * This parameter can be one of the following values:
472 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
473 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
474 * @retval None
475 */
HAL_PWR_EnterSLEEPMode(uint32_t Regulator,uint8_t SLEEPEntry)476 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
477 {
478 uint32_t tmpreg = 0U;
479 /* Check the parameters */
480 assert_param(IS_PWR_REGULATOR(Regulator));
481 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
482
483 /* Select the regulator state in Sleep mode ---------------------------------*/
484 tmpreg = PWR->CR;
485
486 /* Clear PDDS and LPDS bits */
487 CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
488
489 /* Set LPSDSR bit according to PWR_Regulator value */
490 SET_BIT(tmpreg, Regulator);
491
492 /* Store the new value */
493 PWR->CR = tmpreg;
494
495 /* Clear SLEEPDEEP bit of Cortex System Control Register */
496 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
497
498 /* Select SLEEP mode entry -------------------------------------------------*/
499 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
500 {
501 /* Request Wait For Interrupt */
502 __WFI();
503 }
504 else
505 {
506 /* Request Wait For Event */
507 __SEV();
508 __WFE();
509 __WFE();
510 }
511 }
512
513 /**
514 * @brief Enters Stop mode.
515 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
516 * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
517 * MSI or HSI16 RCoscillator is selected as system clock depending
518 * the bit STOPWUCK in the RCC_CFGR register.
519 * @note When the voltage regulator operates in low power mode, an additional
520 * startup delay is incurred when waking up from Stop mode.
521 * By keeping the internal regulator ON during Stop mode, the consumption
522 * is higher although the startup time is reduced.
523 * @note Before entering in this function, it is important to ensure that the WUF
524 * wakeup flag is cleared. To perform this action, it is possible to call the
525 * following macro : __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU)
526 *
527 * @param Regulator: Specifies the regulator state in Stop mode.
528 * This parameter can be one of the following values:
529 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
530 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
531 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
532 * This parameter can be one of the following values:
533 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
534 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
535 * @retval None
536 */
HAL_PWR_EnterSTOPMode(uint32_t Regulator,uint8_t STOPEntry)537 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
538 {
539 uint32_t tmpreg = 0U;
540
541 /* Check the parameters */
542 assert_param(IS_PWR_REGULATOR(Regulator));
543 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
544
545 /* Select the regulator state in Stop mode ---------------------------------*/
546 tmpreg = PWR->CR;
547
548 /* Clear PDDS and LPDS bits */
549 CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
550
551 /* Set LPSDSR bit according to PWR_Regulator value */
552 SET_BIT(tmpreg, Regulator);
553
554 /* Store the new value */
555 PWR->CR = tmpreg;
556
557 /* Set SLEEPDEEP bit of Cortex System Control Register */
558 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
559
560 /* Select Stop mode entry --------------------------------------------------*/
561 if(STOPEntry == PWR_STOPENTRY_WFI)
562 {
563 /* Request Wait For Interrupt */
564 __WFI();
565 }
566 else
567 {
568 /* Request Wait For Event */
569 __SEV();
570 __WFE();
571 __WFE();
572 }
573
574 /* Reset SLEEPDEEP bit of Cortex System Control Register */
575 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
576
577 }
578
579 /**
580 * @brief Enters Standby mode.
581 * @note In Standby mode, all I/O pins are high impedance except for:
582 * - Reset pad (still available)
583 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
584 * Alarm out, or RTC clock calibration out.
585 * - RTC_AF2 pin (PC13) if configured for tamper.
586 * - WKUP pin 1 (PA00) if enabled.
587 * - WKUP pin 2 (PC13) if enabled.
588 * - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only.
589 * - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only.
590 * @retval None
591 */
HAL_PWR_EnterSTANDBYMode(void)592 void HAL_PWR_EnterSTANDBYMode(void)
593 {
594 /* Select Standby mode */
595 SET_BIT(PWR->CR, PWR_CR_PDDS);
596
597 /* Set SLEEPDEEP bit of Cortex System Control Register */
598 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
599
600 /* This option is used to ensure that store operations are completed */
601 #if defined ( __CC_ARM)
602 __force_stores();
603 #endif
604 /* Request Wait For Interrupt */
605 __WFI();
606 }
607
608 /**
609 * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
610 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
611 * re-enters SLEEP mode when an interruption handling is over.
612 * Setting this bit is useful when the processor is expected to run only on
613 * interruptions handling.
614 * @retval None
615 */
HAL_PWR_EnableSleepOnExit(void)616 void HAL_PWR_EnableSleepOnExit(void)
617 {
618 /* Set SLEEPONEXIT bit of Cortex System Control Register */
619 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
620 }
621
622
623 /**
624 * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
625 * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
626 * re-enters SLEEP mode when an interruption handling is over.
627 * @retval None
628 */
HAL_PWR_DisableSleepOnExit(void)629 void HAL_PWR_DisableSleepOnExit(void)
630 {
631 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
632 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
633 }
634
635
636 /**
637 * @brief Enables CORTEX M0+ SEVONPEND bit.
638 * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
639 * WFE to wake up when an interrupt moves from inactive to pended.
640 * @retval None
641 */
HAL_PWR_EnableSEVOnPend(void)642 void HAL_PWR_EnableSEVOnPend(void)
643 {
644 /* Set SEVONPEND bit of Cortex System Control Register */
645 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
646 }
647
648
649 /**
650 * @brief Disables CORTEX M0+ SEVONPEND bit.
651 * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
652 * WFE to wake up when an interrupt moves from inactive to pended.
653 * @retval None
654 */
HAL_PWR_DisableSEVOnPend(void)655 void HAL_PWR_DisableSEVOnPend(void)
656 {
657 /* Clear SEVONPEND bit of Cortex System Control Register */
658 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
659 }
660
661 /**
662 * @brief This function handles the PWR PVD interrupt request.
663 * @note This API should be called under the PVD_IRQHandler().
664 * @retval None
665 */
HAL_PWR_PVD_IRQHandler(void)666 void HAL_PWR_PVD_IRQHandler(void)
667 {
668 /* Check PWR exti flag */
669 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
670 {
671 /* PWR PVD interrupt user callback */
672 HAL_PWR_PVDCallback();
673
674 /* Clear PWR Exti pending bit */
675 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
676 }
677 }
678
679 /**
680 * @brief PWR PVD interrupt callback
681 * @retval None
682 */
HAL_PWR_PVDCallback(void)683 __weak void HAL_PWR_PVDCallback(void)
684 {
685 /* NOTE : This function Should not be modified, when the callback is needed,
686 the HAL_PWR_PVDCallback could be implemented in the user file
687 */
688 }
689
690 /**
691 * @}
692 */
693
694 /**
695 * @}
696 */
697
698 #endif /* HAL_PWR_MODULE_ENABLED */
699 /**
700 * @}
701 */
702
703 /**
704 * @}
705 */
706
707 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
708
709
