1;/*
2; * Copyright (c) 2018-2022 ARM Limited
3; *
4; * Licensed under the Apache License, Version 2.0 (the "License");
5; * you may not use this file except in compliance with the License.
6; * You may obtain a copy of the License at
7; *
8; *     http://www.apache.org/licenses/LICENSE-2.0
9; *
10; * Unless required by applicable law or agreed to in writing, software
11; * distributed under the License is distributed on an "AS IS" BASIS,
12; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13; * See the License for the specific language governing permissions and
14; * limitations under the License.
15; *
16; *
17; * This file is derivative of CMSIS V5.00 gcc_arm.ld
18; */
19
20/* Linker script to configure memory regions. */
21/* This file will be run trough the pre-processor. */
22
23#include "region_defs.h"
24MEMORY
25{
26#if defined(BL2_NVMCNT_AREA_BASE)
27  FLASH_NVMCNT(rx) : ORIGIN = BL2_NVMCNT_AREA_BASE, LENGTH = BL2_NVMCNT_AREA_SIZE
28#endif
29  FLASH (rx)  : ORIGIN = BL2_CODE_START, LENGTH = BL2_CODE_SIZE
30  FLASH_NOHDP (rx)  : ORIGIN = BL2_NOHDP_CODE_START, LENGTH = BL2_NOHDP_CODE_SIZE
31#if defined(BL2_OTP_AREA_BASE)
32  FLASH_OTP(rx) : ORIGIN = BL2_OTP_AREA_BASE, LENGTH = BL2_OTP_AREA_SIZE
33#endif
34#if defined(BL2_NVM_AREA_BASE)
35  FLASH_NVM(rx) : ORIGIN = BL2_NVM_AREA_BASE, LENGTH = BL2_NVM_AREA_SIZE
36#endif
37  RAM   (rwx) : ORIGIN = BL2_DATA_START, LENGTH = BL2_DATA_SIZE
38}
39
40__heap_size__  = BL2_HEAP_SIZE;
41__msp_stack_size__ = BL2_MSP_STACK_SIZE;
42
43
44/* Library configurations */
45GROUP(libgcc.a libc.a libm.a libnosys.a)
46
47ENTRY(Reset_Handler)
48
49SECTIONS
50{
51
52#if defined(BL2_OTP_AREA_BASE)
53    .BL2_OTP :
54    {
55       KEEP(*(.BL2_OTP_Const))
56    } > FLASH_OTP
57#endif
58
59#if defined(BL2_NVM_AREA_BASE)
60    .BL2_NVM :
61    {
62        KEEP(*(.BL2_NVM_Const))
63    } > FLASH_NVM
64#endif
65
66#if defined(BL2_NVMCNT_AREA_BASE)
67    .BL2_NVMCNT :
68    {
69        KEEP(*(.BL2_NVMCNT_Const))
70    } > FLASH_NVMCNT
71#endif
72
73    .BL2_NoHdp_Code :
74    {
75        KEEP(*(.BL2_NoHdp_Data))
76        KEEP(*(.BL2_NoHdp_Code))
77        *mpu_armv8m_drv.o (.text* .rodata*)
78        KEEP(*(.BL2_Error_Code))
79        __hdp_end__ = .;
80    } > FLASH_NOHDP
81
82    .text (BL2_CODE_START):
83    {
84
85        KEEP(*(.vectors))
86        __Vectors_End = .;
87        __Vectors_Size = __Vectors_End - __Vectors;
88        __end__ = .;
89
90        *(.text*)
91
92        KEEP(*(.init))
93        KEEP(*(.fini))
94
95
96        /* .ctors */
97        *crtbegin.o(.ctors)
98        *crtbegin?.o(.ctors)
99        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
100        *(SORT(.ctors.*))
101        *(.ctors)
102
103        /* .dtors */
104         *crtbegin.o(.dtors)
105         *crtbegin?.o(.dtors)
106         *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
107         *(SORT(.dtors.*))
108         *(.dtors)
109
110        *(.rodata*)
111
112        KEEP(*(.eh_frame*))
113    } > FLASH
114
115    .ARM.extab :
116    {
117        *(.ARM.extab* .gnu.linkonce.armextab.*)
118    } > FLASH
119
120    __exidx_start = .;
121    .ARM.exidx :
122    {
123        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
124    } > FLASH
125    __exidx_end = .;
126
127    /* To copy multiple ROM to RAM sections,
128     * define etext2/data2_start/data2_end and
129     * define __STARTUP_COPY_MULTIPLE in startup_stm32l5562xx_bl2.S or
130     * startup_stm32l552xx_bl2.S*/
131
132    .copy.table :
133    {
134        . = ALIGN(4);
135        __copy_table_start__ = .;
136        LONG (__etext)
137        LONG (__data_start__)
138        LONG ((__data_end__ - __data_start__) / 4)
139        LONG (DEFINED(__etext2) ? __etext2 : 0)
140        LONG (DEFINED(__data2_start__) ? __data2_start__ : 0)
141        LONG (DEFINED(__data2_start__) ? ((__data2_end__ - __data2_start__) / 4) : 0)
142        __copy_table_end__ = .;
143    } > FLASH
144
145    /* To clear multiple BSS sections,
146     * uncomment .zero.table section and,
147     * define __STARTUP_CLEAR_BSS_MULTIPLE  in startup_stm32l5562xx_bl2.S or
148     * startup_stm32l552xx_bl2.S */
149    .zero.table :
150    {
151        . = ALIGN(4);
152        __zero_table_start__ = .;
153        LONG (__bss_start__)
154        LONG ((__bss_end__ - __bss_start__) / 4)
155        LONG (DEFINED(__bss2_start__) ? __bss2_start__ : 0)
156        LONG (DEFINED(__bss2_start__) ? ((__bss2_end__ - __bss2_start__) / 4) : 0)
157        __zero_table_end__ = .;
158    } > FLASH
159
160    __etext = ALIGN(4);
161
162    .data : AT (__etext)
163    {
164        __data_start__ = .;
165        *(vtable)
166        *(.data*)
167
168        . = ALIGN(4);
169        /* preinit data */
170        PROVIDE_HIDDEN (__preinit_array_start = .);
171        KEEP(*(.preinit_array))
172        PROVIDE_HIDDEN (__preinit_array_end = .);
173
174        . = ALIGN(4);
175        /* init data */
176        PROVIDE_HIDDEN (__init_array_start = .);
177        KEEP(*(SORT(.init_array.*)))
178        KEEP(*(.init_array))
179        PROVIDE_HIDDEN (__init_array_end = .);
180
181
182        . = ALIGN(4);
183        /* finit data */
184        PROVIDE_HIDDEN (__fini_array_start = .);
185        KEEP(*(SORT(.fini_array.*)))
186        KEEP(*(.fini_array))
187        PROVIDE_HIDDEN (__fini_array_end = .);
188
189        KEEP(*(.jcr*))
190        . = ALIGN(4);
191        /* All data end */
192        __data_end__ = .;
193
194    } > RAM
195    Image$$ER_CODE$$Base = __Vectors ;
196    Image$$ER_CODE$$Limit = __etext + + SIZEOF(.data);
197    .bss :
198    {
199        . = ALIGN(4);
200        __bss_start__ = .;
201        *(.bss*)
202        *(COMMON)
203        . = ALIGN(4);
204        __bss_end__ = .;
205    } > RAM
206
207    bss_size = __bss_end__ - __bss_start__;
208
209    .msp_stack :
210    {
211        . = ALIGN(8);
212        KEEP(*(.psp_stack*))
213        . += __msp_stack_size__;
214    } > RAM
215    Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack);
216    Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack) ;
217
218    .heap :
219    {
220        . = ALIGN(8);
221        __end__ = .;
222        PROVIDE(end = .);
223        __HeapBase = .;
224        . += __heap_size__;
225        __HeapLimit = .;
226        __heap_limit = .; /* Add for _sbrk */
227    } > RAM
228
229    PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit);
230}
231