1 /**
2 ******************************************************************************
3 * @file stm32l5xx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @brief Extended FLASH HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the FLASH extended peripheral:
8 * + Extended programming operations functions
9 *
10 @verbatim
11 ==============================================================================
12 ##### Flash Extended features #####
13 ==============================================================================
14
15 [..] Comparing to other previous devices, the FLASH interface for STM32L5xx
16 devices contains the following additional features
17
18 (+) Capacity up to 512 Kbytes with dual bank architecture supporting read-while-write
19 capability (RWW)
20 (+) Dual bank memory organization with possibility of 128-bits single bank
21 (+) Watermark-based secure area including secure hide areas
22 (+) Block-based secure pages
23
24 ##### How to use this driver #####
25 ==============================================================================
26 [..] This driver provides functions to configure and program the FLASH memory
27 of all STM32L5xx devices. It includes
28 (#) Flash Memory Erase functions:
29 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
30 HAL_FLASH_Lock() functions
31 (++) Erase function: Erase page, mass erase of one or two banks
32 (++) There are two modes of erase :
33 (+++) Polling Mode using HAL_FLASHEx_Erase()
34 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
35
36 (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to :
37 (++) Configure the write protection for each area
38 (++) Set the Read protection Level
39 (++) Program the user Option Bytes
40 (++) Configure the watermark security for each area including secure hide areas
41 (++) Configure the boot lock (BOOT_LOCK)
42 (++) Configure the Boot addresses
43
44 (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to :
45 (++) Get the value of a write protection area
46 (++) Know if the read protection is activated
47 (++) Get the value of the user Option Bytes
48 (++) Get the configuration of a watermark security area including secure hide areas
49 (++) Get the boot lock (BOOT_LOCK) configuration
50 (++) Get the value of a boot address
51
52 (#) Block-based secure area configuration function: Use HAL_FLASHEx_ConfigBBAttributes()
53 (++) Bit-field allowing to secure or un-secure each page
54
55 (#) Get the block-based secure area configuration function: Use HAL_FLASHEx_GetConfigBBAttributes()
56 (++) Returns the configuration of the block-based security for all the pages
57
58 (#) Activation of the secure hide area function: Use HAL_FLASHEx_EnableSecHideProtection()
59 (++) Deny the access to the secure hide area
60
61 (#) Privilege mode configuration function: Use HAL_FLASHEx_ConfigPrivMode()
62 (++) FLASH register can be protected against non-privilege accesses
63
64 (#) Get the privilege mode configuration function: Use HAL_FLASHEx_GetPrivMode()
65 (++) Returns if the FLASH registers are protected against non-privilege accesses
66
67 (#) Security inversion configuration function: Use HAL_FLASHEx_ConfigSecInversion()
68 (++) FLASH secure state can be override
69
70 (#) Get the security inversion configuration function: Use HAL_FLASHEx_GetSecInversion()
71 (++) Returns if FLASH secure state is override
72
73 (#) LVE pin management configuration function: Use HAL_FLASHEx_ConfigLVEPin()
74 (++) LVE FLASH pin can be controlled either by power controller or enforced
75 to low in order to use external SMPS
76
77 (#) Get LVE pin management configuration function: Use HAL_FLASHEx_GetLVEPin()
78 (++) Returns if LVE FLASH pin is controlled by power controller or enforced to low
79
80 @endverbatim
81 ******************************************************************************
82 * @attention
83 *
84 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
85 * All rights reserved.</center></h2>
86 *
87 * This software component is licensed by ST under BSD 3-Clause license,
88 * the "License"; You may not use this file except in compliance with the
89 * License. You may obtain a copy of the License at:
90 * opensource.org/licenses/BSD-3-Clause
91 *
92 ******************************************************************************
93 */
94
95 /* Includes ------------------------------------------------------------------*/
96 #include "stm32l5xx_hal.h"
97
98 /** @addtogroup STM32L5xx_HAL_Driver
99 * @{
100 */
101
102 /** @defgroup FLASHEx FLASHEx
103 * @brief FLASH Extended HAL module driver
104 * @{
105 */
106
107 #ifdef HAL_FLASH_MODULE_ENABLED
108
109 /* Private typedef -----------------------------------------------------------*/
110 /* Private define ------------------------------------------------------------*/
111 /* Private macro -------------------------------------------------------------*/
112 /* Private variables ---------------------------------------------------------*/
113 /* Private function prototypes -----------------------------------------------*/
114 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
115 * @{
116 */
117 static void FLASH_MassErase(uint32_t Banks);
118 static void FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRPEndOffset);
119 static void FLASH_OB_RDPConfig(uint32_t RDPLevel);
120 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig);
121 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
122 static void FLASH_OB_WMSECConfig(uint32_t WMSecConfig, uint32_t WMSecStartPage, uint32_t WMSecEndPage, uint32_t WMHDPEndPage);
123 static void FLASH_OB_BootLockConfig(uint32_t BootLockConfig);
124 #endif
125 static void FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig, uint32_t BootAddr);
126 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRPEndOffset);
127 static uint32_t FLASH_OB_GetRDP(void);
128 static uint32_t FLASH_OB_GetUser(void);
129 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
130 static void FLASH_OB_GetWMSEC(uint32_t * WMSecConfig, uint32_t * WMSecStartPage, uint32_t * WMSecEndPage, uint32_t * WMHDPEndPage);
131 static uint32_t FLASH_OB_GetBootLock(void);
132 #endif
133 static void FLASH_OB_GetBootAddr(uint32_t BootAddrConfig, uint32_t * BootAddr);
134 /**
135 * @}
136 */
137
138 /* Exported functions -------------------------------------------------------*/
139 /** @defgroup FLASHEx_Exported_Functions FLASH Extended Exported Functions
140 * @{
141 */
142
143 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended Programming Operation functions
144 * @brief Extended Programming Operation functions
145 *
146 @verbatim
147 ===============================================================================
148 ##### Extended Programming Operation functions #####
149 ===============================================================================
150 [..]
151 This subsection provides a set of functions allowing to manage the Extended FLASH
152 programming operations Operations.
153
154 @endverbatim
155 * @{
156 */
157
158 /**
159 * @brief Perform a mass erase or erase the specified FLASH memory pages.
160 * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
161 * contains the configuration information for the erasing.
162 *
163 * @param[out] PageError pointer to variable that contains the configuration
164 * information on faulty page in case of error (0xFFFFFFFF means that all
165 * the pages have been correctly erased)
166 *
167 * @retval HAL Status
168 */
HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef * pEraseInit,uint32_t * PageError)169 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
170 {
171 HAL_StatusTypeDef status;
172 uint32_t page_index;
173 __IO uint32_t *reg;
174
175 /* Check the parameters */
176 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
177
178 /* Process Locked */
179 __HAL_LOCK(&pFlash);
180
181 /* Reset error code */
182 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
183
184 /* Wait for last operation to be completed */
185 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
186
187 if (status == HAL_OK)
188 {
189 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
190
191 reg = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH_NS->NSCR);
192
193 if ((pFlash.ProcedureOnGoing & ~(FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
194 {
195 /* Mass erase to be done */
196 FLASH_MassErase(pEraseInit->Banks);
197
198 /* Wait for last operation to be completed */
199 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
200 }
201 else
202 {
203 /*Initialization of PageError variable*/
204 *PageError = 0xFFFFFFFFU;
205
206 for(page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++)
207 {
208 FLASH_PageErase(page_index, pEraseInit->Banks);
209
210 /* Wait for last operation to be completed */
211 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
212
213 if (status != HAL_OK)
214 {
215 /* In case of error, stop erase procedure and return the faulty page */
216 *PageError = page_index;
217 break;
218 }
219 }
220 }
221
222 /* If the erase operation is completed, disable the associated bits */
223 CLEAR_BIT((*reg), (pFlash.ProcedureOnGoing & ~(FLASH_NON_SECURE_MASK)));
224 }
225
226 /* Process Unlocked */
227 __HAL_UNLOCK(&pFlash);
228
229 return status;
230 }
231
232 /**
233 * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled.
234 * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
235 * contains the configuration information for the erasing.
236 *
237 * @retval HAL Status
238 */
HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef * pEraseInit)239 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
240 {
241 HAL_StatusTypeDef status;
242 __IO uint32_t *reg_cr;
243
244 /* Check the parameters */
245 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
246
247 /* Process Locked */
248 __HAL_LOCK(&pFlash);
249
250 /* Reset error code */
251 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
252
253 /* Wait for last operation to be completed */
254 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
255
256 if (status != HAL_OK)
257 {
258 /* Process Unlocked */
259 __HAL_UNLOCK(&pFlash);
260 }
261 else
262 {
263 /* Set internal variables used by the IRQ handler */
264 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
265 pFlash.Bank = pEraseInit->Banks;
266
267 /* Access to SECCR or NSCR depends on operation type */
268 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH->NSCR);
269
270 /* Enable End of Operation and Error interrupts */
271 (*reg_cr) |= (FLASH_IT_EOP | FLASH_IT_OPERR);
272
273 if ((pFlash.ProcedureOnGoing & ~(FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
274 {
275 /* Mass erase to be done */
276 FLASH_MassErase(pEraseInit->Banks);
277 }
278 else
279 {
280 /* Erase by page to be done */
281 pFlash.NbPagesToErase = pEraseInit->NbPages;
282 pFlash.Page = pEraseInit->Page;
283
284 /*Erase 1st page and wait for IT */
285 FLASH_PageErase(pEraseInit->Page, pEraseInit->Banks);
286 }
287 }
288
289 return status;
290 }
291
292 /**
293 * @brief Program Option bytes.
294 * @param pOBInit pointer to an FLASH_OBInitStruct structure that
295 * contains the configuration information for the programming.
296 *
297 * @note To configure any option bytes, the option lock bit OPTLOCK must be
298 * cleared with the call of HAL_FLASH_OB_Unlock() function.
299 * @note New option bytes configuration will be taken into account in two cases:
300 * - after an option bytes launch through the call of HAL_FLASH_OB_Launch()
301 * - after a power reset (BOR reset or exit from Standby/Shutdown modes)
302 *
303 * @retval HAL Status
304 */
HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef * pOBInit)305 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
306 {
307 HAL_StatusTypeDef status;
308
309 /* Check the parameters */
310 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
311
312 /* Process Locked */
313 __HAL_LOCK(&pFlash);
314
315 /* Reset error code */
316 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
317
318 /* Wait for last operation to be completed */
319 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
320
321 if(status == HAL_OK)
322 {
323 /* Write protection configuration */
324 if((pOBInit->OptionType & OPTIONBYTE_WRP) != 0U)
325 {
326 /* Configure of Write protection on the selected area */
327 FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset);
328 }
329
330 /* Read protection configuration */
331 if((pOBInit->OptionType & OPTIONBYTE_RDP) != 0U)
332 {
333 /* Configure the Read protection level */
334 FLASH_OB_RDPConfig(pOBInit->RDPLevel);
335 }
336
337 /* User Configuration */
338 if((pOBInit->OptionType & OPTIONBYTE_USER) != 0U)
339 {
340 /* Configure the user option bytes */
341 FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig);
342 }
343
344 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
345 /* Watermark secure configuration */
346 if((pOBInit->OptionType & OPTIONBYTE_WMSEC) != 0U)
347 {
348 /* Configure the watermark-based secure area */
349 FLASH_OB_WMSECConfig(pOBInit->WMSecConfig, pOBInit->WMSecStartPage, pOBInit->WMSecEndPage, pOBInit->WMHDPEndPage);
350 }
351
352 /* Unique boot entry point configuration */
353 if((pOBInit->OptionType & OPTIONBYTE_BOOT_LOCK) != 0U)
354 {
355 /* Configure the unique boot entry point */
356 FLASH_OB_BootLockConfig(pOBInit->BootLock);
357 }
358 #endif
359
360 /* Boot address configuration */
361 if((pOBInit->OptionType & OPTIONBYTE_BOOTADDR) != 0U)
362 {
363 /* Configure the boot address */
364 FLASH_OB_BootAddrConfig(pOBInit->BootAddrConfig, pOBInit->BootAddr);
365 }
366
367 /* Set OPTSTRT Bit */
368 SET_BIT(FLASH->NSCR, FLASH_NSCR_OPTSTRT);
369
370 /* Wait for last operation to be completed */
371 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
372 }
373
374 /* Process Unlocked */
375 __HAL_UNLOCK(&pFlash);
376
377 return status;
378 }
379
380 /**
381 * @brief Get the Option bytes configuration.
382 * @param pOBInit pointer to an FLASH_OBInitStruct structure that contains the
383 * configuration information.
384 * @note The fields pOBInit->WRPArea, pOBInit->WMSecConfig and pOBInit->BootAddrConfig
385 * should indicate which area/address is requested for the WRP, WM Security or
386 * Boot Address, else no information will be returned
387 *
388 * @retval None
389 */
HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef * pOBInit)390 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
391 {
392 pOBInit->OptionType = (OPTIONBYTE_RDP | OPTIONBYTE_USER);
393
394 if((pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAB) ||
395 (pOBInit->WRPArea == OB_WRPAREA_BANK2_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK2_AREAB))
396 {
397 pOBInit->OptionType |= OPTIONBYTE_WRP;
398 /* Get write protection on the selected area */
399 FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset));
400 }
401
402 /* Get Read protection level */
403 pOBInit->RDPLevel = FLASH_OB_GetRDP();
404
405 /* Get the user option bytes */
406 pOBInit->USERConfig = FLASH_OB_GetUser();
407
408 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
409 /* Get the configuration of the watermark secure area for the selected area */
410 if ((pOBInit->WMSecConfig == OB_WMSEC_AREA1) || (pOBInit->WMSecConfig == OB_WMSEC_AREA2))
411 {
412 pOBInit->OptionType |= OPTIONBYTE_WMSEC;
413 FLASH_OB_GetWMSEC(&(pOBInit->WMSecConfig), &(pOBInit->WMSecStartPage), &(pOBInit->WMSecEndPage), &(pOBInit->WMHDPEndPage));
414 }
415
416 pOBInit->OptionType |= OPTIONBYTE_BOOT_LOCK;
417
418 /* Get the configuration of the unique boot entry point */
419 pOBInit->BootLock = FLASH_OB_GetBootLock();
420 #endif
421
422 /* Get the value of the selected boot address */
423 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
424 if ((pOBInit->BootAddrConfig == OB_BOOTADDR_NS0) || (pOBInit->BootAddrConfig == OB_BOOTADDR_NS1) ||
425 (pOBInit->BootAddrConfig == OB_BOOTADDR_SEC0))
426 #else
427 if ((pOBInit->BootAddrConfig == OB_BOOTADDR_NS0) || (pOBInit->BootAddrConfig == OB_BOOTADDR_NS1))
428 #endif
429 {
430 pOBInit->OptionType |= OPTIONBYTE_BOOTADDR;
431 FLASH_OB_GetBootAddr(pOBInit->BootAddrConfig, &(pOBInit->BootAddr));
432 }
433 }
434
435 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
436 /**
437 * @brief Configure the block-based secure area.
438 *
439 * @param pBBAttributes pointer to an FLASH_BBAttributesTypeDef structure that
440 * contains the configuration information for the programming.
441 *
442 * @retval HAL Status
443 */
HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)444 HAL_StatusTypeDef HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
445 {
446 HAL_StatusTypeDef status;
447 uint8_t index;
448 __IO uint32_t *reg;
449
450 /* Check the parameters */
451 assert_param(IS_FLASH_BANK_EXCLUSIVE(pBBAttributes->Bank));
452
453 /* Wait for last operation to be completed */
454 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
455
456 if (status == HAL_OK)
457 {
458 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
459 {
460 if (pBBAttributes->Bank == FLASH_BANK_1)
461 {
462 reg = &(FLASH->SECBB1R1);
463 }
464 else
465 {
466 reg = &(FLASH->SECBB2R1);
467 }
468
469 /* Modify the register values and check that new attributes are taken in account */
470 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
471 {
472 *reg = pBBAttributes->BBAttributes_array[index];
473 if (*reg != pBBAttributes->BBAttributes_array[index])
474 {
475 status = HAL_ERROR;
476 }
477 reg++;
478 }
479 }
480
481 /* ISB instruction is called to be sure next instructions are performed with correct attributes */
482 __ISB();
483 }
484
485 /* Process Unlocked */
486 __HAL_UNLOCK(&pFlash);
487
488 return status;
489 }
490
491 /**
492 * @brief Return the block-based secure area.
493 *
494 * @param pBBAttributes [in/out] pointer to an FLASH_BBAttributesTypeDef structure
495 * that contains theconfiguration information.
496 * @note The fields pBBAttributes->BBSecConfig should indicate which area is requested
497 * for the block-based security, else no information will be returned
498 *
499 * @retval None
500 */
HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)501 void HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
502 {
503 uint8_t index;
504 __IO uint32_t *reg;
505
506 /* Check the parameters */
507 assert_param(IS_FLASH_BANK_EXCLUSIVE(pBBAttributes->Bank));
508
509 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
510 {
511 if (pBBAttributes->Bank == FLASH_BANK_1)
512 {
513 reg = &(FLASH->SECBB1R1);
514 }
515 else
516 {
517 reg = &(FLASH->SECBB2R1);
518 }
519
520 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
521 {
522 pBBAttributes->BBAttributes_array[index] = *reg;
523 reg++;
524 }
525 }
526 }
527
528 /**
529 * @brief Activation of the protection of the secure hide area.
530 *
531 * @param Banks indicate the bank concerned by the activation
532 * This parameter can be one of the following values:
533 * @arg FLASH_BANK_1: Bank1
534 * @arg FLASH_BANK_2: Bank2
535 * @arg FLASH_BANK_BOTH: Bank1 & Bank2
536 *
537 * @retval None
538 */
HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks)539 void HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks)
540 {
541 /* Check the parameters */
542 assert_param(IS_FLASH_BANK(Banks));
543
544 if ((Banks & FLASH_BANK_1) != 0U)
545 {
546 SET_BIT(FLASH->SECHDPCR, FLASH_SECHDPCR_HDP1_ACCDIS);
547 }
548 if((Banks & FLASH_BANK_2) != 0U)
549 {
550 SET_BIT(FLASH->SECHDPCR, FLASH_SECHDPCR_HDP2_ACCDIS);
551 }
552 }
553 #endif
554
555 /**
556 * @}
557 */
558
559 /** @defgroup FLASHEx_Exported_Functions_Group2 Extended Peripheral Control functions
560 * @brief Extended Peripheral Control functions
561 *
562 @verbatim
563 ===============================================================================
564 ##### Extended Peripheral Control functions #####
565 ===============================================================================
566 [..]
567 This subsection provides a set of functions allowing to control the FLASH
568 memory operations.
569
570 @endverbatim
571 * @{
572 */
573
574 /**
575 * @brief Configuration of the privilege attribute.
576 *
577 * @param PrivMode indicate privilege mode configuration
578 * This parameter can be one of the following values:
579 * @arg FLASH_PRIV_GRANTED: access to Flash registers is granted
580 * @arg FLASH_PRIV_DENIED: access to Flash registers is denied to non-privilege access
581 *
582 * @retval None
583 */
HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)584 void HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)
585 {
586 /* Check the parameters */
587 assert_param(IS_FLASH_CFGPRIVMODE(PrivMode));
588
589 MODIFY_REG(FLASH->PRIVCFGR, FLASH_PRIVCFGR_PRIV, PrivMode);
590 }
591
592 /**
593 * @brief Return the value of the privilege attribute.
594 *
595 * @retval It indicates privilege mode configuration.
596 * This return value can be one of the following values:
597 * @arg FLASH_PRIV_GRANTED: access to Flash registers is granted
598 * @arg FLASH_PRIV_DENIED: access to Flash registers is denied to non-privilege access
599 */
HAL_FLASHEx_GetPrivMode(void)600 uint32_t HAL_FLASHEx_GetPrivMode(void)
601 {
602 return (FLASH->PRIVCFGR & FLASH_PRIVCFGR_PRIV);
603 }
604
605 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
606 /**
607 * @brief Configuration of the security inversion.
608 *
609 * @param SecInvState indicate the flash security state configuration
610 * This parameter can be one of the following values:
611 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
612 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
613 *
614 * @retval HAL Status
615 */
HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)616 HAL_StatusTypeDef HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)
617 {
618 HAL_StatusTypeDef status;
619
620 /* Check the parameters */
621 assert_param(IS_FLASH_CFGSECINV(SecInvState));
622
623 /* Process Locked */
624 __HAL_LOCK(&pFlash);
625
626 /* Wait for last operation to be completed */
627 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
628
629 if (status == HAL_OK)
630 {
631 MODIFY_REG(FLASH->SECCR, FLASH_SECCR_SECINV, SecInvState);
632 }
633
634 /* Process Unlocked */
635 __HAL_UNLOCK(&pFlash);
636
637 return status;
638 }
639
640 /**
641 * @brief Return the value of the security inversion.
642 *
643 * @retval It indicates the flash security state configuration
644 * This return value can be one of the following values:
645 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
646 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
647 */
HAL_FLASHEx_GetSecInversion(void)648 uint32_t HAL_FLASHEx_GetSecInversion(void)
649 {
650 return (FLASH->SECCR & FLASH_SECCR_SECINV);
651 }
652 #endif
653
654 /**
655 * @brief Configuration of the LVE pin management.
656 *
657 * @param ConfigLVE indicate the LVE pin management configuration
658 * This parameter can be one of the following values:
659 * @arg FLASH_LVE_PIN_CTRL: LVEA/B FLASH pin controlled by power controller
660 * @arg FLASH_LVE_PIN_FORCED: LVEA/B FLASH pin enforced to low
661 *
662 * @retval HAL Status
663 */
HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE)664 HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE)
665 {
666 HAL_StatusTypeDef status;
667
668 /* Check the parameters */
669 assert_param(IS_FLASH_CFGLVEPIN(ConfigLVE));
670
671 /* Process Locked */
672 __HAL_LOCK(&pFlash);
673
674 /* Wait for last operation to be completed */
675 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
676
677 if (status == HAL_OK)
678 {
679 /* Check that the voltage scaling is range 2 */
680 if (HAL_PWREx_GetVoltageRange() == PWR_REGULATOR_VOLTAGE_SCALE2)
681 {
682 /* Unlock the bit LVEN */
683 FLASH->LVEKEYR = FLASH_LVEKEY1;
684 FLASH->LVEKEYR = FLASH_LVEKEY2;
685
686 /* Modify the value of LVEN bit */
687 MODIFY_REG(FLASH->ACR, FLASH_ACR_LVEN, ConfigLVE);
688
689 /* Check that the bit has been correctly configured */
690 if (READ_BIT(FLASH->ACR, FLASH_ACR_LVEN) != ConfigLVE)
691 {
692 status = HAL_ERROR;
693 }
694 }
695 else
696 {
697 /* Not allow to force Flash LVE pin if not in voltage range 2 */
698 status = HAL_ERROR;
699 }
700 }
701
702 /* Process Unlocked */
703 __HAL_UNLOCK(&pFlash);
704
705 return status;
706 }
707
708 /**
709 * @brief Return the value of the LVE pin management.
710 *
711 * @retval It indicates the LVE pin management configuration
712 * This return value can be one of the following values:
713 * @arg FLASH_LVE_PIN_CTRL: LVEA/B FLASH pin controlled by power controller
714 * @arg FLASH_LVE_PIN_FORCED: LVEA/B FLASH pin enforces to low
715 */
HAL_FLASHEx_GetLVEPin(void)716 uint32_t HAL_FLASHEx_GetLVEPin(void)
717 {
718 return (FLASH->ACR & FLASH_ACR_LVEN);
719 }
720
721 /**
722 * @}
723 */
724
725 /**
726 * @}
727 */
728
729 /* Private functions ---------------------------------------------------------*/
730
731 /** @addtogroup FLASHEx_Private_Functions
732 * @{
733 */
734 /**
735 * @brief Mass erase of FLASH memory.
736 * @param Banks Banks to be erased
737 * This parameter can be one of the following values:
738 * @arg FLASH_BANK_1: Bank1 to be erased
739 * @arg FLASH_BANK_2: Bank2 to be erased
740 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
741 * @retval None
742 */
FLASH_MassErase(uint32_t Banks)743 static void FLASH_MassErase(uint32_t Banks)
744 {
745 __IO uint32_t *reg;
746
747 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
748 uint32_t primask_bit;
749
750 /* Disable interrupts to avoid any interruption */
751 primask_bit = __get_PRIMASK();
752 __disable_irq();
753 #endif
754
755 /* Access to SECCR or NSCR registers depends on operation type */
756 reg = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH_NS->NSCR);
757
758 if (READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) != 0U)
759 {
760 /* Check the parameters */
761 assert_param(IS_FLASH_BANK(Banks));
762
763 /* Set the Mass Erase Bit for the bank 1 if requested */
764 if((Banks & FLASH_BANK_1) != 0U)
765 {
766 SET_BIT((*reg), FLASH_NSCR_NSMER1);
767 }
768
769 /* Set the Mass Erase Bit for the bank 2 if requested */
770 if((Banks & FLASH_BANK_2) != 0U)
771 {
772 SET_BIT((*reg), FLASH_NSCR_NSMER2);
773 }
774 }
775 else
776 {
777 SET_BIT((*reg), (FLASH_NSCR_NSMER1 | FLASH_NSCR_NSMER2));
778 }
779
780 /* Proceed to erase all sectors */
781 SET_BIT((*reg), FLASH_NSCR_NSSTRT);
782
783 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
784 /* Re-enable the interrupts */
785 __set_PRIMASK(primask_bit);
786 #endif
787 }
788
789 /**
790 * @brief Erase the specified FLASH memory page.
791 * @param Page FLASH page to erase
792 * This parameter must be a value between 0 and (max number of pages in the bank - 1)
793 * @param Banks Bank(s) where the page will be erased
794 * This parameter can be one of the following values:
795 * @arg FLASH_BANK_1: Page in bank 1 to be erased
796 * @arg FLASH_BANK_2: Page in bank 2 to be erased
797 * @retval None
798 */
FLASH_PageErase(uint32_t Page,uint32_t Banks)799 void FLASH_PageErase(uint32_t Page, uint32_t Banks)
800 {
801 __IO uint32_t *reg;
802 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
803 uint32_t primask_bit;
804 #endif
805 /* Check the parameters */
806 assert_param(IS_FLASH_PAGE(Page));
807
808 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
809 /* Disable interrupts to avoid any interruption */
810 primask_bit = __get_PRIMASK();
811 __disable_irq();
812 #endif
813
814 /* Access to SECCR or NSCR registers depends on operation type */
815 reg = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH_NS->NSCR);
816
817 if(READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) == 0U)
818 {
819 CLEAR_BIT((*reg), FLASH_NSCR_NSBKER);
820 }
821 else
822 {
823 assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks));
824
825 if((Banks & FLASH_BANK_1) != 0U)
826 {
827 CLEAR_BIT((*reg), FLASH_NSCR_NSBKER);
828 }
829 else
830 {
831 SET_BIT((*reg), FLASH_NSCR_NSBKER);
832 }
833 }
834
835 /* Proceed to erase the page */
836 MODIFY_REG((*reg), (FLASH_NSCR_NSPNB | FLASH_NSCR_NSPER), ((Page << FLASH_NSCR_NSPNB_Pos) | FLASH_NSCR_NSPER));
837 SET_BIT((*reg), FLASH_NSCR_NSSTRT);
838
839 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
840 /* Re-enable the interrupts */
841 __set_PRIMASK(primask_bit);
842 #endif
843 }
844
845 /**
846 * @brief Configure the write protection of the desired pages.
847 *
848 * @note When the memory read protection level is selected (RDP level = 1),
849 * it is not possible to program or erase Flash memory if the CPU debug
850 * features are connected (JTAG or single wire) or boot code is being
851 * executed from RAM or System flash, even if WRP is not activated.
852 * @note To configure the WRP options, the option lock bit OPTLOCK must be
853 * cleared with the call of the HAL_FLASH_OB_Unlock() function.
854 * @note To validate the WRP options, the option bytes must be reloaded
855 * through the call of the HAL_FLASH_OB_Launch() function.
856 *
857 * @param WRPArea specifies the area to be configured.
858 * This parameter can be one of the following values:
859 * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A
860 * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B
861 * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A
862 * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B
863 *
864 * @param WRPStartOffset specifies the start page of the write protected area
865 * This parameter can be page number between 0 and (max number of pages in the bank - 1)
866 *
867 * @param WRPEndOffset specifies the end page of the write protected area
868 * This parameter can be page number between WRPStartOffset and (max number of pages in the bank - 1)
869 *
870 * @retval None
871 */
FLASH_OB_WRPConfig(uint32_t WRPArea,uint32_t WRPStartOffset,uint32_t WRPEndOffset)872 static void FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRPEndOffset)
873 {
874 /* Check the parameters */
875 assert_param(IS_OB_WRPAREA(WRPArea));
876 assert_param(IS_FLASH_PAGE(WRPStartOffset));
877 assert_param(IS_FLASH_PAGE(WRPEndOffset));
878
879 /* Configure the write protected area */
880 if(WRPArea == OB_WRPAREA_BANK1_AREAA)
881 {
882 MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_PSTRT | FLASH_WRP1AR_WRP1A_PEND),
883 (WRPStartOffset | (WRPEndOffset << FLASH_WRP1AR_WRP1A_PEND_Pos)));
884 }
885 else if(WRPArea == OB_WRPAREA_BANK1_AREAB)
886 {
887 MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_PSTRT | FLASH_WRP1BR_WRP1B_PEND),
888 (WRPStartOffset | (WRPEndOffset << FLASH_WRP1BR_WRP1B_PEND_Pos)));
889 }
890 else if(WRPArea == OB_WRPAREA_BANK2_AREAA)
891 {
892 MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_PSTRT | FLASH_WRP2AR_WRP2A_PEND),
893 (WRPStartOffset | (WRPEndOffset << FLASH_WRP2AR_WRP2A_PEND_Pos)));
894 }
895 else if(WRPArea == OB_WRPAREA_BANK2_AREAB)
896 {
897 MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_PSTRT | FLASH_WRP2BR_WRP2B_PEND),
898 (WRPStartOffset | (WRPEndOffset << FLASH_WRP2BR_WRP2B_PEND_Pos)));
899 }
900 else
901 {
902 /* Empty statement (to be compliant MISRA 15.7) */
903 }
904 }
905
906 /**
907 * @brief Set the read protection level.
908 *
909 * @note To configure the RDP level, the option lock bit OPTLOCK must be
910 * cleared with the call of the HAL_FLASH_OB_Unlock() function.
911 * @note To validate the RDP level, the option bytes must be reloaded
912 * through the call of the HAL_FLASH_OB_Launch() function.
913 * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible
914 * to go back to other levels !!!
915 *
916 * @param RDPLevel specifies the read protection level.
917 * This parameter can be one of the following values:
918 * @arg OB_RDP_LEVEL_0: No protection
919 * @arg OB_RDP_LEVEL_0_5: No debug access to secure area
920 * @arg OB_RDP_LEVEL_1: Read protection of the memory
921 * @arg OB_RDP_LEVEL_2: Full chip protection
922 *
923 * @retval None
924 */
FLASH_OB_RDPConfig(uint32_t RDPLevel)925 static void FLASH_OB_RDPConfig(uint32_t RDPLevel)
926 {
927 /* Check the parameters */
928 assert_param(IS_OB_RDP_LEVEL(RDPLevel));
929
930 /* Configure the RDP level in the option bytes register */
931 MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel);
932 }
933
934 /**
935 * @brief Program the FLASH User Option Byte.
936 *
937 * @note To configure the user option bytes, the option lock bit OPTLOCK must
938 * be cleared with the call of the HAL_FLASH_OB_Unlock() function.
939 * @note To validate the user option bytes, the option bytes must be reloaded
940 * through the call of the HAL_FLASH_OB_Launch() function.
941 *
942 * @param UserType The FLASH User Option Bytes to be modified
943 * This parameter can be a combination of @ref FLASH_OB_USER_Type
944 * @param UserConfig The FLASH User Option Bytes values.
945 * It can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
946 * @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY,
947 * @ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW,
948 * @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY,
949 * @ref FLASH_OB_USER_WWDG_SW, @ref OB_USER_SWAP_BANK,
950 * @ref FLASH_OB_USER_DUALBANK, @ref FLASH_OB_USER_DBANK,
951 * @ref FLASH_OB_USER_SRAM2_PAR, @ref FLASH_OB_USER_SRAM2_RST,
952 * @ref OB_USER_nSWBOOT0, @ref OB_USER_nBOOT0, @ref FLASH_OB_USER_PA15_PUPEN
953 * and @ref OB_USER_TZEN
954 *
955 * @retval None
956 */
FLASH_OB_UserConfig(uint32_t UserType,uint32_t UserConfig)957 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig)
958 {
959 uint32_t optr_reg_val = 0;
960 uint32_t optr_reg_mask = 0;
961
962 /* Check the parameters */
963 assert_param(IS_OB_USER_TYPE(UserType));
964
965 if((UserType & OB_USER_BOR_LEV) != 0U)
966 {
967 /* BOR level option byte should be modified */
968 assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV));
969
970 /* Set value and mask for BOR level option byte */
971 optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV);
972 optr_reg_mask |= FLASH_OPTR_BOR_LEV;
973 }
974
975 if((UserType & OB_USER_nRST_STOP) != 0U)
976 {
977 /* nRST_STOP option byte should be modified */
978 assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP));
979
980 /* Set value and mask for nRST_STOP option byte */
981 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP);
982 optr_reg_mask |= FLASH_OPTR_nRST_STOP;
983 }
984
985 if((UserType & OB_USER_nRST_STDBY) != 0U)
986 {
987 /* nRST_STDBY option byte should be modified */
988 assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY));
989
990 /* Set value and mask for nRST_STDBY option byte */
991 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY);
992 optr_reg_mask |= FLASH_OPTR_nRST_STDBY;
993 }
994
995 if((UserType & OB_USER_nRST_SHDW) != 0U)
996 {
997 /* nRST_SHDW option byte should be modified */
998 assert_param(IS_OB_USER_SHUTDOWN(UserConfig & FLASH_OPTR_nRST_SHDW));
999
1000 /* Set value and mask for nRST_SHDW option byte */
1001 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_SHDW);
1002 optr_reg_mask |= FLASH_OPTR_nRST_SHDW;
1003 }
1004
1005 if((UserType & OB_USER_IWDG_SW) != 0U)
1006 {
1007 /* IWDG_SW option byte should be modified */
1008 assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW));
1009
1010 /* Set value and mask for IWDG_SW option byte */
1011 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW);
1012 optr_reg_mask |= FLASH_OPTR_IWDG_SW;
1013 }
1014
1015 if((UserType & OB_USER_IWDG_STOP) != 0U)
1016 {
1017 /* IWDG_STOP option byte should be modified */
1018 assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP));
1019
1020 /* Set value and mask for IWDG_STOP option byte */
1021 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP);
1022 optr_reg_mask |= FLASH_OPTR_IWDG_STOP;
1023 }
1024
1025 if((UserType & OB_USER_IWDG_STDBY) != 0U)
1026 {
1027 /* IWDG_STDBY option byte should be modified */
1028 assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY));
1029
1030 /* Set value and mask for IWDG_STDBY option byte */
1031 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY);
1032 optr_reg_mask |= FLASH_OPTR_IWDG_STDBY;
1033 }
1034
1035 if((UserType & OB_USER_WWDG_SW) != 0U)
1036 {
1037 /* WWDG_SW option byte should be modified */
1038 assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW));
1039
1040 /* Set value and mask for WWDG_SW option byte */
1041 optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW);
1042 optr_reg_mask |= FLASH_OPTR_WWDG_SW;
1043 }
1044
1045 if((UserType & OB_USER_SWAP_BANK) != 0U)
1046 {
1047 /* SWAP_BANK option byte should be modified */
1048 assert_param(IS_OB_USER_SWAP_BANK(UserConfig & FLASH_OPTR_SWAP_BANK));
1049
1050 /* Set value and mask for SWAP_BANK option byte */
1051 optr_reg_val |= (UserConfig & FLASH_OPTR_SWAP_BANK);
1052 optr_reg_mask |= FLASH_OPTR_SWAP_BANK;
1053 }
1054
1055 if((UserType & OB_USER_DUALBANK) != 0U)
1056 {
1057 /* DUALBANK option byte should be modified */
1058 assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DB256K));
1059
1060 /* Set value and mask for DB256K option byte */
1061 optr_reg_val |= (UserConfig & FLASH_OPTR_DB256K);
1062 optr_reg_mask |= FLASH_OPTR_DB256K;
1063 }
1064
1065 if((UserType & OB_USER_SRAM2_PE) != 0U)
1066 {
1067 /* SRAM2_PAR option byte should be modified */
1068 assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE));
1069
1070 /* Set value and mask for SRAM2_PAR option byte */
1071 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE);
1072 optr_reg_mask |= FLASH_OPTR_SRAM2_PE;
1073 }
1074
1075 if((UserType & OB_USER_SRAM2_RST) != 0U)
1076 {
1077 /* SRAM2_RST option byte should be modified */
1078 assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST));
1079
1080 /* Set value and mask for SRAM2_RST option byte */
1081 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST);
1082 optr_reg_mask |= FLASH_OPTR_SRAM2_RST;
1083 }
1084
1085 if((UserType & OB_USER_nSWBOOT0) != 0U)
1086 {
1087 /* nSWBOOT0 option byte should be modified */
1088 assert_param(IS_OB_USER_SWBOOT0(UserConfig & FLASH_OPTR_nSWBOOT0));
1089
1090 /* Set value and mask for nSWBOOT0 option byte */
1091 optr_reg_val |= (UserConfig & FLASH_OPTR_nSWBOOT0);
1092 optr_reg_mask |= FLASH_OPTR_nSWBOOT0;
1093 }
1094
1095 if((UserType & OB_USER_nBOOT0) != 0U)
1096 {
1097 /* nBOOT0 option byte should be modified */
1098 assert_param(IS_OB_USER_BOOT0(UserConfig & FLASH_OPTR_nBOOT0));
1099
1100 /* Set value and mask for nBOOT0 option byte */
1101 optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT0);
1102 optr_reg_mask |= FLASH_OPTR_nBOOT0;
1103 }
1104
1105 if((UserType & OB_USER_PA15_PUPEN) != 0U)
1106 {
1107 /* nBOOT0 option byte should be modified */
1108 assert_param(IS_OB_USER_PA15_PUPEN(UserConfig & FLASH_OPTR_PA15_PUPEN));
1109
1110 /* Set value and mask for nBOOT0 option byte */
1111 optr_reg_val |= (UserConfig & FLASH_OPTR_PA15_PUPEN);
1112 optr_reg_mask |= FLASH_OPTR_PA15_PUPEN;
1113 }
1114
1115 if((UserType & OB_USER_TZEN) != 0U)
1116 {
1117 /* TZEN option byte should be modified */
1118 assert_param(IS_OB_USER_TZEN(UserConfig & FLASH_OPTR_TZEN));
1119
1120 /* Set value and mask for TZEN option byte */
1121 optr_reg_val |= (UserConfig & FLASH_OPTR_TZEN);
1122 optr_reg_mask |= FLASH_OPTR_TZEN;
1123 }
1124
1125 /* Configure the option bytes register */
1126 MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val);
1127 }
1128
1129 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1130 /**
1131 * @brief Configure the watermarked-based secure area.
1132 *
1133 * @param WMSecConfig specifies the area to be configured.
1134 * This parameter can be a combination of the following values:
1135 * @arg OB_WMSEC_AREA1 or @arg OB_WMSEC_AREA2: Select Flash Secure Area 1 or Area 2
1136 * @arg OB_WMSEC_SECURE_AREA_CONFIG: configure Flash Secure Area
1137 * @arg OB_WMSEC_HDP_AREA_CONFIG: configure Flash secure hide Area
1138 * @arg OB_WMSEC_HDP_AREA_ENABLE: enable secure hide Area in Secure Area
1139 * @arg OB_WMSEC_HDP_AREA_DISABLE: disable secure hide Area in Secure Area
1140 *
1141 * @param WMSecStartPage specifies the start page of the secure area
1142 * This parameter can be page number between 0 and (max number of pages in the bank - 1)
1143 *
1144 * @param WMSecEndPage specifies the end page of the secure area
1145 * This parameter can be page number between WMSecStartPage and (max number of pages in the bank - 1)
1146 *
1147 * @param WMHDPEndPage specifies the end page of the secure hide area
1148 * This parameter can be page number between WMSecStartPage and WMPCROPStartPage
1149 *
1150 * @retval None
1151 */
FLASH_OB_WMSECConfig(uint32_t WMSecConfig,uint32_t WMSecStartPage,uint32_t WMSecEndPage,uint32_t WMHDPEndPage)1152 static void FLASH_OB_WMSECConfig(uint32_t WMSecConfig, uint32_t WMSecStartPage, uint32_t WMSecEndPage, uint32_t WMHDPEndPage)
1153 {
1154 uint32_t tmp_secwm1 = 0U, tmp_secwm2 = 0U;
1155
1156 /* Check the parameters */
1157 assert_param(IS_OB_WMSEC_CONFIG(WMSecConfig));
1158 assert_param(IS_OB_WMSEC_AREA_EXCLUSIVE(WMSecConfig & 0x3U));
1159 assert_param(IS_FLASH_PAGE(WMSecStartPage));
1160 assert_param(IS_FLASH_PAGE(WMSecEndPage));
1161 assert_param(IS_FLASH_PAGE(WMHDPEndPage));
1162
1163 /* Read SECWM registers */
1164 if ((WMSecConfig & OB_WMSEC_AREA1) != 0U)
1165 {
1166 tmp_secwm1 = FLASH->SECWM1R1;
1167 tmp_secwm2 = FLASH->SECWM1R2;
1168 }
1169 else if ((WMSecConfig & OB_WMSEC_AREA2) != 0U)
1170 {
1171 tmp_secwm1 = FLASH->SECWM2R1;
1172 tmp_secwm2 = FLASH->SECWM2R2;
1173 }
1174 else
1175 {
1176 /* Nothing to do */
1177 }
1178
1179 /* Configure Secure Area */
1180 if ((WMSecConfig & OB_WMSEC_SECURE_AREA_CONFIG) != 0U)
1181 {
1182 MODIFY_REG(tmp_secwm1, (FLASH_SECWM1R1_SECWM1_PSTRT | FLASH_SECWM1R1_SECWM1_PEND),
1183 ((WMSecEndPage << FLASH_SECWM1R1_SECWM1_PEND_Pos) | WMSecStartPage));
1184 }
1185
1186 /* Configure Secure Hide Area */
1187 if ((WMSecConfig & OB_WMSEC_HDP_AREA_CONFIG) != 0U)
1188 {
1189 tmp_secwm2 &= (~(FLASH_SECWM1R2_HDP1_PEND));
1190 tmp_secwm2 |= (WMHDPEndPage << FLASH_SECWM1R2_HDP1_PEND_Pos);
1191 }
1192
1193 /* Enable Secure Hide Area */
1194 if ((WMSecConfig & OB_WMSEC_HDP_AREA_ENABLE) != 0U)
1195 {
1196 tmp_secwm2 |= FLASH_SECWM1R2_HDP1EN;
1197 }
1198
1199 /* Disable Secure Hide Area */
1200 if ((WMSecConfig & OB_WMSEC_HDP_AREA_DISABLE) != 0U)
1201 {
1202 tmp_secwm2 &= (~FLASH_SECWM1R2_HDP1EN);
1203 }
1204
1205 /* Write SECWM registers */
1206 if ((WMSecConfig & OB_WMSEC_AREA1) != 0U)
1207 {
1208 FLASH->SECWM1R1 = tmp_secwm1;
1209 FLASH->SECWM1R2 = tmp_secwm2;
1210 }
1211 else if ((WMSecConfig & OB_WMSEC_AREA2) != 0U)
1212 {
1213 FLASH->SECWM2R1 = tmp_secwm1;
1214 FLASH->SECWM2R2 = tmp_secwm2;
1215 }
1216 else
1217 {
1218 /* Nothing to do */
1219 }
1220 }
1221
1222 /**
1223 * @brief Configure the boot lock.
1224 *
1225 * @param BootLockConfig specifies the activation of the BOOT_LOCK.
1226 * This parameter can be one of the following values:
1227 * @arg OB_BOOT_LOCK_DISABLE: Boot Lock mode deactivated
1228 * @arg OB_BOOT_LOCK_ENABLE: Boot Lock mode activated
1229 *
1230 * @retval None
1231 */
FLASH_OB_BootLockConfig(uint32_t BootLockConfig)1232 static void FLASH_OB_BootLockConfig(uint32_t BootLockConfig)
1233 {
1234 /* Check the parameters */
1235 assert_param(IS_OB_BOOT_LOCK(BootLockConfig));
1236
1237 /* Configure the option bytes register */
1238 MODIFY_REG(FLASH->SECBOOTADD0R, FLASH_SECBOOTADD0R_BOOT_LOCK, BootLockConfig);
1239 }
1240 #endif
1241
1242 /**
1243 * @brief Configure the boot address.
1244 *
1245 * @param BootAddrConfig specifies the area to be configured.
1246 * This parameter can be one of the following values:
1247 * @arg OB_BOOTADDR_NS0: Non-secure boot address 0
1248 * @arg OB_BOOTADDR_NS1: Non-secure boot address 1
1249 * @arg OB_BOOTADDR_SEC0: Secure boot address 0
1250 *
1251 * @param BootAddr: specifies the address used for the boot
1252 * This parameter can be page number between 0 and 0xFFFFFF00
1253 *
1254 * @retval None
1255 */
FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig,uint32_t BootAddr)1256 static void FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig, uint32_t BootAddr)
1257 {
1258 /* Check the parameters */
1259 assert_param(IS_OB_BOOTADDR_CONFIG(BootAddrConfig));
1260
1261 if (BootAddrConfig == OB_BOOTADDR_NS0)
1262 {
1263 MODIFY_REG(FLASH->NSBOOTADD0R, FLASH_NSBOOTADD0R_NSBOOTADD0, BootAddr);
1264 }
1265 else if (BootAddrConfig == OB_BOOTADDR_NS1)
1266 {
1267 MODIFY_REG(FLASH->NSBOOTADD1R, FLASH_NSBOOTADD1R_NSBOOTADD1, BootAddr);
1268 }
1269 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1270 else if (BootAddrConfig == OB_BOOTADDR_SEC0)
1271 {
1272 MODIFY_REG(FLASH->SECBOOTADD0R, FLASH_SECBOOTADD0R_SECBOOTADD0, BootAddr);
1273 }
1274 #endif
1275 else
1276 {
1277 /* Empty statement (to be compliant MISRA 15.7) */
1278 }
1279 }
1280
1281 /**
1282 * @brief Return the FLASH Write Protection Option Bytes value.
1283 *
1284 * @param[in] WRPArea specifies the area to be returned.
1285 * This parameter can be one of the following values:
1286 * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A
1287 * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B
1288 * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A
1289 * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B
1290 *
1291 * @param[out] WRPStartOffset specifies the address where to copied the start page
1292 * of the write protected area
1293 *
1294 * @param[out] WRPEndOffset specifies the address where to copied the end page of
1295 * the write protected area
1296 *
1297 * @retval None
1298 */
FLASH_OB_GetWRP(uint32_t WRPArea,uint32_t * WRPStartOffset,uint32_t * WRPEndOffset)1299 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRPEndOffset)
1300 {
1301 /* Get the configuration of the write protected area */
1302 if(WRPArea == OB_WRPAREA_BANK1_AREAA)
1303 {
1304 *WRPStartOffset = READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_PSTRT);
1305 *WRPEndOffset = (READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_PEND) >> FLASH_WRP1AR_WRP1A_PEND_Pos);
1306 }
1307 else if(WRPArea == OB_WRPAREA_BANK1_AREAB)
1308 {
1309 *WRPStartOffset = READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_PSTRT);
1310 *WRPEndOffset = (READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_PEND) >> FLASH_WRP1BR_WRP1B_PEND_Pos);
1311 }
1312 else if(WRPArea == OB_WRPAREA_BANK2_AREAA)
1313 {
1314 *WRPStartOffset = READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_PSTRT);
1315 *WRPEndOffset = (READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_PEND) >> FLASH_WRP2AR_WRP2A_PEND_Pos);
1316 }
1317 else if(WRPArea == OB_WRPAREA_BANK2_AREAB)
1318 {
1319 *WRPStartOffset = READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_PSTRT);
1320 *WRPEndOffset = (READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_PEND) >> FLASH_WRP2BR_WRP2B_PEND_Pos);
1321 }
1322 else
1323 {
1324 /* Empty statement (to be compliant MISRA 15.7) */
1325 }
1326 }
1327
1328 /**
1329 * @brief Return the FLASH Read Protection level.
1330 * @retval FLASH ReadOut Protection Status:
1331 * This return value can be one of the following values:
1332 * @arg OB_RDP_LEVEL_0: No protection
1333 * @arg OB_RDP_LEVEL_0_5: No debug access to secure area
1334 * @arg OB_RDP_LEVEL_1: Read protection of the memory
1335 * @arg OB_RDP_LEVEL_2: Full chip protection
1336 */
FLASH_OB_GetRDP(void)1337 static uint32_t FLASH_OB_GetRDP(void)
1338 {
1339 uint32_t rdp_level = READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP);
1340
1341 if ((rdp_level != OB_RDP_LEVEL_0) && (rdp_level != OB_RDP_LEVEL_0_5) && (rdp_level != OB_RDP_LEVEL_2))
1342 {
1343 return (OB_RDP_LEVEL_1);
1344 }
1345 else
1346 {
1347 return (rdp_level);
1348 }
1349 }
1350
1351 /**
1352 * @brief Return the FLASH User Option Byte value.
1353 * @retval The FLASH User Option Bytes values,
1354 * it can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
1355 * @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY,
1356 * @ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW,
1357 * @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY,
1358 * @ref FLASH_OB_USER_WWDG_SW, @ref OB_USER_SWAP_BANK,
1359 * @ref FLASH_OB_USER_DUALBANK, @ref FLASH_OB_USER_DBANK,
1360 * @ref FLASH_OB_USER_SRAM2_PAR, @ref FLASH_OB_USER_SRAM2_RST,
1361 * @ref OB_USER_nSWBOOT0, @ref OB_USER_nBOOT0, @ref FLASH_OB_USER_PA15_PUPEN
1362 * and @ref OB_USER_TZEN
1363 */
FLASH_OB_GetUser(void)1364 static uint32_t FLASH_OB_GetUser(void)
1365 {
1366 uint32_t user_config = READ_REG(FLASH->OPTR);
1367 CLEAR_BIT(user_config, FLASH_OPTR_RDP);
1368
1369 return user_config;
1370 }
1371
1372 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1373 /**
1374 * @brief Return the watermarked-based secure area.
1375 *
1376 * @param WMSecConfig [in/out] specifies the area to be returned.
1377 * This parameter can be one of the following values:
1378 * @arg OB_WMSEC_AREA1: Flash Secure Area 1
1379 * @arg OB_WMSEC_AREA2: Flash Secure Area 2
1380 * When return from the function, this parameter will have a combination of the following values:
1381 * @arg OB_WMSEC_AREA1 or @arg OB_WMSEC_AREA2: selected Flash Secure Area 1 or Area 2
1382 * @arg OB_WMSEC_HDP_AREA_ENABLE: Secure Hide Area in Secure Area enabled
1383 * @arg OB_WMSEC_HDP_AREA_DISABLE: Secure Hide Area in Secure Area disabled
1384 *
1385 * @param WMSecStartPage [out] specifies the address where to copied the start page of the secure area
1386 *
1387 * @param WMSecEndPage [out] specifies the address where to copied the end page of the secure area
1388 *
1389 * @param WMHDPEndPage [out] specifies the address where to copied the end page of the secure hide area
1390 *
1391 * @retval None
1392 */
FLASH_OB_GetWMSEC(uint32_t * WMSecConfig,uint32_t * WMSecStartPage,uint32_t * WMSecEndPage,uint32_t * WMHDPEndPage)1393 static void FLASH_OB_GetWMSEC(uint32_t * WMSecConfig, uint32_t * WMSecStartPage, uint32_t * WMSecEndPage, uint32_t * WMHDPEndPage)
1394 {
1395 uint32_t tmp_secwm1 = 0U, tmp_secwm2 = 0U;
1396
1397 /* Check the parameters */
1398 assert_param(IS_OB_WMSEC_CONFIG(*WMSecConfig));
1399 assert_param(IS_FLASH_BANK_EXCLUSIVE((*WMSecConfig) & 0x3U));
1400
1401 /* Read SECWM registers */
1402 if (((*WMSecConfig) & OB_WMSEC_AREA1) != 0U)
1403 {
1404 tmp_secwm1 = FLASH->SECWM1R1;
1405 tmp_secwm2 = FLASH->SECWM1R2;
1406 }
1407 else if (((*WMSecConfig) & OB_WMSEC_AREA2) != 0U)
1408 {
1409 tmp_secwm1 = FLASH->SECWM2R1;
1410 tmp_secwm2 = FLASH->SECWM2R2;
1411 }
1412 else
1413 {
1414 /* Nothing to do */
1415 }
1416
1417 /* Configuration of secure area */
1418 *WMSecStartPage = (tmp_secwm1 & FLASH_SECWM1R1_SECWM1_PSTRT);
1419 *WMSecEndPage = ((tmp_secwm1 & FLASH_SECWM1R1_SECWM1_PEND) >> FLASH_SECWM1R1_SECWM1_PEND_Pos);
1420
1421 /* Configuration of secure hide area */
1422 *WMHDPEndPage = ((tmp_secwm2 & FLASH_SECWM1R2_HDP1_PEND) >> FLASH_SECWM1R2_HDP1_PEND_Pos);
1423
1424 if ((tmp_secwm2 & FLASH_SECWM1R2_HDP1EN) == 0U)
1425 {
1426 *WMSecConfig = ((*WMSecConfig) | OB_WMSEC_HDP_AREA_DISABLE);
1427 }
1428 else
1429 {
1430 *WMSecConfig = ((*WMSecConfig) | OB_WMSEC_HDP_AREA_ENABLE);
1431 }
1432 }
1433
1434 /**
1435 * @brief Return the boot lock configuration.
1436 *
1437 * @retval Value of Boot Lock configuration.
1438 * It can be one of the following values:
1439 * @arg OB_BOOT_LOCK_DISABLE: Boot Lock mode deactivated
1440 * @arg OB_BOOT_LOCK_ENABLE: Boot Lock mode activated
1441 */
FLASH_OB_GetBootLock(void)1442 static uint32_t FLASH_OB_GetBootLock(void)
1443 {
1444 return (FLASH->SECBOOTADD0R & FLASH_SECBOOTADD0R_BOOT_LOCK);
1445 }
1446 #endif
1447
1448 /**
1449 * @brief Return the boot address.
1450 *
1451 * @param[in] BootAddrConfig specifies the area to be returned.
1452 * This parameter can be one of the following values:
1453 * @arg OB_BOOTADDR_NS0: Non-secure boot address 0
1454 * @arg OB_BOOTADDR_NS1: Non-secure boot address 1
1455 * @arg OB_BOOTADDR_SEC0: Secure boot address 0
1456 *
1457 * @param[out] BootAddr specifies the boot address value
1458 *
1459 * @retval None
1460 */
FLASH_OB_GetBootAddr(uint32_t BootAddrConfig,uint32_t * BootAddr)1461 static void FLASH_OB_GetBootAddr(uint32_t BootAddrConfig, uint32_t * BootAddr)
1462 {
1463 if (BootAddrConfig == OB_BOOTADDR_NS0)
1464 {
1465 *BootAddr = (FLASH->NSBOOTADD0R & FLASH_NSBOOTADD0R_NSBOOTADD0);
1466 }
1467 else if (BootAddrConfig == OB_BOOTADDR_NS1)
1468 {
1469 *BootAddr = (FLASH->NSBOOTADD1R & FLASH_NSBOOTADD1R_NSBOOTADD1);
1470 }
1471 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1472 else if (BootAddrConfig == OB_BOOTADDR_SEC0)
1473 {
1474 *BootAddr = (FLASH->SECBOOTADD0R & FLASH_SECBOOTADD0R_SECBOOTADD0);
1475 }
1476 #endif
1477 else
1478 {
1479 /* Empty statement (to be compliant MISRA 15.7) */
1480 }
1481 }
1482
1483 /**
1484 * @}
1485 */
1486
1487 /**
1488 * @}
1489 */
1490
1491 #endif /* HAL_FLASH_MODULE_ENABLED */
1492
1493 /**
1494 * @}
1495 */
1496
1497 /**
1498 * @}
1499 */
1500
1501 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1502
