1 /**
2 ******************************************************************************
3 * @file stm32h5xx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @brief Extended FLASH HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the FLASH extension peripheral:
8 * + Extended programming operations functions
9 *
10 ******************************************************************************
11 * @attention
12 *
13 * Copyright (c) 2022 STMicroelectronics.
14 * All rights reserved.
15 *
16 * This software is licensed under terms that can be found in the LICENSE file
17 * in the root directory of this software component.
18 * If no LICENSE file comes with this software, it is provided AS-IS.
19 *
20 ******************************************************************************
21 @verbatim
22 ==============================================================================
23 ##### Flash Extension features #####
24 ==============================================================================
25
26 [..] Comparing to other previous devices, the FLASH interface for STM32H5xx
27 devices contains the following additional features
28
29 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
30 capability (RWW)
31 (+) Dual bank memory organization
32 (+) Product State protection
33 (+) Write protection
34 (+) Secure access only protection
35 (+) Bank / register swapping (when Dual-Bank)
36 (+) Watermark-based secure protection
37 (+) Block-based secure protection
38 (+) Block-based privilege protection
39 (+) Hide Protection areas
40
41 ##### How to use this driver #####
42 ==============================================================================
43 [..] This driver provides functions to configure and program the FLASH memory
44 of all STM32H5xx devices. It includes
45 (#) FLASH Memory Erase functions:
46 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
47 HAL_FLASH_Lock() functions
48 (++) Erase function: Sector erase, bank erase and dual-bank mass erase
49 (++) There are two modes of erase :
50 (+++) Polling Mode using HAL_FLASHEx_Erase()
51 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
52
53 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to:
54 (++) Configure the write protection per bank
55 (++) Set the Product State
56 (++) Program the user Option Bytes
57 (++) Configure the watermark security for each area
58 (++) Configure the Hide protection areas
59 (++) Configure the Boot addresses
60
61 (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to:
62 (++) Get the value of a write protection area
63 (++) Get the Product State
64 (++) Get the value of the user Option Bytes
65 (++) Get the configuration of watermark security areas
66 (++) Get the configuration of Hide protection areas
67 (++) Get the value of a boot address
68
69 (#) Block-based secure / privilege area configuration function: Use HAL_FLASHEx_ConfigBBAttributes()
70 (++) Bit-field allowing to secure or un-secure each sector
71 (++) Bit-field allowing to privilege or un-privilege each sector
72
73 (#) Get the block-based secure / privilege area configuration function: Use HAL_FLASHEx_GetConfigBBAttributes()
74 (++) Return the configuration of the block-based security and privilege for all the sectors
75
76 (#) Privilege mode configuration function: Use HAL_FLASHEx_ConfigPrivMode()
77 (++) FLASH register can be protected against non-privilege accesses
78
79 (#) Get the privilege mode configuration function: Use HAL_FLASHEx_GetPrivMode()
80 (++) Return if the FLASH registers are protected against non-privilege accesses
81
82
83 @endverbatim
84 */
85
86 /* Includes ------------------------------------------------------------------*/
87 #include "stm32h5xx_hal.h"
88
89 /** @addtogroup STM32H5xx_HAL_Driver
90 * @{
91 */
92
93 /** @defgroup FLASHEx FLASHEx
94 * @brief FLASH HAL Extension module driver
95 * @{
96 */
97
98 #ifdef HAL_FLASH_MODULE_ENABLED
99
100 /* Private typedef -----------------------------------------------------------*/
101 /* Private define ------------------------------------------------------------*/
102 /* Private macro -------------------------------------------------------------*/
103 /* Private variables ---------------------------------------------------------*/
104 /* Private function prototypes -----------------------------------------------*/
105 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
106 * @{
107 */
108 static void FLASH_MassErase(uint32_t Banks);
109 #if defined (FLASH_SR_OBKERR)
110 static void FLASH_OBKErase(void);
111 #endif /* FLASH_SR_OBKERR */
112 static void FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
113 static void FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Bank);
114 static void FLASH_OB_GetWRP(uint32_t Bank, uint32_t *WRPState, uint32_t *WRPSector);
115 static void FLASH_OB_ProdStateConfig(uint32_t ProdStateConfig);
116 static uint32_t FLASH_OB_GetProdState(void);
117 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig1, uint32_t UserConfig2);
118 static void FLASH_OB_GetUser(uint32_t *UserConfig1, uint32_t *UserConfig2);
119 static void FLASH_OB_BootAddrConfig(uint32_t BootOption, uint32_t BootAddress);
120 static void FLASH_OB_BootLockConfig(uint32_t BootLockOption, uint32_t BootLockConfig);
121 static void FLASH_OB_GetBootConfig(uint32_t BootOption, uint32_t *BootAddress, uint32_t *BootLockConfig);
122 static void FLASH_OB_OTP_LockConfig(uint32_t OTP_Block);
123 static uint32_t FLASH_OB_OTP_GetLock(void);
124 static void FLASH_OB_HDPConfig(uint32_t Banks, uint32_t HDPStartSector, uint32_t HDPEndSector);
125 static void FLASH_OB_GetHDP(uint32_t Bank, uint32_t *HDPStartSector, uint32_t *HDPEndSector);
126 #if defined(FLASH_EDATAR_EDATA_EN)
127 static void FLASH_OB_EDATAConfig(uint32_t Banks, uint32_t EDATASize);
128 static void FLASH_OB_GetEDATA(uint32_t Bank, uint32_t *EDATASize);
129 #endif /* FLASH_EDATAR_EDATA_EN */
130 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
131 static void FLASH_OB_WMSECConfig(uint32_t Banks, uint32_t WMSecStartSector, uint32_t WMSecEndSector);
132 static void FLASH_OB_GetWMSEC(uint32_t Bank, uint32_t *WMSecStartSector, uint32_t *WMSecEndSector);
133 #endif /* __ARM_FEATURE_CMSE */
134 /**
135 * @}
136 */
137
138 /* Exported functions ---------------------------------------------------------*/
139 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
140 * @{
141 */
142
143 /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Extended IO operation functions
144 * @brief FLASHEx Extended IO operation functions
145 *
146 @verbatim
147 ===============================================================================
148 ##### Extended programming operation functions #####
149 ===============================================================================
150 [..]
151 This subsection provides a set of functions allowing to manage the Extended FLASH
152 programming operations Operations.
153
154 @endverbatim
155 * @{
156 */
157 /**
158 * @brief Perform a mass erase or erase the specified FLASH memory sectors
159 * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
160 * contains the configuration information for the erasing.
161 *
162 * @param[out] SectorError pointer to variable that contains the configuration
163 * information on faulty sector in case of error (0xFFFFFFFF means that all
164 * the sectors have been correctly erased).
165 *
166 * @retval HAL Status
167 */
HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef * pEraseInit,uint32_t * SectorError)168 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
169 {
170 HAL_StatusTypeDef status;
171 uint32_t sector_index;
172 __IO uint32_t *reg_cr;
173
174 /* Check the parameters */
175 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
176
177 /* Process Locked */
178 __HAL_LOCK(&pFlash);
179
180 /* Reset error code */
181 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
182
183 /* Wait for last operation to be completed */
184 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
185
186 if (status == HAL_OK)
187 {
188 /* Current operation type */
189 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
190
191 /* Access to SECCR or NSCR depends on operation type */
192 #if defined (FLASH_OPTSR2_TZEN)
193 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH_NS->NSCR);
194 #else
195 reg_cr = &(FLASH_NS->NSCR);
196 #endif /* FLASH_OPTSR2_TZEN */
197
198 if ((pEraseInit->TypeErase & (~FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
199 {
200 /* Mass erase to be done */
201 FLASH_MassErase(pEraseInit->Banks);
202
203 /* Wait for last operation to be completed */
204 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
205 }
206 #if defined (FLASH_SR_OBKERR)
207 else if (pEraseInit->TypeErase == FLASH_TYPEERASE_OBK_ALT)
208 {
209 /* OBK erase to be done */
210 FLASH_OBKErase();
211
212 /* Wait for last operation to be completed */
213 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
214 }
215 #endif /* FLASH_SR_OBKERR */
216 else
217 {
218 /* Initialization of SectorError variable */
219 *SectorError = 0xFFFFFFFFU;
220
221 /* Erase by sector by sector to be done*/
222 for (sector_index = pEraseInit->Sector; sector_index < (pEraseInit->NbSectors + pEraseInit->Sector); \
223 sector_index++)
224 {
225 FLASH_Erase_Sector(sector_index, pEraseInit->Banks);
226
227 /* Wait for last operation to be completed */
228 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
229
230 if (status != HAL_OK)
231 {
232 /* In case of error, stop erase procedure and return the faulty sector */
233 *SectorError = sector_index;
234 break;
235 }
236 }
237 }
238
239 /* If the erase operation is completed, disable the associated bits */
240 CLEAR_BIT((*reg_cr), (pEraseInit->TypeErase) & (~(FLASH_NON_SECURE_MASK)));
241 }
242
243 /* Process Unlocked */
244 __HAL_UNLOCK(&pFlash);
245
246 return status;
247 }
248
249 /**
250 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
251 * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
252 * contains the configuration information for the erasing.
253 *
254 * @retval HAL Status
255 */
HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef * pEraseInit)256 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
257 {
258 HAL_StatusTypeDef status;
259 __IO uint32_t *reg_cr;
260
261 /* Check the parameters */
262 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
263
264 /* Process Locked */
265 __HAL_LOCK(&pFlash);
266
267 /* Reset error code */
268 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
269
270 /* Wait for last operation to be completed */
271 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
272
273 if (status != HAL_OK)
274 {
275 /* Process Unlocked */
276 __HAL_UNLOCK(&pFlash);
277 }
278 else
279 {
280 /* Set internal variables used by the IRQ handler */
281 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
282 pFlash.Bank = pEraseInit->Banks;
283
284 /* Access to SECCR or NSCR depends on operation type */
285 #if defined (FLASH_OPTSR2_TZEN)
286 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH_NS->NSCR);
287 #else
288 reg_cr = &(FLASH_NS->NSCR);
289 #endif /* FLASH_OPTSR2_TZEN */
290
291 /* Enable End of Operation and Error interrupts */
292 #if defined (FLASH_SR_OBKERR)
293 (*reg_cr) |= (FLASH_IT_EOP | FLASH_IT_WRPERR | FLASH_IT_PGSERR | \
294 FLASH_IT_STRBERR | FLASH_IT_INCERR | FLASH_IT_OBKERR | \
295 FLASH_IT_OBKWERR);
296 #else
297 (*reg_cr) |= (FLASH_IT_EOP | FLASH_IT_WRPERR | FLASH_IT_PGSERR | \
298 FLASH_IT_STRBERR | FLASH_IT_INCERR);
299 #endif /* FLASH_SR_OBKERR */
300
301 if ((pEraseInit->TypeErase & (~FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
302 {
303 /* Mass erase to be done */
304 FLASH_MassErase(pEraseInit->Banks);
305 }
306 #if defined (FLASH_SR_OBKERR)
307 else if (pEraseInit->TypeErase == FLASH_TYPEERASE_OBK_ALT)
308 {
309 /* OBK erase to be done */
310 FLASH_OBKErase();
311 }
312 #endif /* FLASH_SR_OBKERR */
313 else
314 {
315 /* Erase by sector to be done */
316 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
317 pFlash.Sector = pEraseInit->Sector;
318
319 /* Erase first sector and wait for IT */
320 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->Banks);
321 }
322 }
323
324 return status;
325 }
326
327 /**
328 * @brief Program option bytes
329 * @param pOBInit pointer to an FLASH_OBInitStruct structure that
330 * contains the configuration information for the programming.
331 *
332 * @note To configure any option bytes, the option lock bit OPTLOCK must be
333 * cleared with the call of HAL_FLASH_OB_Unlock() function.
334 * @note New option bytes configuration will be taken into account in two cases:
335 * - after an option bytes launch through the call of HAL_FLASH_OB_Launch()
336 * - after a power-on reset (BOR reset or exit from Standby/Shutdown modes)
337 * @retval HAL Status
338 */
HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef * pOBInit)339 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
340 {
341 HAL_StatusTypeDef status;
342
343 /* Check the parameters */
344 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
345
346 /* Process Locked */
347 __HAL_LOCK(&pFlash);
348
349 /* Reset Error Code */
350 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
351
352 /* Current operation type */
353 pFlash.ProcedureOnGoing = FLASH_TYPEPROGRAM_OB;
354
355 /* Wait for last operation to be completed */
356 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
357
358 if (status == HAL_OK)
359 {
360 /*Write protection configuration*/
361 if ((pOBInit->OptionType & OPTIONBYTE_WRP) != 0U)
362 {
363 assert_param(IS_WRPSTATE(pOBInit->WRPState));
364
365 if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
366 {
367 /* Enable write protection on the selected sectors */
368 FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
369 }
370 else
371 {
372 /* Disable write protection on the selected sectors */
373 FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
374 }
375 }
376
377 /* Product State configuration */
378 if ((pOBInit->OptionType & OPTIONBYTE_PROD_STATE) != 0U)
379 {
380 /* Configure the Read protection level */
381 FLASH_OB_ProdStateConfig(pOBInit->ProductState);
382 }
383
384 /* User Configuration */
385 if ((pOBInit->OptionType & OPTIONBYTE_USER) != 0U)
386 {
387 /* Configure the user option bytes */
388 FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig, pOBInit->USERConfig2);
389 }
390
391 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
392 /* Watermark secure configuration */
393 if ((pOBInit->OptionType & OPTIONBYTE_WMSEC) != 0U)
394 {
395 /* Configure the watermark-based secure area */
396 FLASH_OB_WMSECConfig(pOBInit->Banks, pOBInit->WMSecStartSector, pOBInit->WMSecEndSector);
397 }
398 #endif /* __ARM_FEATURE_CMSE */
399
400 /* Boot Address configuration */
401 if ((pOBInit->OptionType & OPTIONBYTE_BOOTADDR) != 0U)
402 {
403 FLASH_OB_BootAddrConfig(pOBInit->BootConfig, pOBInit->BootAddr);
404 }
405
406 /* Unique boot entry point configuration */
407 if ((pOBInit->OptionType & OPTIONBYTE_BOOT_LOCK) != 0U)
408 {
409 /* Configure the unique boot entry point */
410 FLASH_OB_BootLockConfig(pOBInit->BootConfig, pOBInit->BootLock);
411 }
412
413 /* OTP Block Lock configuration */
414 if ((pOBInit->OptionType & OPTIONBYTE_OTP_LOCK) != 0U)
415 {
416 FLASH_OB_OTP_LockConfig(pOBInit->OTPBlockLock);
417 }
418
419 /* Hide Protection area configuration */
420 if ((pOBInit->OptionType & OPTIONBYTE_HDP) != 0U)
421 {
422 FLASH_OB_HDPConfig(pOBInit->Banks, pOBInit->HDPStartSector, pOBInit->HDPEndSector);
423 }
424
425 #if defined(FLASH_EDATAR_EDATA_EN)
426 /* Flash high-cycle data area configuration */
427 if ((pOBInit->OptionType & OPTIONBYTE_EDATA) != 0U)
428 {
429 FLASH_OB_EDATAConfig(pOBInit->Banks, pOBInit->EDATASize);
430 }
431 #endif /* FLASH_EDATAR_EDATA_EN */
432 }
433
434 /* Process Unlocked */
435 __HAL_UNLOCK(&pFlash);
436
437 return status;
438 }
439
440 /**
441 * @brief Get the Option byte configuration
442 * @param pOBInit pointer to an FLASH_OBInitStruct structure that
443 * contains the configuration information for the programming.
444 * @note The parameter Banks of the pOBInit structure must be set exclusively to FLASH_BANK_1 or FLASH_BANK_2,
445 * as this parameter is use to get the given Bank WRP, PCROP and secured area configuration.
446 *
447 * @retval None
448 */
HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef * pOBInit)449 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
450 {
451 pOBInit->OptionType = (OPTIONBYTE_USER | OPTIONBYTE_PROD_STATE);
452
453 /* Get Product State */
454 pOBInit->ProductState = FLASH_OB_GetProdState();
455
456 /* Get the user option bytes */
457 FLASH_OB_GetUser(&(pOBInit->USERConfig), &(pOBInit->USERConfig2));
458
459 if ((pOBInit->Banks == FLASH_BANK_1) || (pOBInit->Banks == FLASH_BANK_2))
460 {
461 /* Get write protection on the selected area */
462 pOBInit->OptionType |= OPTIONBYTE_WRP;
463 FLASH_OB_GetWRP(pOBInit->Banks, &(pOBInit->WRPState), &(pOBInit->WRPSector));
464
465 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
466 /* Get the configuration of the watermark secure area for the selected area */
467 pOBInit->OptionType |= OPTIONBYTE_WMSEC;
468 FLASH_OB_GetWMSEC(pOBInit->Banks, &(pOBInit->WMSecStartSector), &(pOBInit->WMSecEndSector));
469 #endif /* __ARM_FEATURE_CMSE */
470
471 /* Get the configuration of the hide protection for the selected area */
472 pOBInit->OptionType |= OPTIONBYTE_HDP;
473 FLASH_OB_GetHDP(pOBInit->Banks, &(pOBInit->HDPStartSector), &(pOBInit->HDPEndSector));
474 #if defined (FLASH_EDATAR_EDATA_EN)
475 /* Get the Flash high-cycle data configuration for the selected area */
476 pOBInit->OptionType |= OPTIONBYTE_EDATA;
477 FLASH_OB_GetEDATA(pOBInit->Banks, &(pOBInit->EDATASize));
478 #endif /* FLASH_EDATAR_EDATA_EN */
479 }
480
481 /* Get boot configuration */
482 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
483 if ((pOBInit->BootConfig == OB_BOOT_NS) || (pOBInit->BootConfig == OB_BOOT_SEC))
484 #else
485 if (pOBInit->BootConfig == OB_BOOT_NS)
486 #endif /* __ARM_FEATURE_CMSE */
487 {
488 pOBInit->OptionType |= OPTIONBYTE_BOOTADDR | OPTIONBYTE_BOOT_LOCK;
489 FLASH_OB_GetBootConfig(pOBInit->BootConfig, &(pOBInit->BootAddr), &(pOBInit->BootLock));
490 }
491
492 /* Get OTP Block Lock */
493 pOBInit->OptionType |= OPTIONBYTE_OTP_LOCK;
494 pOBInit->OTPBlockLock = FLASH_OB_OTP_GetLock();
495 }
496
497 #if defined (FLASH_SR_OBKERR)
498 /**
499 * @brief Unlock the FLASH OBK register access
500 * @retval HAL Status
501 */
HAL_FLASHEx_OBK_Unlock(void)502 HAL_StatusTypeDef HAL_FLASHEx_OBK_Unlock(void)
503 {
504 HAL_StatusTypeDef status = HAL_OK;
505
506 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
507 if (READ_BIT(FLASH->SECOBKCFGR, FLASH_OBKCFGR_LOCK) != 0U)
508 {
509 /* Authorize the FLASH OBK Register access */
510 WRITE_REG(FLASH->SECOBKKEYR, FLASH_OBK_KEY1);
511 WRITE_REG(FLASH->SECOBKKEYR, FLASH_OBK_KEY2);
512
513 /* Verify Flash OBK Register is unlocked */
514 if (READ_BIT(FLASH->SECOBKCFGR, FLASH_OBKCFGR_LOCK) != 0U)
515 {
516 status = HAL_ERROR;
517 }
518 }
519 #else
520 if (READ_BIT(FLASH->NSOBKCFGR, FLASH_OBKCFGR_LOCK) != 0U)
521 {
522 /* Authorize the FLASH OBK Register access */
523 WRITE_REG(FLASH->NSOBKKEYR, FLASH_OBK_KEY1);
524 WRITE_REG(FLASH->NSOBKKEYR, FLASH_OBK_KEY2);
525
526 /* Verify Flash OBK Register is unlocked */
527 if (READ_BIT(FLASH->NSOBKCFGR, FLASH_OBKCFGR_LOCK) != 0U)
528 {
529 status = HAL_ERROR;
530 }
531 }
532 #endif /* __ARM_FEATURE_CMSE */
533
534 return status;
535 }
536
537 /**
538 * @brief Locks the FLASH OBK register access
539 * @retval HAL Status
540 */
HAL_FLASHEx_OBK_Lock(void)541 HAL_StatusTypeDef HAL_FLASHEx_OBK_Lock(void)
542 {
543 HAL_StatusTypeDef status = HAL_ERROR;
544
545 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
546 /* Set the LOCK Bit to lock the FLASH OBK Register access */
547 SET_BIT(FLASH->SECOBKCFGR, FLASH_OBKCFGR_LOCK);
548
549 /* verify Flash is locked */
550 if (READ_BIT(FLASH->SECOBKCFGR, FLASH_OBKCFGR_LOCK) != 0U)
551 {
552 status = HAL_OK;
553 }
554 #else
555 /* Set the LOCK Bit to lock the FLASH OBK Register access */
556 SET_BIT(FLASH->NSOBKCFGR, FLASH_OBKCFGR_LOCK);
557
558 /* Verify Flash OBK is locked */
559 if (READ_BIT(FLASH->NSOBKCFGR, FLASH_OBKCFGR_LOCK) != 0U)
560 {
561 status = HAL_OK;
562 }
563 #endif /* __ARM_FEATURE_CMSE */
564
565 return status;
566 }
567
568 /**
569 * @brief Swap the FLASH Option Bytes Keys (OBK)
570 * @param SwapOffset Specifies the number of keys to be swapped.
571 * This parameter can be a value between 0 (no OBK data swapped) and 511 (all OBK data swapped).
572 * Typical value are available in @ref FLASH_OBK_SWAP_Offset
573 * @retval HAL Status
574 */
HAL_FLASHEx_OBK_Swap(uint32_t SwapOffset)575 HAL_StatusTypeDef HAL_FLASHEx_OBK_Swap(uint32_t SwapOffset)
576 {
577 HAL_StatusTypeDef status;
578 __IO uint32_t *reg_obkcfgr;
579
580 /* Wait for last operation to be completed */
581 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
582
583 if (status == HAL_OK)
584 {
585 /* Access to SECOBKCFGR or NSOBKCFGR registers depends on operation type */
586 reg_obkcfgr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECOBKCFGR) : &(FLASH_NS->NSOBKCFGR);
587
588 /* Set OBK swap offset */
589 MODIFY_REG((*reg_obkcfgr), FLASH_OBKCFGR_SWAP_OFFSET, (SwapOffset << FLASH_OBKCFGR_SWAP_OFFSET_Pos));
590
591 /* Set OBK swap request */
592 SET_BIT((*reg_obkcfgr), FLASH_OBKCFGR_SWAP_SECT_REQ);
593
594 /* Wait for last operation to be completed */
595 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
596 }
597
598 return status;
599 }
600 #endif /* FLASH_SR_OBKERR */
601
602 #if defined (FLASH_SR_PUF_STATE)
603 /**
604 * @brief Launch the PUF operation.
605 * @retval HAL Status
606 */
HAL_FLASHEx_PUF_Launch(void)607 HAL_StatusTypeDef HAL_FLASHEx_PUF_Launch(void)
608 {
609 HAL_StatusTypeDef status;
610
611 /* Wait for last operation to be completed */
612 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
613
614 if (status == HAL_OK)
615 {
616 /* Set PUF_LAUNCH Bit */
617 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
618 SET_BIT(FLASH->SECCR, FLASH_CR_PUF_LAUNCH);
619 #else
620 SET_BIT(FLASH->NSCR, FLASH_CR_PUF_LAUNCH);
621 #endif /* __ARM_FEATURE_CMSE */
622
623 /* Wait for PUF operation to be completed */
624 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
625 }
626
627 return status;
628 }
629 #endif /* FLASH_SR_PUF_STATE */
630
631 /**
632 * @brief Return the on-going Flash Operation. After a system reset, return
633 * the interrupted Flash operation, if any.
634 * @param pFlashOperation [out] pointer to a FLASH_OperationTypeDef structure
635 * that contains the Flash operation information.
636 * @retval None
637 */
HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef * pFlashOperation)638 void HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef *pFlashOperation)
639 {
640 uint32_t opsr_reg = FLASH->OPSR;
641
642 /* Get Flash operation Type */
643 pFlashOperation->OperationType = opsr_reg & FLASH_OPSR_CODE_OP;
644
645 /* Get Flash operation memory */
646 #if defined (FLASH_EDATAR_EDATA_EN)
647 pFlashOperation->FlashArea = opsr_reg & (FLASH_OPSR_DATA_OP | FLASH_OPSR_BK_OP | \
648 FLASH_OPSR_SYSF_OP | FLASH_OPSR_OTP_OP);
649 #else
650 pFlashOperation->FlashArea = opsr_reg & (FLASH_OPSR_BK_OP | FLASH_OPSR_SYSF_OP | \
651 FLASH_OPSR_OTP_OP);
652 #endif /* FLASH_EDATAR_EDATA_EN */
653 /* Get Flash operation address */
654 pFlashOperation->Address = opsr_reg & FLASH_OPSR_ADDR_OP;
655 }
656
657 /**
658 * @}
659 */
660
661 /** @defgroup FLASHEx_Exported_Functions_Group2 FLASHEx Extension Protection configuration functions
662 * @brief Extension Protection configuration functions
663 * @{
664 */
665
666 /**
667 * @brief Configure the block-based secure area.
668 *
669 * @param pBBAttributes pointer to an FLASH_BBAttributesTypeDef structure that
670 * contains the configuration information for the programming.
671 *
672 * @note The field pBBAttributes->Bank should indicate which area is requested
673 * for the block-based attributes.
674 * @note The field pBBAttributes->BBAttributesType should indicate which
675 * block-base attribute type is requested: Secure or Privilege.
676 *
677 * @retval HAL Status
678 */
HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)679 HAL_StatusTypeDef HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
680 {
681 HAL_StatusTypeDef status;
682 uint8_t index;
683 __IO uint32_t *reg;
684
685 /* Check the parameters */
686 assert_param(IS_FLASH_BANK_EXCLUSIVE(pBBAttributes->Bank));
687 assert_param(IS_FLASH_BB_EXCLUSIVE(pBBAttributes->BBAttributesType));
688
689 /* Wait for last operation to be completed */
690 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
691
692 if (status == HAL_OK)
693 {
694 /* Set the first Block-Based register to write */
695 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
696 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
697 {
698 if (pBBAttributes->Bank == FLASH_BANK_1)
699 {
700 reg = &(FLASH->SECBB1R1);
701 }
702 else
703 {
704 reg = &(FLASH->SECBB2R1);
705 }
706 }
707 else
708 #endif /* __ARM_FEATURE_CMSE */
709 {
710 if (pBBAttributes->Bank == FLASH_BANK_1)
711 {
712 reg = &(FLASH->PRIVBB1R1);
713 }
714 else
715 {
716 reg = &(FLASH->PRIVBB2R1);
717 }
718 }
719
720 /* Modify the register values and check that new attributes are taken in account */
721 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
722 {
723 *reg = pBBAttributes->BBAttributes_array[index] & FLASH_PRIVBBR_PRIVBB;
724 if ((*reg) != (pBBAttributes->BBAttributes_array[index] & FLASH_PRIVBBR_PRIVBB))
725 {
726 status = HAL_ERROR;
727 }
728 reg++;
729 }
730
731 /* ISB instruction is called to be sure next instructions are performed with correct attributes */
732 __ISB();
733 }
734
735 /* Process Unlocked */
736 __HAL_UNLOCK(&pFlash);
737
738 return status;
739 }
740
741 /**
742 * @brief Return the block-based attributes.
743 *
744 * @param pBBAttributes [in/out] pointer to an FLASH_BBAttributesTypeDef structure
745 * that contains the configuration information.
746 * @note The field pBBAttributes->Bank should indicate which area is requested
747 * for the block-based attributes.
748 * @note The field pBBAttributes->BBAttributesType should indicate which
749 * block-base attribute type is requested: Secure or Privilege.
750 *
751 * @retval None
752 */
HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)753 void HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
754 {
755 uint8_t index;
756 __IO uint32_t *reg;
757
758 /* Check the parameters */
759 assert_param(IS_FLASH_BANK_EXCLUSIVE(pBBAttributes->Bank));
760 assert_param(IS_FLASH_BB_EXCLUSIVE(pBBAttributes->BBAttributesType));
761
762 /* Set the first Block-Based register to read */
763 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
764 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
765 {
766 if (pBBAttributes->Bank == FLASH_BANK_1)
767 {
768 reg = &(FLASH->SECBB1R1);
769 }
770 else
771 {
772 reg = &(FLASH->SECBB2R1);
773 }
774 }
775 else
776 #endif /* __ARM_FEATURE_CMSE */
777 {
778 if (pBBAttributes->Bank == FLASH_BANK_1)
779 {
780 reg = &(FLASH->PRIVBB1R1);
781 }
782 else
783 {
784 reg = &(FLASH->PRIVBB2R1);
785 }
786 }
787
788 /* Read the register values */
789 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
790 {
791 pBBAttributes->BBAttributes_array[index] = (*reg) & FLASH_PRIVBBR_PRIVBB;
792 reg++;
793 }
794 }
795
796 /**
797 * @brief Configuration of the privilege attribute.
798 *
799 * @param PrivMode indicate privilege mode configuration
800 * This parameter can be one of the following values:
801 * @arg FLASH_SPRIV_GRANTED: access to secure Flash registers is granted to privileged or unprivileged access
802 * @arg FLASH_SPRIV_DENIED: access to secure Flash registers is denied to unprivileged access
803 * @arg FLASH_NSPRIV_GRANTED: access to non-secure Flash registers is granted to privileged or unprivileged access
804 * @arg FLASH_NSPRIV_DENIED: access to non-secure Flash registers is denied to unprivilege access
805 *
806 * @retval None
807 */
HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)808 void HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)
809 {
810 /* Check the parameters */
811 assert_param(IS_FLASH_CFGPRIVMODE(PrivMode));
812 #if defined (FLASH_PRIVCFGR_SPRIV)
813 MODIFY_REG(FLASH->PRIVCFGR, (FLASH_PRIVCFGR_SPRIV | FLASH_PRIVCFGR_NSPRIV), PrivMode);
814 #else
815 MODIFY_REG(FLASH->PRIVCFGR, FLASH_PRIVCFGR_NSPRIV, PrivMode);
816 #endif /* FLASH_PRIVCFGR_SPRIV */
817 }
818
819 /**
820 * @brief Return the value of the privilege attribute.
821 *
822 * @retval It indicates the privilege mode configuration.
823 * This return value can be one of the following values:
824 * @arg FLASH_SPRIV_GRANTED: access to secure Flash registers is granted to privileged or unprivileged access
825 * @arg FLASH_SPRIV_DENIED: access to secure Flash registers is denied to unprivileged access
826 * @arg FLASH_NSPRIV_GRANTED: access to non-secure Flash registers is granted to privileged or unprivileged access
827 * @arg FLASH_NSPRIV_DENIED: access to Flash registers is denied to unprivilege accessP
828 */
HAL_FLASHEx_GetPrivMode(void)829 uint32_t HAL_FLASHEx_GetPrivMode(void)
830 {
831 #if defined (FLASH_PRIVCFGR_SPRIV)
832 return (FLASH->PRIVCFGR & (FLASH_PRIVCFGR_SPRIV | FLASH_PRIVCFGR_NSPRIV));
833 #else
834 return (FLASH->PRIVCFGR & FLASH_PRIVCFGR_NSPRIV);
835 #endif /* FLASH_PRIVCFGR_SPRIV */
836 }
837
838 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
839 /**
840 * @brief Configuration of the security inversion.
841 *
842 * @param SecInvState indicate the flash security state configuration
843 * This parameter can be one of the following values:
844 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
845 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
846 *
847 * @retval HAL Status
848 */
HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)849 HAL_StatusTypeDef HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)
850 {
851 HAL_StatusTypeDef status;
852
853 /* Check the parameters */
854 assert_param(IS_FLASH_CFGSECINV(SecInvState));
855
856 /* Process Locked */
857 __HAL_LOCK(&pFlash);
858
859 /* Wait for last operation to be completed */
860 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
861
862 if (status == HAL_OK)
863 {
864 MODIFY_REG(FLASH->SECCR, FLASH_CR_INV, SecInvState);
865 }
866
867 /* Process Unlocked */
868 __HAL_UNLOCK(&pFlash);
869
870 return status;
871 }
872
873 /**
874 * @brief Return the value of the security inversion.
875 *
876 * @retval It indicates the flash security state configuration
877 * This return value can be one of the following values:
878 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
879 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
880 */
HAL_FLASHEx_GetSecInversion(void)881 uint32_t HAL_FLASHEx_GetSecInversion(void)
882 {
883 return (FLASH->SECCR & FLASH_CR_INV);
884 }
885 #endif /* __ARM_FEATURE_CMSE */
886
887 /**
888 * @brief Configure the HDP extension area.
889 *
890 * @param pHDPExtension pointer to an FLASH_HDPExtentionTypeDef structure that
891 * contains the configuration information.
892 *
893 * @note The field pHDPExtension->Banks should indicate which area is requested
894 * for the HDP extension.
895 * @note The field pHDPExtension->NbSectors should indicate the number of
896 * sector to be added to the HDP area.
897 *
898 * @retval HAL Status
899 */
HAL_FLASHEx_ConfigHDPExtension(FLASH_HDPExtensionTypeDef * pHDPExtension)900 HAL_StatusTypeDef HAL_FLASHEx_ConfigHDPExtension(FLASH_HDPExtensionTypeDef *pHDPExtension)
901 {
902 /* Check the parameters */
903 assert_param(IS_FLASH_BANK(pHDPExtension->Banks));
904 assert_param(IS_FLASH_SECTOR(pHDPExtension->NbSectors));
905
906 /* Set the HDP extension register */
907 if (pHDPExtension->Banks == FLASH_BANK_1)
908 {
909 MODIFY_REG(FLASH->HDPEXTR, FLASH_HDPEXTR_HDP1_EXT, pHDPExtension->NbSectors);
910 }
911 else if (pHDPExtension->Banks == FLASH_BANK_2)
912 {
913 MODIFY_REG(FLASH->HDPEXTR, FLASH_HDPEXTR_HDP2_EXT, (pHDPExtension->NbSectors << FLASH_HDPEXTR_HDP2_EXT_Pos));
914 }
915 else
916 {
917 FLASH->HDPEXTR = (pHDPExtension->NbSectors << FLASH_HDPEXTR_HDP2_EXT_Pos) | pHDPExtension->NbSectors;
918 }
919
920 return HAL_OK;
921 }
922
923 /**
924 * @}
925 */
926
927 /**
928 * @}
929 */
930
931 /* Private functions ---------------------------------------------------------*/
932
933 /** @addtogroup FLASHEx_Private_Functions
934 * @{
935 */
936
937 /**
938 * @brief Mass erase of FLASH memory
939 * @param Banks Banks to be erased
940 * This parameter can be one of the following values:
941 * @arg FLASH_BANK_1: Bank1 to be erased
942 * @arg FLASH_BANK_2: Bank2 to be erased
943 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
944 * @retval None
945 */
FLASH_MassErase(uint32_t Banks)946 static void FLASH_MassErase(uint32_t Banks)
947 {
948 __IO uint32_t *reg_cr;
949
950 /* Check the parameters */
951 assert_param(IS_FLASH_BANK(Banks));
952
953 /* Access to SECCR or NSCR registers depends on operation type */
954 #if defined (FLASH_OPTSR2_TZEN)
955 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH_NS->NSCR);
956 #else
957 reg_cr = &(FLASH_NS->NSCR);
958 #endif /* FLASH_OPTSR2_TZEN */
959
960 /* Flash Mass Erase */
961 if ((Banks & FLASH_BANK_BOTH) == FLASH_BANK_BOTH)
962 {
963 /* Set Mass Erase Bit */
964 SET_BIT((*reg_cr), FLASH_CR_MER | FLASH_CR_START);
965 }
966 else
967 {
968 /* Proceed to erase Flash Bank */
969 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
970 {
971 /* Erase Bank1 */
972 MODIFY_REG((*reg_cr), (FLASH_CR_BKSEL | FLASH_CR_BER | FLASH_CR_START), (FLASH_CR_BER | FLASH_CR_START));
973 }
974
975 if ((Banks & FLASH_BANK_2) == FLASH_BANK_2)
976 {
977 /* Erase Bank2 */
978 SET_BIT((*reg_cr), (FLASH_CR_BER | FLASH_CR_BKSEL | FLASH_CR_START));
979 }
980 }
981 }
982
983 /**
984 * @brief Erase the specified FLASH memory sector
985 * @param Sector FLASH sector to erase
986 * This parameter can be a value of @ref FLASH_Sectors
987 * @param Banks Bank(s) where the sector will be erased
988 * This parameter can be one of the following values:
989 * @arg FLASH_BANK_1: Sector in bank 1 to be erased
990 * @arg FLASH_BANK_2: Sector in bank 2 to be erased
991 * @retval None
992 */
FLASH_Erase_Sector(uint32_t Sector,uint32_t Banks)993 void FLASH_Erase_Sector(uint32_t Sector, uint32_t Banks)
994 {
995 __IO uint32_t *reg_cr;
996
997 /* Check the parameters */
998 assert_param(IS_FLASH_SECTOR(Sector));
999 assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks));
1000
1001 /* Access to SECCR or NSCR registers depends on operation type */
1002 #if defined (FLASH_OPTSR2_TZEN)
1003 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR) : &(FLASH_NS->NSCR);
1004 #else
1005 reg_cr = &(FLASH_NS->NSCR);
1006 #endif /* FLASH_OPTSR2_TZEN */
1007
1008 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
1009 {
1010 /* Reset Sector Number for Bank1 */
1011 (*reg_cr) &= ~(FLASH_CR_SNB | FLASH_CR_BKSEL);
1012
1013 (*reg_cr) |= (FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos) | FLASH_CR_START);
1014 }
1015 else
1016 {
1017 /* Reset Sector Number for Bank2 */
1018 (*reg_cr) &= ~(FLASH_CR_SNB);
1019
1020 (*reg_cr) |= (FLASH_CR_SER | FLASH_CR_BKSEL | (Sector << FLASH_CR_SNB_Pos) | FLASH_CR_START);
1021 }
1022 }
1023
1024 #if defined (FLASH_SR_OBKERR)
1025 /**
1026 * @brief Erase of FLASH OBK
1027 * @retval None
1028 */
FLASH_OBKErase()1029 static void FLASH_OBKErase()
1030 {
1031 __IO uint32_t *reg_obkcfgr;
1032
1033 /* Access to SECOBKCFGR or NSOBKCFGR registers depends on operation type */
1034 reg_obkcfgr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECOBKCFGR) : &(FLASH_NS->NSOBKCFGR);
1035
1036 /* Set OBK Erase Bit */
1037 SET_BIT((*reg_obkcfgr), FLASH_OBKCFGR_ALT_SECT_ERASE);
1038 }
1039 #endif /* FLASH_SR_OBKERR */
1040
1041 /**
1042 * @brief Enable the write protection of the desired bank1 or bank 2 sectors
1043 * @param WRPSector specifies the sectors to be write protected.
1044 * This parameter can be a value of @ref FLASH_OB_Write_Protection_Sectors
1045 *
1046 * @param Banks the specific bank to apply WRP sectors
1047 * This parameter can be one of the following values:
1048 * @arg FLASH_BANK_1: enable WRP on specified bank1 sectors
1049 * @arg FLASH_BANK_2: enable WRP on specified bank2 sectors
1050 * @arg FLASH_BANK_BOTH: enable WRP on both bank1 and bank2 specified sectors
1051 *
1052 * @retval None
1053 */
FLASH_OB_EnableWRP(uint32_t WRPSector,uint32_t Banks)1054 static void FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
1055 {
1056 /* Check the parameters */
1057 assert_param(IS_FLASH_BANK(Banks));
1058
1059 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
1060 {
1061 /* Enable Write Protection for bank 1 */
1062 FLASH->WRP1R_PRG &= (~(WRPSector & FLASH_WRPR_WRPSG));
1063 }
1064
1065 if ((Banks & FLASH_BANK_2) == FLASH_BANK_2)
1066 {
1067 /* Enable Write Protection for bank 2 */
1068 FLASH->WRP2R_PRG &= (~(WRPSector & FLASH_WRPR_WRPSG));
1069 }
1070 }
1071
1072 /**
1073 * @brief Disable the write protection of the desired bank1 or bank 2 sectors
1074 * @param WRPSector specifies the sectors to disable write protection.
1075 * This parameter can be a value of @ref FLASH_OB_Write_Protection_Sectors
1076 *
1077 * @param Banks the specific bank to apply WRP sectors
1078 * This parameter can be one of the following values:
1079 * @arg FLASH_BANK_1: disable WRP on specified bank1 sectors
1080 * @arg FLASH_BANK_2: disable WRP on specified bank2 sectors
1081 * @arg FLASH_BANK_BOTH: disable WRP on both bank1 and bank2 specified sectors
1082 *
1083 * @retval None
1084 */
FLASH_OB_DisableWRP(uint32_t WRPSector,uint32_t Banks)1085 static void FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
1086 {
1087 /* Check the parameters */
1088 assert_param(IS_FLASH_BANK(Banks));
1089
1090 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
1091 {
1092 /* Disable Write Protection for bank 1 */
1093 FLASH->WRP1R_PRG |= (WRPSector & FLASH_WRPR_WRPSG);
1094 }
1095
1096 if ((Banks & FLASH_BANK_2) == FLASH_BANK_2)
1097 {
1098 /* Disable Write Protection for bank 2 */
1099 FLASH->WRP2R_PRG |= (WRPSector & FLASH_WRPR_WRPSG);
1100 }
1101 }
1102
1103 /**
1104 * @brief Get the write protection of the given bank 1 or bank 2 sectors
1105 * @param[in] Bank specifies the bank where to get the write protection sectors.
1106 * This parameter can be exclusively one of the following values:
1107 * @arg FLASH_BANK_1: Get bank1 WRP sectors
1108 * @arg FLASH_BANK_2: Get bank2 WRP sectors
1109 *
1110 * @param[out] WRPState returns the write protection state of the returned sectors.
1111 * This parameter can be one of the following values:
1112 * @arg WRPState: OB_WRPSTATE_DISABLE or OB_WRPSTATE_ENABLE
1113
1114 * @param[out] WRPSector returns the write protected sectors on the given bank .
1115 * This parameter can be a value of @ref FLASH_OB_Write_Protection_Sectors
1116 *
1117 * @retval None
1118 */
FLASH_OB_GetWRP(uint32_t Bank,uint32_t * WRPState,uint32_t * WRPSector)1119 static void FLASH_OB_GetWRP(uint32_t Bank, uint32_t *WRPState, uint32_t *WRPSector)
1120 {
1121 uint32_t regvalue = 0U;
1122
1123 if (Bank == FLASH_BANK_1)
1124 {
1125 regvalue = FLASH->WRP1R_CUR;
1126 }
1127
1128 if (Bank == FLASH_BANK_2)
1129 {
1130 regvalue = FLASH->WRP2R_CUR;
1131 }
1132
1133 (*WRPSector) = (~regvalue) & FLASH_WRPR_WRPSG;
1134
1135 if (*WRPSector == 0U)
1136 {
1137 (*WRPState) = OB_WRPSTATE_DISABLE;
1138 }
1139 else
1140 {
1141 (*WRPState) = OB_WRPSTATE_ENABLE;
1142 }
1143 }
1144
1145 /**
1146 * @brief Set the product state.
1147 *
1148 * @note To configure the product state, the option lock bit OPTLOCK must be
1149 * cleared with the call of the HAL_FLASH_OB_Unlock() function.
1150 * @note To validate the product state, the option bytes must be reloaded
1151 * through the call of the HAL_FLASH_OB_Launch() function.
1152 *
1153 * @param ProductState specifies the product state.
1154 * This parameter can be a value of @ref FLASH_OB_Product_State
1155 *
1156 * @retval None
1157 */
FLASH_OB_ProdStateConfig(uint32_t ProductState)1158 static void FLASH_OB_ProdStateConfig(uint32_t ProductState)
1159 {
1160 /* Check the parameters */
1161 assert_param(IS_OB_PRODUCT_STATE(ProductState));
1162
1163 /* Configure the Product State in the option bytes register */
1164 MODIFY_REG(FLASH->OPTSR_PRG, FLASH_OPTSR_PRODUCT_STATE, ProductState);
1165 }
1166
1167 /**
1168 * @brief Get the the product state.
1169 * @retval ProductState returns the product state.
1170 * This returned value can a value of @ref FLASH_OB_Product_State
1171 */
FLASH_OB_GetProdState(void)1172 static uint32_t FLASH_OB_GetProdState(void)
1173 {
1174 return (FLASH->OPTSR_CUR & FLASH_OPTSR_PRODUCT_STATE);
1175 }
1176
1177 /**
1178 * @brief Program the FLASH User Option Byte.
1179 *
1180 * @note To configure the user option bytes, the option lock bit OPTLOCK must
1181 * be cleared with the call of the HAL_FLASH_OB_Unlock() function.
1182 * @note To validate the user option bytes, the option bytes must be reloaded
1183 * through the call of the HAL_FLASH_OB_Launch() function.
1184 *
1185 * @param UserType specifies The FLASH User Option Bytes to be modified.
1186 * This parameter can be a combination of @ref FLASH_OB_USER_Type
1187 *
1188 * @param UserConfig1 specifies values of the selected User Option Bytes.
1189 * This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
1190 * @ref FLASH_OB_USER_BORH_EN, @ref FLASH_OB_USER_IWDG_SW,
1191 * @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_nRST_STOP,
1192 * @ref FLASH_OB_USER_nRST_STANDBY, @ref FLASH_OB_USER_IO_VDD_HSLV,
1193 * @ref FLASH_OB_USER_IO_VDDIO2_HSLV, @ref FLASH_OB_USER_IWDG_STOP,
1194 * @ref FLASH_OB_USER_IWDG_STANDBY, @ref FLASH_OB_USER_BOOT_UBE and @ref OB_USER_SWAP_BANK.
1195 * @param UserConfig2 specifies values of the selected User Option Bytes.
1196 * @ref FLASH_OB_USER_SRAM1_3_RST, @ref FLASH_OB_USER_SRAM2_RST,
1197 * @ref FLASH_OB_USER_BKPRAM_ECC, @ref FLASH_OB_USER_SRAM3_ECC,
1198 * @ref FLASH_OB_USER_SRAM2_ECC, @ref FLASH_OB_USER_SRAM1_ECC,
1199 * @ref FLASH_OB_USER_SRAM1_RST, @ref FLASH_OB_USER_UNIQUE_KEY and @ref OB_USER_TZEN.
1200 * @retval None
1201 */
FLASH_OB_UserConfig(uint32_t UserType,uint32_t UserConfig1,uint32_t UserConfig2)1202 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig1, uint32_t UserConfig2)
1203 {
1204 uint32_t optr_reg1_val = 0U;
1205 uint32_t optr_reg1_mask = 0U;
1206 uint32_t optr_reg2_val = 0U;
1207 uint32_t optr_reg2_mask = 0U;
1208
1209 /* Check the parameters */
1210 assert_param(IS_OB_USER_TYPE(UserType));
1211
1212 if ((UserType & OB_USER_BOR_LEV) != 0U)
1213 {
1214 /* BOR level option byte should be modified */
1215 assert_param(IS_OB_USER_BOR_LEVEL(UserConfig1 & FLASH_OPTSR_BOR_LEV));
1216
1217 /* Set value and mask for BOR level option byte */
1218 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_BOR_LEV);
1219 optr_reg1_mask |= FLASH_OPTSR_BOR_LEV;
1220 }
1221
1222 if ((UserType & OB_USER_BORH_EN) != 0U)
1223 {
1224 /* BOR high enable status bit should be modified */
1225 assert_param(IS_OB_USER_BORH_EN(UserConfig1 & FLASH_OPTSR_BORH_EN));
1226
1227 /* Set value and mask for BOR high enable status bit */
1228 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_BORH_EN);
1229 optr_reg1_mask |= FLASH_OPTSR_BORH_EN;
1230 }
1231
1232 if ((UserType & OB_USER_IWDG_SW) != 0U)
1233 {
1234 /* IWDG_SW option byte should be modified */
1235 assert_param(IS_OB_USER_IWDG(UserConfig1 & FLASH_OPTSR_IWDG_SW));
1236
1237 /* Set value and mask for IWDG_SW option byte */
1238 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_IWDG_SW);
1239 optr_reg1_mask |= FLASH_OPTSR_IWDG_SW;
1240 }
1241
1242 if ((UserType & OB_USER_WWDG_SW) != 0U)
1243 {
1244 /* WWDG_SW option byte should be modified */
1245 assert_param(IS_OB_USER_WWDG(UserConfig1 & FLASH_OPTSR_WWDG_SW));
1246
1247 /* Set value and mask for WWDG_SW option byte */
1248 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_WWDG_SW);
1249 optr_reg1_mask |= FLASH_OPTSR_WWDG_SW;
1250 }
1251
1252 if ((UserType & OB_USER_NRST_STOP) != 0U)
1253 {
1254 /* nRST_STOP option byte should be modified */
1255 assert_param(IS_OB_USER_STOP(UserConfig1 & FLASH_OPTSR_NRST_STOP));
1256
1257 /* Set value and mask for nRST_STOP option byte */
1258 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_NRST_STOP);
1259 optr_reg1_mask |= FLASH_OPTSR_NRST_STOP;
1260 }
1261
1262 if ((UserType & OB_USER_NRST_STDBY) != 0U)
1263 {
1264 /* nRST_STDBY option byte should be modified */
1265 assert_param(IS_OB_USER_STANDBY(UserConfig1 & FLASH_OPTSR_NRST_STDBY));
1266
1267 /* Set value and mask for nRST_STDBY option byte */
1268 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_NRST_STDBY);
1269 optr_reg1_mask |= FLASH_OPTSR_NRST_STDBY;
1270 }
1271
1272 if ((UserType & OB_USER_IO_VDD_HSLV) != 0U)
1273 {
1274 /* IO_VDD_HSLV option byte should be modified */
1275 assert_param(IS_OB_USER_IO_VDD_HSLV(UserConfig1 & FLASH_OPTSR_IO_VDD_HSLV));
1276
1277 /* Set value and mask for IO_VDD_HSLV option byte */
1278 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_IO_VDD_HSLV);
1279 optr_reg1_mask |= FLASH_OPTSR_IO_VDD_HSLV;
1280 }
1281
1282 if ((UserType & OB_USER_IO_VDDIO2_HSLV) != 0U)
1283 {
1284 /* IO_VDD_HSLV option byte should be modified */
1285 assert_param(IS_OB_USER_IO_VDDIO2_HSLV(UserConfig1 & FLASH_OPTSR_IO_VDDIO2_HSLV));
1286
1287 /* Set value and mask for IO_VDD_HSLV option byte */
1288 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_IO_VDDIO2_HSLV);
1289 optr_reg1_mask |= FLASH_OPTSR_IO_VDDIO2_HSLV;
1290 }
1291
1292 if ((UserType & OB_USER_IWDG_STOP) != 0U)
1293 {
1294 /* IWDG_STOP option byte should be modified */
1295 assert_param(IS_OB_USER_IWDG_STOP(UserConfig1 & FLASH_OPTSR_IWDG_STOP));
1296
1297 /* Set value and mask for IWDG_STOP option byte */
1298 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_IWDG_STOP);
1299 optr_reg1_mask |= FLASH_OPTSR_IWDG_STOP;
1300 }
1301
1302 if ((UserType & OB_USER_IWDG_STDBY) != 0U)
1303 {
1304 /* IWDG_STDBY option byte should be modified */
1305 assert_param(IS_OB_USER_IWDG_STDBY(UserConfig1 & FLASH_OPTSR_IWDG_STDBY));
1306
1307 /* Set value and mask for IWDG_STDBY option byte */
1308 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_IWDG_STDBY);
1309 optr_reg1_mask |= FLASH_OPTSR_IWDG_STDBY;
1310 }
1311
1312 #if defined (FLASH_OPTSR_BOOT_UBE)
1313 if ((UserType & OB_USER_BOOT_UBE) != 0U)
1314 {
1315 /* SWAP_BANK option byte should be modified */
1316 assert_param(IS_OB_USER_BOOT_UBE(UserConfig1 & FLASH_OPTSR_BOOT_UBE));
1317
1318 /* Set value and mask for BOOT_UBE option byte */
1319 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_BOOT_UBE);
1320 optr_reg1_mask |= FLASH_OPTSR_BOOT_UBE;
1321 }
1322 #endif /* FLASH_OPTSR_BOOT_UBE */
1323
1324 if ((UserType & OB_USER_SWAP_BANK) != 0U)
1325 {
1326 /* SWAP_BANK option byte should be modified */
1327 assert_param(IS_OB_USER_SWAP_BANK(UserConfig1 & FLASH_OPTSR_SWAP_BANK));
1328
1329 /* Set value and mask for SWAP_BANK option byte */
1330 optr_reg1_val |= (UserConfig1 & FLASH_OPTSR_SWAP_BANK);
1331 optr_reg1_mask |= FLASH_OPTSR_SWAP_BANK;
1332 }
1333
1334 #if defined (FLASH_OPTSR2_SRAM1_3_RST)
1335 if ((UserType & OB_USER_SRAM1_3_RST) != 0U)
1336 {
1337 /* SRAM13_RST option byte should be modified */
1338 assert_param(IS_OB_USER_SRAM1_3_RST(UserConfig2 & FLASH_OPTSR2_SRAM1_3_RST));
1339
1340 /* Set value and mask for SRAM13_RST option byte */
1341 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_SRAM1_3_RST);
1342 optr_reg2_mask |= FLASH_OPTSR2_SRAM1_3_RST;
1343 }
1344 #endif /* FLASH_OPTSR2_SRAM1_3_RST */
1345
1346 #if defined (FLASH_OPTSR2_SRAM1_RST)
1347 if ((UserType & OB_USER_SRAM1_RST) != 0U)
1348 {
1349 /* SRAM1_RST option byte should be modified */
1350 assert_param(IS_OB_USER_SRAM1_RST(UserConfig2 & FLASH_OPTSR2_SRAM1_RST));
1351
1352 /* Set value and mask for SRAM1_RST option byte */
1353 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_SRAM1_RST);
1354 optr_reg2_mask |= FLASH_OPTSR2_SRAM1_RST;
1355 }
1356 #endif /* FLASH_OPTSR2_SRAM1_RST */
1357
1358 if ((UserType & OB_USER_SRAM2_RST) != 0U)
1359 {
1360 /* SRAM2_RST option byte should be modified */
1361 assert_param(IS_OB_USER_SRAM2_RST(UserConfig2 & FLASH_OPTSR2_SRAM2_RST));
1362
1363 /* Set value and mask for SRAM2_RST option byte */
1364 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_SRAM2_RST);
1365 optr_reg2_mask |= FLASH_OPTSR2_SRAM2_RST;
1366 }
1367
1368 if ((UserType & OB_USER_BKPRAM_ECC) != 0U)
1369 {
1370 /* BKPRAM_ECC option byte should be modified */
1371 assert_param(IS_OB_USER_BKPRAM_ECC(UserConfig2 & FLASH_OPTSR2_BKPRAM_ECC));
1372
1373 /* Set value and mask for BKPRAM_ECC option byte */
1374 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_BKPRAM_ECC);
1375 optr_reg2_mask |= FLASH_OPTSR2_BKPRAM_ECC;
1376 }
1377
1378 #if defined (FLASH_OPTSR2_SRAM3_ECC)
1379 if ((UserType & OB_USER_SRAM3_ECC) != 0U)
1380 {
1381 /* SRAM3_ECC option byte should be modified */
1382 assert_param(IS_OB_USER_SRAM3_ECC(UserConfig2 & FLASH_OPTSR2_SRAM3_ECC));
1383
1384 /* Set value and mask for SRAM3_ECC option byte */
1385 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_SRAM3_ECC);
1386 optr_reg2_mask |= FLASH_OPTSR2_SRAM3_ECC;
1387 }
1388 #endif /* FLASH_OPTSR2_SRAM3_ECC */
1389
1390 if ((UserType & OB_USER_SRAM2_ECC) != 0U)
1391 {
1392 /* SRAM2_ECC option byte should be modified */
1393 assert_param(IS_OB_USER_SRAM2_ECC(UserConfig2 & FLASH_OPTSR2_SRAM2_ECC));
1394
1395 /* Set value and mask for SRAM2_ECC option byte */
1396 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_SRAM2_ECC);
1397 optr_reg2_mask |= FLASH_OPTSR2_SRAM2_ECC;
1398 }
1399
1400 #if defined (FLASH_OPTSR2_SRAM1_ECC)
1401 if ((UserType & OB_USER_SRAM1_ECC) != 0U)
1402 {
1403 /* SRAM2_ECC option byte should be modified */
1404 assert_param(IS_OB_USER_SRAM1_ECC(UserConfig2 & FLASH_OPTSR2_SRAM1_ECC));
1405
1406 /* Set value and mask for SRAM2_ECC option byte */
1407 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_SRAM1_ECC);
1408 optr_reg2_mask |= FLASH_OPTSR2_SRAM1_ECC;
1409 }
1410 #endif /* FLASH_OPTSR2_SRAM1_ECC */
1411 #if defined (FLASH_OPTSR2_HUK_PUF)
1412 if ((UserType & OB_USER_HUK_PUF) != 0U)
1413 {
1414 /* HUK_PUF option byte should be modified */
1415 assert_param(IS_OB_USER_HUK_PUF(UserConfig2 & FLASH_OPTSR2_HUK_PUF));
1416
1417 /* Set value and mask for HUK_PUF option byte */
1418 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_HUK_PUF);
1419 optr_reg2_mask |= FLASH_OPTSR2_HUK_PUF;
1420 }
1421 #endif /* FLASH_OPTSR2_HUK_PUF */
1422
1423 #if defined (FLASH_OPTSR2_TZEN)
1424 if ((UserType & OB_USER_TZEN) != 0U)
1425 {
1426 /* TZEN option byte should be modified */
1427 assert_param(IS_OB_USER_TZEN(UserConfig2 & FLASH_OPTSR2_TZEN));
1428
1429 /* Set value and mask for TZEN option byte */
1430 optr_reg2_val |= (UserConfig2 & FLASH_OPTSR2_TZEN);
1431 optr_reg2_mask |= FLASH_OPTSR2_TZEN;
1432 }
1433 #endif /* FLASH_OPTSR2_TZEN */
1434
1435 /* Check to write first User OB register or/and second one */
1436 if ((UserType & 0xFFFU) != 0U)
1437 {
1438 /* Configure the option bytes register */
1439 MODIFY_REG(FLASH->OPTSR_PRG, optr_reg1_mask, optr_reg1_val);
1440 }
1441 if ((UserType & 0xFF000U) != 0U)
1442 {
1443 /* Configure the option bytes register */
1444 MODIFY_REG(FLASH->OPTSR2_PRG, optr_reg2_mask, optr_reg2_val);
1445 }
1446 }
1447
1448 /**
1449 * @brief Return the FLASH User Option Byte values.
1450 * @param UserConfig1 FLASH User Option Bytes values
1451 * 2M: IWDG_SW(Bit3), WWDG_SW(Bit4), nRST_STOP(Bit 6), nRST_STDY(Bit 7),
1452 * PRODUCT_STATE(Bit[8:15]), IO_VDD_HSLV(Bit 16), IO_VDDTO2_HSLV(Bit 17),
1453 * IWDG_STOP(Bit 20), IWDG_STDBY (Bit 21), BOOT_UBE(Bit[22:29]) and SWAP_BANK(Bit 31).
1454 * 128K: IWDG_SW(Bit3), WWDG_SW(Bit4), nRST_STOP(Bit 6), nRST_STDY(Bit 7),
1455 * PRODUCT_STATE(Bit[8:15]), IO_VDD_HSLV(Bit16), IO_VDDIO2_HSLV(Bit17), IWDG_STOP(Bit 20),
1456 * IWDG_STDBY (Bit 21) and SWAP_BANK(Bit 31).
1457 * @param UserConfig2 FLASH User Option Bytes values
1458 * 2M: SRAM1_3_RST(Bit2), SRAM2_RST(Bit 3), BKPRAM_ECC(Bit 4), SRAM3_ECC(Bit 5),
1459 * SRAM2_ECC(Bit 6), HUK_PUF(Bit 15),
1460 * 128K: SRAM2_RST(Bit 3), BKPRAM_ECC(Bit 4), SRAM2_ECC(Bit 6),
1461 * SRAM1_RST(Bit9), SRAM1_ECC(Bit10).
1462 * @retval None
1463 */
FLASH_OB_GetUser(uint32_t * UserConfig1,uint32_t * UserConfig2)1464 static void FLASH_OB_GetUser(uint32_t *UserConfig1, uint32_t *UserConfig2)
1465 {
1466 (*UserConfig1) = FLASH->OPTSR_CUR & (~FLASH_OPTSR_PRODUCT_STATE);
1467
1468 (*UserConfig2) = FLASH->OPTSR2_CUR;
1469 }
1470
1471 /**
1472 * @brief Configure Boot address
1473 * @param BootOption specifies the Boot address option byte to be programmed.
1474 * This parameter can be one of the following values:
1475 * @arg OB_BOOTADDR_NS: Non-secure boot address
1476 * @arg OB_BOOTADDR_SEC: Secure boot address
1477 * @param BootAddress: specifies the boot address value
1478 * This parameter can be sector number between 0 and 0xFFFFFF00
1479 * @retval None
1480 */
FLASH_OB_BootAddrConfig(uint32_t BootOption,uint32_t BootAddress)1481 static void FLASH_OB_BootAddrConfig(uint32_t BootOption, uint32_t BootAddress)
1482 {
1483 /* Check the parameters */
1484 assert_param(IS_OB_BOOT_CONFIG(BootOption));
1485
1486 if (BootOption == OB_BOOT_NS)
1487 {
1488 MODIFY_REG(FLASH->NSBOOTR_PRG, FLASH_BOOTR_BOOTADD, BootAddress);
1489 }
1490 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1491 else if (BootOption == OB_BOOT_SEC)
1492 {
1493 MODIFY_REG(FLASH->SECBOOTR_PRG, FLASH_BOOTR_BOOTADD, BootAddress);
1494 }
1495 #endif /* __ARM_FEATURE_CMSE */
1496 else
1497 {
1498 /* Empty statement (to be compliant MISRA 15.7) */
1499 }
1500 }
1501
1502 /**
1503 * @brief Configure the boot lock.
1504 *
1505 * @param BootOption select the BOOT_LOCK option: secure or non-secure.
1506 * This parameter can be one of the following values:
1507 * @arg OB_BOOT_LOCK_SEC: Boot Lock mode deactivated
1508 * @arg OB_BOOT_LOCK_NS: Boot Lock mode activated
1509 *
1510 * @param BootLockConfig specifies the activation of the BOOT_LOCK.
1511 * This parameter can be one of the following values:
1512 * @arg OB_BOOT_LOCK_DISABLE: Boot Lock mode deactivated
1513 * @arg OB_BOOT_LOCK_ENABLE: Boot Lock mode activated
1514 *
1515 * @retval None
1516 */
FLASH_OB_BootLockConfig(uint32_t BootOption,uint32_t BootLockConfig)1517 static void FLASH_OB_BootLockConfig(uint32_t BootOption, uint32_t BootLockConfig)
1518 {
1519 /* Check the parameters */
1520 assert_param(IS_OB_BOOT_CONFIG(BootOption));
1521 assert_param(IS_OB_BOOT_LOCK(BootLockConfig));
1522
1523 /* Configure the option bytes register */
1524 if (BootOption == OB_BOOT_NS)
1525 {
1526 MODIFY_REG(FLASH->NSBOOTR_PRG, FLASH_BOOTR_BOOT_LOCK, BootLockConfig);
1527 }
1528 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1529 else if (BootOption == OB_BOOT_SEC)
1530 {
1531 MODIFY_REG(FLASH->SECBOOTR_PRG, FLASH_BOOTR_BOOT_LOCK, BootLockConfig);
1532 }
1533 #endif /* __ARM_FEATURE_CMSE */
1534 else
1535 {
1536 /* Empty statement (to be compliant MISRA 15.7) */
1537 }
1538 }
1539
1540 /**
1541 * @brief Get the boot configuration
1542 * @param[in] BootOption specifies the boot address option byte to be returned.
1543 * This parameter can be one of the following values:
1544 * @arg OB_BOOT_NS: Non-secure boot address
1545 * @arg OB_BOOT_SEC: Secure boot address
1546 *
1547 * @param[out] BootAddress specifies the boot address value
1548 *
1549 * @param[out] BootLockConfig returns the activation of the BOOT_LOCK.
1550 * This parameter can be one of the following values:
1551 * @arg OB_BOOT_LOCK_DISABLE: Boot Lock mode deactivated
1552 * @arg OB_BOOT_LOCK_ENABLE: Boot Lock mode activated
1553 * @retval None
1554 */
FLASH_OB_GetBootConfig(uint32_t BootOption,uint32_t * BootAddress,uint32_t * BootLockConfig)1555 static void FLASH_OB_GetBootConfig(uint32_t BootOption, uint32_t *BootAddress, uint32_t *BootLockConfig)
1556 {
1557 if (BootOption == OB_BOOT_NS)
1558 {
1559 *BootAddress = FLASH->NSBOOTR_CUR & FLASH_BOOTR_BOOTADD;
1560 *BootLockConfig = FLASH->NSBOOTR_CUR & FLASH_BOOTR_BOOT_LOCK;
1561 }
1562 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1563 else if (BootOption == OB_BOOT_SEC)
1564 {
1565 *BootAddress = (FLASH->SECBOOTR_CUR & FLASH_BOOTR_BOOTADD);
1566 *BootLockConfig = (FLASH->SECBOOTR_CUR & FLASH_BOOTR_BOOT_LOCK);
1567 }
1568 #endif /* __ARM_FEATURE_CMSE */
1569 else
1570 {
1571 /* Empty statement (to be compliant MISRA 15.7) */
1572 }
1573 }
1574
1575 /**
1576 * @brief Configure the OTP Block Lock.
1577 * @param OTP_Block specifies the OTP Block to lock.
1578 * This parameter can be a value of @ref FLASH_OTP_Blocks
1579 * @retval None
1580 */
FLASH_OB_OTP_LockConfig(uint32_t OTP_Block)1581 static void FLASH_OB_OTP_LockConfig(uint32_t OTP_Block)
1582 {
1583 /* Configure the OTP Block lock in the option bytes register */
1584 FLASH->OTPBLR_PRG |= OTP_Block;
1585 }
1586
1587 /**
1588 * @brief Get the OTP Block Lock.
1589 * @retval OTP_Block specifies the OTP Block to lock.
1590 * This return value can be a value of @ref FLASH_OTP_Blocks
1591 */
FLASH_OB_OTP_GetLock(void)1592 static uint32_t FLASH_OB_OTP_GetLock(void)
1593 {
1594 return (FLASH->OTPBLR_CUR);
1595 }
1596
1597 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1598 /**
1599 * @brief Configure the watermark-based secure area.
1600 *
1601 * @param Banks specifies the bank where to apply Watermark protection
1602 * This parameter can be one of the following values:
1603 * @arg FLASH_BANK_1: configure Watermark on bank1
1604 * @arg FLASH_BANK_2: configure Watermark on bank2
1605 * @arg FLASH_BANK_BOTH: configure Watermark on both bank1 and bank2
1606 *
1607 * @param WMSecStartSector specifies the start sector of the secure area
1608 * This parameter can be sector number between 0 and (max number of sectors in the bank - 1)
1609 *
1610 * @param WMSecEndSector specifies the end sector of the secure area
1611 * This parameter can be sector number between WMSecStartSector and WMSecEndSector(max number of sectors
1612 * in the bank - 1)
1613 *
1614 * @retval None
1615 */
FLASH_OB_WMSECConfig(uint32_t Banks,uint32_t WMSecStartSector,uint32_t WMSecEndSector)1616 static void FLASH_OB_WMSECConfig(uint32_t Banks, uint32_t WMSecStartSector, uint32_t WMSecEndSector)
1617 {
1618 /* Check the parameters */
1619 assert_param(IS_FLASH_BANK(Banks));
1620 assert_param(IS_FLASH_SECTOR(WMSecStartSector));
1621 assert_param(IS_FLASH_SECTOR(WMSecEndSector));
1622
1623 /* Write SECWM registers */
1624 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
1625 {
1626 /* Configure Watermark Protection for bank 1 */
1627 FLASH->SECWM1R_PRG = ((WMSecEndSector << FLASH_SECWMR_SECWM_END_Pos) | WMSecStartSector);
1628 }
1629
1630 if ((Banks & FLASH_BANK_2) == FLASH_BANK_2)
1631 {
1632 /* Configure Watermark Protection for bank 2 */
1633 FLASH->SECWM2R_PRG = ((WMSecEndSector << FLASH_SECWMR_SECWM_END_Pos) | WMSecStartSector);
1634 }
1635 }
1636
1637 /**
1638 * @brief Return the watermark-based secure area configuration.
1639 *
1640 * @param Bank [in] specifies the bank where to get the watermark protection.
1641 * This parameter can be exclusively one of the following values:
1642 * @arg FLASH_BANK_1: Get bank1 watermark configuration
1643 * @arg FLASH_BANK_2: Get bank2 watermark configuration
1644 *
1645 * @param WMSecStartSector [out] specifies the start sector of the secure area
1646 *
1647 * @param WMSecEndSector [out] specifies the end sector of the secure area
1648 *
1649 * @retval None
1650 */
FLASH_OB_GetWMSEC(uint32_t Bank,uint32_t * WMSecStartSector,uint32_t * WMSecEndSector)1651 static void FLASH_OB_GetWMSEC(uint32_t Bank, uint32_t *WMSecStartSector, uint32_t *WMSecEndSector)
1652 {
1653 uint32_t regvalue = 0U;
1654
1655 /* Read SECWM register */
1656 if (Bank == FLASH_BANK_1)
1657 {
1658 regvalue = FLASH->SECWM1R_CUR;
1659 }
1660
1661 if (Bank == FLASH_BANK_2)
1662 {
1663 regvalue = FLASH->SECWM2R_CUR;
1664 }
1665
1666 /* Get configuration of secure area */
1667 *WMSecStartSector = (regvalue & FLASH_SECWMR_SECWM_STRT);
1668 *WMSecEndSector = ((regvalue & FLASH_SECWMR_SECWM_END) >> FLASH_SECWMR_SECWM_END_Pos);
1669 }
1670 #endif /* __ARM_FEATURE_CMSE */
1671
1672 /**
1673 * @brief Configure the hide protection area.
1674 *
1675 * @param Banks specifies the bank where to apply hide protection
1676 * This parameter can be one of the following values:
1677 * @arg FLASH_BANK_1: configure HDP on bank1
1678 * @arg FLASH_BANK_2: configure HDP on bank2
1679 * @arg FLASH_BANK_BOTH: configure HDP on both bank1 and bank2
1680 *
1681 * @param HDPStartSector specifies the start sector of the hide protection area
1682 * This parameter can be sector number between 0 and (max number of sectors in the bank - 1)
1683 *
1684 * @param HDPEndSector specifies the end sector of the hide protection area
1685 * This parameter can be sector number between HDPStartSector and HDPEndSector (max number of sectors
1686 * in the bank - 1)
1687 *
1688 * @retval None
1689 */
FLASH_OB_HDPConfig(uint32_t Banks,uint32_t HDPStartSector,uint32_t HDPEndSector)1690 static void FLASH_OB_HDPConfig(uint32_t Banks, uint32_t HDPStartSector, uint32_t HDPEndSector)
1691 {
1692 /* Check the parameters */
1693 assert_param(IS_FLASH_BANK(Banks));
1694 assert_param(IS_FLASH_SECTOR(HDPStartSector));
1695 assert_param(IS_FLASH_SECTOR(HDPEndSector));
1696
1697 /* Write HDP registers */
1698 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
1699 {
1700 /* Configure hide Protection for bank 1 */
1701 FLASH->HDP1R_PRG = ((HDPEndSector << FLASH_HDPR_HDP_END_Pos) | HDPStartSector);
1702 }
1703
1704 if ((Banks & FLASH_BANK_2) == FLASH_BANK_2)
1705 {
1706 /* Configure hide Protection for bank 2 */
1707 FLASH->HDP2R_PRG = ((HDPEndSector << FLASH_HDPR_HDP_END_Pos) | HDPStartSector);
1708 }
1709 }
1710
1711 /**
1712 * @brief Return the hide protection area configuration.
1713 *
1714 * @param Bank [in] specifies the bank where to get the HDP protection.
1715 * This parameter can be exclusively one of the following values:
1716 * @arg FLASH_BANK_1: Get bank1 HDP configuration
1717 * @arg FLASH_BANK_2: Get bank2 HDP configuration
1718 *
1719 * @param HDPStartSector [out] specifies the start sector of the HDP area
1720 *
1721 * @param HDPEndSector [out] specifies the end sector of the HDP area
1722 *
1723 * @retval None
1724 */
FLASH_OB_GetHDP(uint32_t Bank,uint32_t * HDPStartSector,uint32_t * HDPEndSector)1725 static void FLASH_OB_GetHDP(uint32_t Bank, uint32_t *HDPStartSector, uint32_t *HDPEndSector)
1726 {
1727 uint32_t regvalue = 0U;
1728
1729 /* Read SECWM register */
1730 if (Bank == FLASH_BANK_1)
1731 {
1732 regvalue = FLASH->HDP1R_CUR;
1733 }
1734
1735 if (Bank == FLASH_BANK_2)
1736 {
1737 regvalue = FLASH->HDP2R_CUR;
1738 }
1739
1740 /* Get configuration of HDP area */
1741 *HDPStartSector = (regvalue & FLASH_HDPR_HDP_STRT);
1742 *HDPEndSector = ((regvalue & FLASH_HDPR_HDP_END) >> FLASH_HDPR_HDP_END_Pos);
1743 }
1744
1745 #if defined(FLASH_EDATAR_EDATA_EN)
1746 /**
1747 * @brief Configure the Flash high-cycle area.
1748 *
1749 * @param Banks specifies the bank where to apply Flash high-cycle data area
1750 * This parameter can be one of the following values:
1751 * @arg FLASH_BANK_1: configure Flash high-cycle area on bank1
1752 * @arg FLASH_BANK_2: configure Flash high-cycle area on bank2
1753 * @arg FLASH_BANK_BOTH: configure Flash high-cycle area on both bank1 and bank2
1754 *
1755 * @param EDATASize specifies the size (in sectors) of the Flash high-cycle data area
1756 * This parameter can be sectors number between 0 and 8
1757 *
1758 * @retval None
1759 */
FLASH_OB_EDATAConfig(uint32_t Banks,uint32_t EDATASize)1760 static void FLASH_OB_EDATAConfig(uint32_t Banks, uint32_t EDATASize)
1761 {
1762 /* Check the parameters */
1763 assert_param(IS_FLASH_BANK(Banks));
1764 assert_param(IS_FLASH_EDATA_SIZE(EDATASize));
1765
1766 if (EDATASize != 0U)
1767 {
1768 /* Write EDATA registers */
1769 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
1770 {
1771 /* Configure Flash high-cycle data for bank 1 */
1772 FLASH->EDATA1R_PRG = (FLASH_EDATAR_EDATA_EN | (EDATASize - 1U));
1773 }
1774
1775 if ((Banks & FLASH_BANK_2) == FLASH_BANK_2)
1776 {
1777 /* Configure Flash high-cycle data for bank 2 */
1778 FLASH->EDATA2R_PRG = (FLASH_EDATAR_EDATA_EN | (EDATASize - 1U));
1779 }
1780 }
1781 else
1782 {
1783 /* Write EDATA registers */
1784 if ((Banks & FLASH_BANK_1) == FLASH_BANK_1)
1785 {
1786 /* de-activate Flash high-cycle data for bank 1 */
1787 FLASH->EDATA1R_PRG = 0U;
1788 }
1789
1790 if ((Banks & FLASH_BANK_2) == FLASH_BANK_2)
1791 {
1792 /* de-activate Flash high-cycle data for bank 2 */
1793 FLASH->EDATA2R_PRG = 0U;
1794 }
1795 }
1796 }
1797
1798 /**
1799 * @brief Return the Flash high-cycle data area configuration.
1800 *
1801 * @param Bank [in] specifies the bank where to get the Flash high-cycle data configuration.
1802 * This parameter can be exclusively one of the following values:
1803 * @arg FLASH_BANK_1: Get bank1 Flash high-cycle data configuration
1804 * @arg FLASH_BANK_2: Get bank2 Flash high-cycle data configuration
1805 *
1806 * @param EDATASize [out] specifies the size (in sectors) of the Flash high-cycle data area
1807 *
1808 * @retval None
1809 */
FLASH_OB_GetEDATA(uint32_t Bank,uint32_t * EDATASize)1810 static void FLASH_OB_GetEDATA(uint32_t Bank, uint32_t *EDATASize)
1811 {
1812 uint32_t regvalue = 0U;
1813
1814 /* Read SECWM register */
1815 if (Bank == FLASH_BANK_1)
1816 {
1817 regvalue = FLASH->EDATA1R_CUR;
1818 }
1819
1820 if (Bank == FLASH_BANK_2)
1821 {
1822 regvalue = FLASH->EDATA2R_CUR;
1823 }
1824
1825 /* Get configuration of secure area */
1826 *EDATASize = (regvalue & FLASH_EDATAR_EDATA_STRT);
1827 }
1828 #endif /* FLASH_EDATAR_EDATA_EN */
1829
1830 /**
1831 * @}
1832 */
1833
1834 #endif /* HAL_FLASH_MODULE_ENABLED */
1835
1836 /**
1837 * @}
1838 */
1839
1840 /**
1841 * @}
1842 */
1843
