1 /*
2  * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
3  * Copyright 2019-2020 NXP. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
7  */
8 
9 #include "tfm_plat_defs.h"
10 #include "tfm_plat_test.h"
11 #include "device_definition.h"
12 #include "tfm_peripherals_def.h"
13 
14 #define TIMER_RELOAD_VALUE          (CTIMER_CLK_FREQ * 1) /* 1 sec */
15 
16 #if (__ARM_FEATURE_CMSE & 0x2) /* Secure */
17 
18 #if defined(TFM_PARTITION_SLIH_TEST) || defined(TFM_PARTITION_FLIH_TEST)
19 
20 extern void TFM_TIMER0_IRQ_Handler(void); /* Implemented in secure_fw\core\tfm_secure_irq_handlers.inc */
21 
CTIMER_IRQ_HANDLER(void)22 void CTIMER_IRQ_HANDLER(void)
23 {
24     uint32_t int_stat = CTIMER_GetStatusFlags(CTIMER); /* Get Interrupt status flags */
25 
26     /* Clear the status flags that were set */
27     CTIMER_ClearStatusFlags(CTIMER, int_stat);
28 
29     TFM_TIMER0_IRQ_Handler(); /* Call the TFM handler. */
30 }
31 
tfm_plat_test_secure_timer_clear_intr(void)32 void tfm_plat_test_secure_timer_clear_intr(void)
33 {
34     uint32_t int_stat = CTIMER_GetStatusFlags(CTIMER); /* Get Interrupt status flags */
35 
36     /* Clear the status flags that were set */
37     CTIMER_ClearStatusFlags(CTIMER, int_stat);
38 }
39 
tfm_plat_test_secure_timer_start(void)40 void tfm_plat_test_secure_timer_start(void)
41 {
42     /* Match Configuration */
43     ctimer_match_config_t matchConfig;
44     ctimer_config_t config;
45 
46 #if defined(CPU_LPC55S36JBD100)
47     /* Use 12 MHz clock for some of the Ctimer */
48     CLOCK_SetClkDiv(kCLOCK_DivCtimer2Clk, 0u, false);
49     CLOCK_SetClkDiv(kCLOCK_DivCtimer2Clk, 1u, true);
50 #endif
51     CLOCK_AttachClk(CTIMER_CLK_ATTACH);
52 
53     CTIMER_GetDefaultConfig(&config);
54     CTIMER_Init(CTIMER, &config);
55 
56     /* Initializes the configure structure. */
57     memset(&matchConfig, 0, sizeof(matchConfig));
58     matchConfig.enableCounterReset = true;
59     matchConfig.enableCounterStop  = false;
60     matchConfig.matchValue        = TIMER_RELOAD_VALUE;
61     matchConfig.enableInterrupt    = true;
62     CTIMER_SetupMatch(CTIMER, kCTIMER_Match_0, &matchConfig);
63 
64     CTIMER_StartTimer(CTIMER);
65 }
66 
tfm_plat_test_secure_timer_stop(void)67 void tfm_plat_test_secure_timer_stop(void)
68 {
69     CTIMER_Deinit(CTIMER);
70 }
71 
72 #endif /* (TFM_PARTITION_SLIH_TEST || TFM_PARTITION_FLIH_TEST) */
73 
74 #else
75 
CTIMER_NS_IRQ_HANDLER(void)76 void CTIMER_NS_IRQ_HANDLER(void)
77 {
78     uint32_t int_stat = CTIMER_GetStatusFlags(CTIMER_NS); /* Get Interrupt status flags */
79 
80     /* Clear the status flags that were set */
81     CTIMER_ClearStatusFlags(CTIMER_NS, int_stat);
82 }
83 
tfm_plat_test_non_secure_timer_start(void)84 void tfm_plat_test_non_secure_timer_start(void)
85 {
86     /* Match Configuration */
87     ctimer_match_config_t matchConfig;
88     ctimer_config_t config;
89 
90     /* Use 12 MHz clock for some of the Ctimer */
91     CLOCK_AttachClk(CTIMER_NS_CLK_ATTACH);
92 
93     CTIMER_GetDefaultConfig(&config);
94     CTIMER_Init(CTIMER_NS, &config);
95 
96     /* Initializes the configure structure. */
97     memset(&matchConfig, 0, sizeof(matchConfig));
98     matchConfig.enableCounterReset = true;
99     matchConfig.enableCounterStop  = true;
100     matchConfig.matchValue         = TIMER_RELOAD_VALUE;
101     matchConfig.enableInterrupt    = true;
102     CTIMER_SetupMatch(CTIMER_NS, kCTIMER_Match_0, &matchConfig);
103 
104     CTIMER_StartTimer(CTIMER_NS);
105 }
106 
tfm_plat_test_non_secure_timer_stop(void)107 void tfm_plat_test_non_secure_timer_stop(void)
108 {
109     CTIMER_Deinit(CTIMER_NS);
110 }
111 
112 #endif /* (__ARM_FEATURE_CMSE & 0x2) */
113