1;/* 2; * Copyright (c) 2022-2024 Arm Limited. All rights reserved. 3; * 4; * Licensed under the Apache License, Version 2.0 (the "License"); 5; * you may not use this file except in compliance with the License. 6; * You may obtain a copy of the License at 7; * 8; * http://www.apache.org/licenses/LICENSE-2.0 9; * 10; * Unless required by applicable law or agreed to in writing, software 11; * distributed under the License is distributed on an "AS IS" BASIS, 12; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13; * See the License for the specific language governing permissions and 14; * limitations under the License. 15; * 16; * 17; * This file is derivative of CMSIS V5.00 gcc_arm.ld 18; */ 19 20/* Linker script to configure memory regions. */ 21/* This file will be run trough the pre-processor. */ 22 23#include "region_defs.h" 24 25MEMORY 26{ 27 FLASH (rx) : ORIGIN = BL2_CODE_START, LENGTH = BL2_CODE_SIZE 28 RAM (rwx) : ORIGIN = BL2_DATA_START, LENGTH = BL2_DATA_SIZE 29} 30 31__heap_size__ = BL2_HEAP_SIZE; 32__msp_stack_size__ = BL2_MSP_STACK_SIZE; 33 34ENTRY(Reset_Handler) 35 36SECTIONS 37{ 38 .text (READONLY) : 39 { 40 KEEP(*(.vectors)) 41 __Vectors_End = .; 42 __Vectors_Size = __Vectors_End - __Vectors; 43 __end__ = .; 44 45 *(.text*) 46 47 . = ALIGN(4); 48 /* preinit data */ 49 PROVIDE_HIDDEN (__preinit_array_start = .); 50 KEEP(*(.preinit_array)) 51 PROVIDE_HIDDEN (__preinit_array_end = .); 52 53 . = ALIGN(4); 54 /* init data */ 55 PROVIDE_HIDDEN (__init_array_start = .); 56 KEEP(*(SORT(.init_array.*))) 57 KEEP(*(.init_array)) 58 PROVIDE_HIDDEN (__init_array_end = .); 59 60 . = ALIGN(4); 61 /* finit data */ 62 PROVIDE_HIDDEN (__fini_array_start = .); 63 KEEP(*(SORT(.fini_array.*))) 64 KEEP(*(.fini_array)) 65 PROVIDE_HIDDEN (__fini_array_end = .); 66 67 /* .copy.table */ 68 . = ALIGN(4); 69 __copy_table_start__ = .; 70#ifdef CODE_SHARING 71 LONG (LOADADDR(.tfm_shared_symbols)) 72 LONG (ADDR(.tfm_shared_symbols)) 73 LONG (SIZEOF(.tfm_shared_symbols) / 4) 74#endif 75 LONG (LOADADDR(.data)) 76 LONG (ADDR(.data)) 77 LONG (SIZEOF(.data) / 4) 78 __copy_table_end__ = .; 79 80 /* .zero.table */ 81 . = ALIGN(4); 82 __zero_table_start__ = .; 83 LONG (ADDR(.bss)) 84 LONG (SIZEOF(.bss) / 4) 85 __zero_table_end__ = .; 86 87 KEEP(*(.init)) 88 KEEP(*(.fini)) 89 90 /* .ctors */ 91 *crtbegin.o(.ctors) 92 *crtbegin?.o(.ctors) 93 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) 94 *(SORT(.ctors.*)) 95 *(.ctors) 96 97 /* .dtors */ 98 *crtbegin.o(.dtors) 99 *crtbegin?.o(.dtors) 100 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) 101 *(SORT(.dtors.*)) 102 *(.dtors) 103 104 *(.rodata*) 105 106 KEEP(*(.eh_frame*)) 107 } > FLASH 108 109 .ARM.extab : 110 { 111 *(.ARM.extab* .gnu.linkonce.armextab.*) 112 } > FLASH 113 114 __exidx_start = .; 115 .ARM.exidx : 116 { 117 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 118 } > FLASH 119 __exidx_end = .; 120 121#ifdef CODE_SHARING 122 /* The code sharing between bootloader and runtime firmware requires to 123 * share the global variables. Section size must be equal with 124 * SHARED_SYMBOL_AREA_SIZE defined in region_defs.h 125 */ 126 .tfm_shared_symbols : ALIGN(4) 127 { 128 *(.data.mbedtls_calloc_func) 129 *(.data.mbedtls_free_func) 130 *(.data.mbedtls_exit) 131 *(.data.memset_func) 132 . = ALIGN(SHARED_SYMBOL_AREA_SIZE); 133 } > RAM AT > FLASH 134 135 ASSERT(SHARED_SYMBOL_AREA_SIZE % 4 == 0, "SHARED_SYMBOL_AREA_SIZE must be divisible by 4") 136#endif 137 138 .tfm_bl2_shared_data : ALIGN(32) 139 { 140 . += BOOT_TFM_SHARED_DATA_SIZE; 141 } > RAM 142 Image$$SHARED_DATA$$RW$$Base = ADDR(.tfm_bl2_shared_data); 143 Image$$SHARED_DATA$$RW$$Limit = ADDR(.tfm_bl2_shared_data) + SIZEOF(.tfm_bl2_shared_data); 144 145 .data : ALIGN(4) 146 { 147 *(vtable) 148 *(.data*) 149 150 KEEP(*(.jcr*)) 151 . = ALIGN(4); 152 153 } > RAM AT > FLASH 154 Image$$ER_DATA$$Base = ADDR(.data); 155 156 .bss : ALIGN(4) 157 { 158 . = ALIGN(4); 159 __bss_start__ = .; 160 *(.bss*) 161 *(COMMON) 162 . = ALIGN(4); 163 __bss_end__ = .; 164 } > RAM 165 166#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 167 .msp_stack (NOLOAD) : ALIGN(32) 168 { 169 . += __msp_stack_size__ - 0x8; 170 } > RAM 171 Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack); 172 Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack); 173 174 .msp_stack_seal_res : 175 { 176 . += 0x8; 177 } > RAM 178 __StackSeal = ADDR(.msp_stack_seal_res); 179 180#else 181 .msp_stack (NOLOAD) : ALIGN(32) 182 { 183 . += __msp_stack_size__; 184 } > RAM 185 Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack); 186 Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack); 187 188#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ 189 190 .heap (NOLOAD): ALIGN(8) 191 { 192 . = ALIGN(8); 193 __end__ = .; 194 PROVIDE(end = .); 195 __HeapBase = .; 196 . += __heap_size__; 197 __HeapLimit = .; 198 __heap_limit = .; /* Add for _sbrk */ 199 } > RAM 200 Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap); 201 202 PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit); 203} 204