1/*
2 * Copyright (c) 2021 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <xtensa/xtensa.dtsi>
8#include <dt-bindings/i2c/i2c.h>
9#include <mem.h>
10
11/ {
12	cpus {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		cpu0: cpu@0 {
17			device_type = "cpu";
18			compatible = "cdns,tensilica-xtensa-lx6";
19			reg = <0>;
20		};
21	};
22
23	sram0: memory@92400000 {
24		device_type = "memory";
25		compatible = "mmio-sram";
26		reg = <0x92400000 DT_SIZE_K(512)>;
27	};
28
29	sram1: memory@92c00000 {
30		device_type = "memory";
31		compatible = "mmio-sram";
32		reg = <0x92c00000 DT_SIZE_K(512)>;
33	};
34};
35