1/*
2 * Copyright (c) 2023 ENE Technology Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <freq.h>
8#include <arm/armv7-m.dtsi>
9
10/ {
11	chosen {
12		zephyr,sram = &sram0;
13		zephyr,flash = &flash0;
14	};
15
16	cpus {
17		#address-cells = <1>;
18		#size-cells = <0>;
19
20		cpu@0 {
21			device_type = "cpu";
22			compatible = "arm,cortex-m4";
23			reg = <0>;
24			clock-frequency = <DT_FREQ_M(48)>;
25		};
26	};
27
28	sram0: memory@20040000 {
29		compatible = "mmio-sram";
30		reg = <0x20040000 0x10000>;
31	};
32
33	soc {
34		flash-controller@50100000 {
35			compatible = "ene,kb1200-flash-controller";
36			reg = <0x50100000 0x2000>;
37			#address-cells = <1>;
38			#size-cells = <1>;
39
40			flash0: flash@10000000 {
41				compatible = "soc-nv-flash";
42				reg = <0x10000000 0x40000>;
43			};
44		};
45
46		pmu: pmu@40010000 {
47			compatible = "ene,kb1200-pmu";
48			reg = <0x40010000 0x100>;
49		};
50
51		gcfg: gcfg@40000000 {
52			compatible = "ene,kb1200-gcfg";
53			reg = <0x40000000 0x100>;
54		};
55
56		pinctrl: pin-controller@50000000 {
57			compatible = "ene,kb1200-pinctrl";
58			#address-cells = <1>;
59			#size-cells = <1>;
60			reg = <0x50000000 0x100>;
61			status = "okay";
62			gpio0x1x: gpio@50000000 {
63				compatible = "ene,kb1200-gpio";
64				reg = <0x50000000 0x04>, <0x50010000 0x04>;
65				interrupts = <2 3>, <3 3>;
66				gpio-controller;
67				#gpio-cells = <2>;
68				ngpios = <32>;
69				status = "disabled";
70			};
71
72			gpio2x3x: gpio@50000004 {
73				compatible = "ene,kb1200-gpio";
74				reg = <0x50000004 0x04>, <0x50010004 0x04>;
75				interrupts = <4 3>, <5 3>;
76				gpio-controller;
77				#gpio-cells = <2>;
78				ngpios = <32>;
79				status = "disabled";
80			};
81
82			gpio4x5x: gpio@50000008 {
83				compatible = "ene,kb1200-gpio";
84				reg = <0x50000008 0x04>, <0x50010008 0x04>;
85				interrupts = <6 3>, <7 3>;
86				gpio-controller;
87				#gpio-cells = <2>;
88				ngpios = <32>;
89				status = "disabled";
90			};
91
92			gpio6x7x: gpio@5000000c {
93				compatible = "ene,kb1200-gpio";
94				reg = <0x5000000C 0x04>, <0x5001000C 0x04>;
95				interrupts = <8 3>, <9 3>;
96				gpio-controller;
97				#gpio-cells = <2>;
98				ngpios = <32>;
99				status = "disabled";
100			};
101		};
102
103		uart0: serial@40310000 {
104			compatible = "ene,kb1200-uart";
105			reg = <0x40310000 0x4c>;
106			interrupts = <20 3>;
107			current-speed = <115200>;
108			status = "disabled";
109		};
110
111		uart1: serial@40310020 {
112			compatible = "ene,kb1200-uart";
113			reg = <0x40310020 0x4c>;
114			interrupts = <20 3>;
115			current-speed = <115200>;
116			status = "disabled";
117		};
118
119		uart2: serial@40310040 {
120			compatible = "ene,kb1200-uart";
121			reg = <0x40310040 0x4c>;
122			interrupts = <20 3>;
123			current-speed = <115200>;
124			status = "disabled";
125		};
126
127		adc0: adc0@40130000 {
128			compatible = "ene,kb1200-adc";
129			reg = <0x40130000 0x100>;
130			status = "disabled";
131			#io-channel-cells = <1>;
132		};
133
134		pwm0: pwm@40210000 {
135			compatible = "ene,kb1200-pwm";
136			reg = <0x40210000 0x10>;
137			#pwm-cells = <3>;
138			status = "disabled";
139		};
140
141		pwm1: pwm@40210010 {
142			compatible = "ene,kb1200-pwm";
143			reg = <0x40210010 0x10>;
144			#pwm-cells = <3>;
145			status = "disabled";
146		};
147
148		pwm2: pwm@40210020 {
149			compatible = "ene,kb1200-pwm";
150			reg = <0x40210020 0x10>;
151			#pwm-cells = <3>;
152			status = "disabled";
153		};
154
155		pwm3: pwm@40210030 {
156			compatible = "ene,kb1200-pwm";
157			reg = <0x40210030 0x10>;
158			#pwm-cells = <3>;
159			status = "disabled";
160		};
161
162		pwm4: pwm@40210040 {
163			compatible = "ene,kb1200-pwm";
164			reg = <0x40210040 0x10>;
165			#pwm-cells = <3>;
166			status = "disabled";
167		};
168
169		pwm5: pwm@40210050 {
170			compatible = "ene,kb1200-pwm";
171			reg = <0x40210050 0x10>;
172			#pwm-cells = <3>;
173			status = "disabled";
174		};
175
176		pwm6: pwm@40210060 {
177			compatible = "ene,kb1200-pwm";
178			reg = <0x40210060 0x10>;
179			#pwm-cells = <3>;
180			status = "disabled";
181		};
182
183		pwm7: pwm@40210070 {
184			compatible = "ene,kb1200-pwm";
185			reg = <0x40210070 0x10>;
186			#pwm-cells = <3>;
187			status = "disabled";
188		};
189
190		pwm8: pwm@40210080 {
191			compatible = "ene,kb1200-pwm";
192			reg = <0x40210080 0x10>;
193			#pwm-cells = <3>;
194			status = "disabled";
195		};
196
197		pwm9: pwm@40210090 {
198			compatible = "ene,kb1200-pwm";
199			reg = <0x40210090 0x10>;
200			#pwm-cells = <3>;
201			status = "disabled";
202		};
203
204		fanpwm0: pwm@40200000 {
205			compatible = "ene,kb1200-pwm";
206			reg = <0x40200000 0x10>;
207			#pwm-cells = <3>;
208			status = "disabled";
209		};
210
211		fanpwm1: pwm@40200010 {
212			compatible = "ene,kb1200-pwm";
213			reg = <0x40200010 0x10>;
214			#pwm-cells = <3>;
215			status = "disabled";
216		};
217
218		tach0: tach@40100000 {
219			compatible = "ene,kb1200-tach";
220			reg = <0x40100000 0x10>;
221			status = "disabled";
222		};
223
224		tach1: tach@40100010 {
225			compatible = "ene,kb1200-tach";
226			reg = <0x40100010 0x10>;
227			status = "disabled";
228		};
229
230		tach2: tach@40100020 {
231			compatible = "ene,kb1200-tach";
232			reg = <0x40100020 0x10>;
233			status = "disabled";
234		};
235
236		tach3: tach@40100030 {
237			compatible = "ene,kb1200-tach";
238			reg = <0x40100030 0x10>;
239			status = "disabled";
240		};
241
242		wdt0: watchdog@40060000 {
243			compatible = "ene,kb1200-watchdog";
244			reg = <0x40060000 0x100>;
245			interrupts = <0 0>;
246			status = "disabled";
247		};
248
249		i2c0: i2c@40340000 {
250			compatible = "ene,kb1200-i2c";
251			reg = <0x40340000 0x1000>;
252			interrupts = <17 1>;
253			#address-cells = <1>;
254			#size-cells = <0>;
255			status = "disabled";
256		};
257
258		i2c1: i2c@40341000 {
259			compatible = "ene,kb1200-i2c";
260			reg = <0x40341000 0x1000>;
261			interrupts = <17 1>;
262			#address-cells = <1>;
263			#size-cells = <0>;
264			status = "disabled";
265		};
266
267		i2c2: i2c@40342000 {
268			compatible = "ene,kb1200-i2c";
269			reg = <0x40342000 0x1000>;
270			interrupts = <17 1>;
271			#address-cells = <1>;
272			#size-cells = <0>;
273			status = "disabled";
274		};
275
276		i2c3: i2c@40343000 {
277			compatible = "ene,kb1200-i2c";
278			reg = <0x40343000 0x1000>;
279			interrupts = <17 1>;
280			#address-cells = <1>;
281			#size-cells = <0>;
282			status = "disabled";
283		};
284
285		i2c4: i2c@40344000 {
286			compatible = "ene,kb1200-i2c";
287			reg = <0x40344000 0x1000>;
288			interrupts = <17 1>;
289			#address-cells = <1>;
290			#size-cells = <0>;
291			status = "disabled";
292		};
293
294		i2c5: i2c@40345000 {
295			compatible = "ene,kb1200-i2c";
296			reg = <0x40345000 0x1000>;
297			interrupts = <17 1>;
298			#address-cells = <1>;
299			#size-cells = <0>;
300			status = "disabled";
301		};
302
303		i2c6: i2c@40346000 {
304			compatible = "ene,kb1200-i2c";
305			reg = <0x40346000 0x1000>;
306			interrupts = <17 1>;
307			#address-cells = <1>;
308			#size-cells = <0>;
309			status = "disabled";
310		};
311
312		i2c7: i2c@40347000 {
313			compatible = "ene,kb1200-i2c";
314			reg = <0x40347000 0x1000>;
315			interrupts = <17 1>;
316			#address-cells = <1>;
317			#size-cells = <0>;
318			status = "disabled";
319		};
320
321		i2c8: i2c@40348000 {
322			compatible = "ene,kb1200-i2c";
323			reg = <0x40348000 0x1000>;
324			interrupts = <17 1>;
325			#address-cells = <1>;
326			#size-cells = <0>;
327			status = "disabled";
328		};
329
330		i2c9: i2c@40349000 {
331			compatible = "ene,kb1200-i2c";
332			reg = <0x40349000 0x1000>;
333			interrupts = <17 1>;
334			#address-cells = <1>;
335			#size-cells = <0>;
336			status = "disabled";
337		};
338	};
339};
340
341&nvic {
342	arm,num-irq-priority-bits = <3>;
343};
344