1/*
2 * Copyright (c) 2019 Benjamin Valentin
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <atmel/samd2x.dtsi>
8
9#include "samr2x-pinctrl.dtsi"
10
11/ {
12	aliases {
13		port-c = &portc;
14	};
15
16	soc {
17		usb0: usb@41005000 {
18			compatible = "atmel,sam0-usb";
19			status = "disabled";
20			reg = <0x41005000 0x1000>;
21			interrupts = <7 0>;
22			num-bidir-endpoints = <8>;
23			label = "USB0";
24		};
25
26		dmac: dmac@41004800 {
27			compatible = "atmel,sam0-dmac";
28			reg = <0x41004800 0x50>;
29			interrupts = <6 0>;
30			label = "DMA_0";
31			#dma-cells = <2>;
32		};
33
34		pinctrl@41004400 {
35			ranges = <0x41004400 0x41004400 0x180>;
36
37			portc: gpio@41004500 {
38				compatible = "atmel,sam0-gpio";
39				reg = <0x41004500 0x80>;
40				label = "PORTC";
41				gpio-controller;
42				#gpio-cells = <2>;
43				#atmel,pin-cells = <2>;
44			};
45		};
46
47		pinmux_c: pinmux@41004500 {
48			compatible = "atmel,sam0-pinmux";
49			reg = <0x41004500 0x80>;
50		};
51
52		tcc0: tcc@42002000 {
53			compatible = "atmel,sam0-tcc";
54			reg = <0x42002000 0x80>;
55			interrupts = <15 0>;
56			label = "TCC_0";
57			clocks = <&gclk 26>, <&pm 0x20 8>;
58			clock-names = "GCLK", "PM";
59
60			channels = <4>;
61			counter-size = <24>;
62		};
63
64		tcc1: tcc@42002400 {
65			compatible = "atmel,sam0-tcc";
66			reg = <0x42002400 0x80>;
67			interrupts = <16 0>;
68			label = "TCC_1";
69			clocks = <&gclk 26>, <&pm 0x20 9>;
70			clock-names = "GCLK", "PM";
71
72			channels = <2>;
73			counter-size = <24>;
74		};
75
76		tcc2: tcc@42002800 {
77			compatible = "atmel,sam0-tcc";
78			reg = <0x42002800 0x80>;
79			interrupts = <17 0>;
80			label = "TCC_2";
81			clocks = <&gclk 27>, <&pm 0x20 10>;
82			clock-names = "GCLK", "PM";
83
84			channels = <2>;
85			counter-size = <16>;
86		};
87	};
88};
89
90&sercom0 {
91	interrupts = <9 0>;
92	clocks = <&gclk 0x14>, <&pm 0x20 2>;
93	clock-names = "GCLK", "PM";
94};
95
96&sercom1 {
97	interrupts = <10 0>;
98	clocks = <&gclk 0x15>, <&pm 0x20 3>;
99	clock-names = "GCLK", "PM";
100};
101
102&sercom2 {
103	interrupts = <11 0>;
104	clocks = <&gclk 0x16>, <&pm 0x20 4>;
105	clock-names = "GCLK", "PM";
106};
107
108&sercom3 {
109	interrupts = <12 0>;
110	clocks = <&gclk 0x17>, <&pm 0x20 5>;
111	clock-names = "GCLK", "PM";
112};
113
114&sercom4 {
115	interrupts = <13 0>;
116	clocks = <&gclk 0x18>, <&pm 0x20 6>;
117	clock-names = "GCLK", "PM";
118};
119
120&sercom5 {
121	interrupts = <14 0>;
122	clocks = <&gclk 0x19>, <&pm 0x20 7>;
123	clock-names = "GCLK", "PM";
124};
125
126&tc4 {
127	interrupts = <19 0>;
128	clocks = <&gclk 0x1c>, <&pm 0x20 12>;
129	clock-names = "GCLK", "PM";
130};
131
132&adc {
133	clocks = <&gclk 0x1e>, <&pm 0x20 16>;
134	clock-names = "GCLK", "PM";
135	interrupts = <23 0>;
136	interrupt-names = "resrdy";
137};
138