1/* 2 * Copyright (c) 2019 Gerson Fernando Budke 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv7-m.dtsi> 8#include <zephyr/dt-bindings/adc/adc.h> 9#include <zephyr/dt-bindings/i2c/i2c.h> 10#include <zephyr/dt-bindings/gpio/gpio.h> 11#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h> 12 13/ { 14 aliases { 15 watchdog0 = &wdt; 16 }; 17 18 chosen { 19 zephyr,flash-controller = &eefc; 20 }; 21 22 cpus { 23 #address-cells = <1>; 24 #size-cells = <0>; 25 26 cpu0: cpu@0 { 27 device_type = "cpu"; 28 compatible = "arm,cortex-m4f"; 29 reg = <0>; 30 #address-cells = <1>; 31 #size-cells = <1>; 32 33 mpu: mpu@e000ed90 { 34 compatible = "arm,armv7m-mpu"; 35 reg = <0xe000ed90 0x40>; 36 }; 37 }; 38 }; 39 40 soc { 41 pmc: pmc@400e0400 { 42 compatible = "atmel,sam-pmc"; 43 reg = <0x400e0400 0x200>; 44 interrupts = <5 0>; 45 #clock-cells = <2>; 46 status = "okay"; 47 }; 48 49 supc: supc@400e1810 { 50 compatible = "atmel,sam-supc"; 51 reg = <0x400e1810 0x20>; 52 #wakeup-source-id-cells = <1>; 53 status = "okay"; 54 }; 55 56 sram0: memory@20000000 { 57 compatible = "mmio-sram"; 58 }; 59 60 afec0: adc@400b0000 { 61 compatible = "atmel,sam-afec"; 62 reg = <0x400b0000 0x4000>; 63 interrupts = <30 0>; 64 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; 65 status = "disabled"; 66 #io-channel-cells = <1>; 67 }; 68 69 afec1: adc@400b4000 { 70 compatible = "atmel,sam-afec"; 71 reg = <0x400b4000 0x4000>; 72 interrupts = <31 0>; 73 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 74 status = "disabled"; 75 #io-channel-cells = <1>; 76 }; 77 78 eefc: flash-controller@400e0a00 { 79 compatible = "atmel,sam-flash-controller"; 80 reg = <0x400e0a00 0x200>; 81 interrupts = <6 0>; 82 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 83 status = "okay"; 84 85 #address-cells = <1>; 86 #size-cells = <1>; 87 #erase-block-cells = <2>; 88 89 flash0: flash@400000 { 90 compatible = "atmel,sam-flash", "soc-nv-flash"; 91 write-block-size = <8>; 92 erase-block-size = <4096>; 93 }; 94 }; 95 96 wdt: watchdog@400e1850 { 97 compatible = "atmel,sam-watchdog"; 98 reg = <0x400e1850 0x10>; 99 interrupts = <4 0>; 100 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 101 status = "disabled"; 102 }; 103 104 twi0: i2c@400a8000 { 105 compatible = "atmel,sam-i2c-twi"; 106 clock-frequency = <I2C_BITRATE_STANDARD>; 107 reg = <0x400a8000 0x4000>; 108 interrupts = <17 0>; 109 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; 110 status = "disabled"; 111 #address-cells = <1>; 112 #size-cells = <0>; 113 }; 114 115 twi1: i2c@400ac000 { 116 compatible = "atmel,sam-i2c-twi"; 117 clock-frequency = <I2C_BITRATE_STANDARD>; 118 reg = <0x400ac000 0x4000>; 119 interrupts = <18 0>; 120 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 121 status = "disabled"; 122 #address-cells = <1>; 123 #size-cells = <0>; 124 }; 125 126 spi0: spi@40088000 { 127 compatible = "atmel,sam-spi"; 128 #address-cells = <1>; 129 #size-cells = <0>; 130 reg = <0x40088000 0x4000>; 131 interrupts = <19 0>; 132 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 133 status = "disabled"; 134 }; 135 136 uart0: uart@400e0600 { 137 compatible = "atmel,sam-uart"; 138 reg = <0x400e0600 0x140>; 139 interrupts = <7 1>; 140 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 141 status = "disabled"; 142 }; 143 144 uart1: uart@40060600 { 145 compatible = "atmel,sam-uart"; 146 reg = <0x40060600 0x200>; 147 interrupts = <45 1>; 148 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; 149 status = "disabled"; 150 }; 151 152 usart0: usart@400a0000 { 153 compatible = "atmel,sam-usart"; 154 reg = <0x400a0000 0x4000>; 155 interrupts = <14 1>; 156 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 157 status = "disabled"; 158 }; 159 160 usart1: usart@400a4000 { 161 compatible = "atmel,sam-usart"; 162 reg = <0x400a4000 0x4000>; 163 interrupts = <15 1>; 164 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 165 status = "disabled"; 166 }; 167 168 gmac: ethernet@40034000 { 169 compatible = "atmel,sam-gmac"; 170 reg = <0x40034000 0x4000>; 171 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; 172 interrupts = <44 0>; 173 interrupt-names = "gmac"; 174 num-queues = <1>; 175 phy-connection-type = "mii"; 176 status = "disabled"; 177 }; 178 179 mdio: mdio@40034000 { 180 compatible = "atmel,sam-mdio"; 181 reg = <0x40034000 0x4000>; 182 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; 183 status = "disabled"; 184 #address-cells = <1>; 185 #size-cells = <0>; 186 }; 187 188 pinctrl: pinctrl@400e0e00 { 189 compatible = "atmel,sam-pinctrl"; 190 #address-cells = <1>; 191 #size-cells = <1>; 192 ranges = <0x400e0e00 0x400e0e00 0xa00>; 193 status = "okay"; 194 195 pioa: gpio@400e0e00 { 196 compatible = "atmel,sam-gpio"; 197 reg = <0x400e0e00 0x200>; 198 interrupts = <9 1>; 199 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 200 gpio-controller; 201 #gpio-cells = <2>; 202 #atmel,pin-cells = <2>; 203 }; 204 205 piob: gpio@400e1000 { 206 compatible = "atmel,sam-gpio"; 207 reg = <0x400e1000 0x200>; 208 interrupts = <10 1>; 209 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 210 gpio-controller; 211 #gpio-cells = <2>; 212 #atmel,pin-cells = <2>; 213 }; 214 215 pioc: gpio@400e1200 { 216 compatible = "atmel,sam-gpio"; 217 reg = <0x400e1200 0x200>; 218 interrupts = <11 1>; 219 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 220 gpio-controller; 221 #gpio-cells = <2>; 222 #atmel,pin-cells = <2>; 223 }; 224 225 piod: gpio@400e1400 { 226 compatible = "atmel,sam-gpio"; 227 reg = <0x400e1400 0x200>; 228 interrupts = <12 1>; 229 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 230 gpio-controller; 231 #gpio-cells = <2>; 232 #atmel,pin-cells = <2>; 233 }; 234 235 pioe: gpio@400e1600 { 236 compatible = "atmel,sam-gpio"; 237 reg = <0x400e1600 0x200>; 238 interrupts = <13 1>; 239 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 240 gpio-controller; 241 #gpio-cells = <2>; 242 #atmel,pin-cells = <2>; 243 }; 244 }; 245 246 tc0: tc@40090000 { 247 compatible = "atmel,sam-tc"; 248 reg = <0x40090000 0x100>; 249 interrupts = <21 0 250 22 0 251 23 0>; 252 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, 253 <&pmc PMC_TYPE_PERIPHERAL 22>, 254 <&pmc PMC_TYPE_PERIPHERAL 23>; 255 status = "disabled"; 256 }; 257 258 tc1: tc@40094000 { 259 compatible = "atmel,sam-tc"; 260 reg = <0x40094000 0x100>; 261 interrupts = <24 0 262 25 0 263 26 0>; 264 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, 265 <&pmc PMC_TYPE_PERIPHERAL 25>, 266 <&pmc PMC_TYPE_PERIPHERAL 26>; 267 status = "disabled"; 268 }; 269 270 tc2: tc@40098000 { 271 compatible = "atmel,sam-tc"; 272 reg = <0x40098000 0x100>; 273 interrupts = <27 0 274 28 0 275 29 0>; 276 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, 277 <&pmc PMC_TYPE_PERIPHERAL 28>, 278 <&pmc PMC_TYPE_PERIPHERAL 29>; 279 status = "disabled"; 280 }; 281 282 pwm0: pwm@40000000 { 283 compatible = "atmel,sam-pwm"; 284 reg = <0x40000000 0x4000>; 285 interrupts = <36 1>; 286 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; 287 prescaler = <10>; 288 divider = <1>; 289 #pwm-cells = <3>; 290 status = "disabled"; 291 }; 292 293 rstc: rstc@400e1800 { 294 compatible = "atmel,sam-rstc"; 295 reg = <0x400e1800 0x10>; 296 clocks = <&pmc PMC_TYPE_PERIPHERAL 1>; 297 user-nrst; 298 }; 299 300 smc: smc@40060000 { 301 compatible = "atmel,sam-smc"; 302 #address-cells = <1>; 303 #size-cells = <0>; 304 reg = <0x40060000 0x200>; 305 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 306 status = "disabled"; 307 }; 308 309 hsmci: hsmci@40080000 { 310 compatible = "atmel,sam-hsmci"; 311 reg = <0x40080000 0x1000>; 312 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 313 status = "disabled"; 314 }; 315 316 rtc: rtc@400e1860 { 317 compatible = "atmel,sam-rtc"; 318 reg = <0x400e1860 0x100>; 319 interrupts = <2 0>; 320 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 321 alarms-count = <1>; 322 status = "disabled"; 323 }; 324 }; 325}; 326 327&nvic { 328 arm,num-irq-priority-bits = <4>; 329}; 330