1/*
2 * Copyright (c) 2019 Gerson Fernando Budke
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv7-m.dtsi>
8#include <zephyr/dt-bindings/adc/adc.h>
9#include <zephyr/dt-bindings/i2c/i2c.h>
10#include <zephyr/dt-bindings/gpio/gpio.h>
11#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
12
13/ {
14	aliases {
15		watchdog0 = &wdt;
16	};
17
18	chosen {
19		zephyr,flash-controller = &eefc;
20	};
21
22	cpus {
23		#address-cells = <1>;
24		#size-cells = <0>;
25
26		cpu0: cpu@0 {
27			device_type = "cpu";
28			compatible = "arm,cortex-m4f";
29			reg = <0>;
30			#address-cells = <1>;
31			#size-cells = <1>;
32
33			mpu: mpu@e000ed90 {
34				compatible = "arm,armv7m-mpu";
35				reg = <0xe000ed90 0x40>;
36				arm,num-mpu-regions = <8>;
37			};
38		};
39	};
40
41	soc {
42		pmc: pmc@400e0400 {
43			compatible = "atmel,sam-pmc";
44			reg = <0x400e0400 0x200>;
45			interrupts = <5 0>;
46			#clock-cells = <2>;
47			status = "okay";
48		};
49
50		sram0: memory@20000000 {
51			compatible = "mmio-sram";
52		};
53
54		afec0: adc@400b0000 {
55			compatible = "atmel,sam-afec";
56			reg = <0x400b0000 0x4000>;
57			interrupts = <30 0>;
58			clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
59			status = "disabled";
60			#io-channel-cells = <1>;
61		};
62
63		afec1: adc@400b4000 {
64			compatible = "atmel,sam-afec";
65			reg = <0x400b4000 0x4000>;
66			interrupts = <31 0>;
67			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
68			status = "disabled";
69			#io-channel-cells = <1>;
70		};
71
72		eefc: flash-controller@400e0a00 {
73			compatible = "atmel,sam-flash-controller";
74			reg = <0x400e0a00 0x200>;
75			clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
76
77			#address-cells = <1>;
78			#size-cells = <1>;
79
80			flash0: flash@400000 {
81				compatible = "soc-nv-flash";
82
83				write-block-size = <16>;
84				erase-block-size = <8192>;
85			};
86		};
87
88		wdt: watchdog@400e1850 {
89			compatible = "atmel,sam-watchdog";
90			reg = <0x400e1850 0x10>;
91			interrupts = <4 0>;
92			clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
93			status = "disabled";
94		};
95
96		twi0: i2c@400a8000 {
97			compatible = "atmel,sam-i2c-twi";
98			clock-frequency = <I2C_BITRATE_STANDARD>;
99			reg = <0x400a8000 0x4000>;
100			interrupts = <17 0>;
101			clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
102			status = "disabled";
103			#address-cells = <1>;
104			#size-cells = <0>;
105		};
106
107		twi1: i2c@400ac000 {
108			compatible = "atmel,sam-i2c-twi";
109			clock-frequency = <I2C_BITRATE_STANDARD>;
110			reg = <0x400ac000 0x4000>;
111			interrupts = <18 0>;
112			clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
113			status = "disabled";
114			#address-cells = <1>;
115			#size-cells = <0>;
116		};
117
118		spi0: spi@40088000 {
119			compatible = "atmel,sam-spi";
120			#address-cells = <1>;
121			#size-cells = <0>;
122			reg = <0x40088000 0x4000>;
123			interrupts = <19 0>;
124			clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
125			status = "disabled";
126		};
127
128		uart0: uart@400e0600 {
129			compatible = "atmel,sam-uart";
130			reg = <0x400e0600 0x140>;
131			interrupts = <7 1>;
132			clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
133			status = "disabled";
134		};
135
136		uart1: uart@40060600 {
137			compatible = "atmel,sam-uart";
138			reg = <0x40060600 0x200>;
139			interrupts = <45 1>;
140			clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
141			status = "disabled";
142		};
143
144		usart0: usart@400a0000 {
145			compatible = "atmel,sam-usart";
146			reg = <0x400a0000 0x4000>;
147			interrupts = <14 1>;
148			clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
149			status = "disabled";
150		};
151
152		usart1: usart@400a4000 {
153			compatible = "atmel,sam-usart";
154			reg = <0x400a4000 0x4000>;
155			interrupts = <15 1>;
156			clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
157			status = "disabled";
158		};
159
160		gmac: ethernet@40034000 {
161			compatible = "atmel,sam-gmac";
162			reg = <0x40034000 0x4000>;
163			clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
164			interrupts = <44 0>;
165			interrupt-names = "gmac";
166			num-queues = <1>;
167			phy-connection-type = "mii";
168			status = "disabled";
169		};
170
171		mdio: mdio@40034000 {
172			compatible = "atmel,sam-mdio";
173			reg = <0x40034000 0x4000>;
174			status = "disabled";
175			#address-cells = <1>;
176			#size-cells = <0>;
177		};
178
179		pinctrl: pinctrl@400e0e00 {
180			compatible = "atmel,sam-pinctrl";
181			#address-cells = <1>;
182			#size-cells = <1>;
183			ranges = <0x400e0e00 0x400e0e00 0xa00>;
184			status = "okay";
185
186			pioa: gpio@400e0e00 {
187				compatible = "atmel,sam-gpio";
188				reg = <0x400e0e00 0x200>;
189				interrupts = <9 1>;
190				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
191				gpio-controller;
192				#gpio-cells = <2>;
193				#atmel,pin-cells = <2>;
194			};
195
196			piob: gpio@400e1000 {
197				compatible = "atmel,sam-gpio";
198				reg = <0x400e1000 0x200>;
199				interrupts = <10 1>;
200				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
201				gpio-controller;
202				#gpio-cells = <2>;
203				#atmel,pin-cells = <2>;
204			};
205
206			pioc: gpio@400e1200 {
207				compatible = "atmel,sam-gpio";
208				reg = <0x400e1200 0x200>;
209				interrupts = <11 1>;
210				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
211				gpio-controller;
212				#gpio-cells = <2>;
213				#atmel,pin-cells = <2>;
214			};
215
216			piod: gpio@400e1400 {
217				compatible = "atmel,sam-gpio";
218				reg = <0x400e1400 0x200>;
219				interrupts = <12 1>;
220				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
221				gpio-controller;
222				#gpio-cells = <2>;
223				#atmel,pin-cells = <2>;
224			};
225
226			pioe: gpio@400e1600 {
227				compatible = "atmel,sam-gpio";
228				reg = <0x400e1600 0x200>;
229				interrupts = <13 1>;
230				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
231				gpio-controller;
232				#gpio-cells = <2>;
233				#atmel,pin-cells = <2>;
234			};
235		};
236
237		tc0: tc@40090000 {
238			compatible = "atmel,sam-tc";
239			reg = <0x40090000 0x100>;
240			interrupts = <21 0
241				      22 0
242				      23 0>;
243			clocks = <&pmc PMC_TYPE_PERIPHERAL 21>,
244				 <&pmc PMC_TYPE_PERIPHERAL 22>,
245				 <&pmc PMC_TYPE_PERIPHERAL 23>;
246			status = "disabled";
247		};
248
249		tc1: tc@40094000 {
250			compatible = "atmel,sam-tc";
251			reg = <0x40094000 0x100>;
252			interrupts = <24 0
253				      25 0
254				      26 0>;
255			clocks = <&pmc PMC_TYPE_PERIPHERAL 24>,
256				 <&pmc PMC_TYPE_PERIPHERAL 25>,
257				 <&pmc PMC_TYPE_PERIPHERAL 26>;
258			status = "disabled";
259		};
260
261		tc2: tc@40098000 {
262			compatible = "atmel,sam-tc";
263			reg = <0x40098000 0x100>;
264			interrupts = <27 0
265				      28 0
266				      29 0>;
267			clocks = <&pmc PMC_TYPE_PERIPHERAL 27>,
268				 <&pmc PMC_TYPE_PERIPHERAL 28>,
269				 <&pmc PMC_TYPE_PERIPHERAL 29>;
270			status = "disabled";
271		};
272
273		pwm0: pwm@40000000 {
274			compatible = "atmel,sam-pwm";
275			reg = <0x40000000 0x4000>;
276			interrupts = <36 1>;
277			clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
278			prescaler = <10>;
279			divider = <1>;
280			#pwm-cells = <3>;
281			status = "disabled";
282		};
283
284		rstc: rstc@400e1800 {
285			compatible = "atmel,sam-rstc";
286			reg = <0x400e1800 0x10>;
287			clocks = <&pmc PMC_TYPE_PERIPHERAL 1>;
288			user-nrst;
289		};
290
291		smc: smc@40060000 {
292			compatible = "atmel,sam-smc";
293			#address-cells = <1>;
294			#size-cells = <0>;
295			reg = <0x40060000 0x200>;
296			clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
297			status = "disabled";
298		};
299
300		hsmci: hsmci@40080000 {
301			compatible = "atmel,sam-hsmci";
302			reg = <0x40080000 0x1000>;
303			clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
304			status = "disabled";
305		};
306	};
307};
308
309&nvic {
310	arm,num-irq-priority-bits = <4>;
311};
312