1 /*
2 * Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <drivers/timer/arm_arch_timer.h>
8 #include <drivers/timer/system_timer.h>
9 #include <sys_clock.h>
10 #include <spinlock.h>
11 #include <arch/cpu.h>
12
13 #define CYC_PER_TICK ((uint64_t)sys_clock_hw_cycles_per_sec() \
14 / (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC)
15 #define MAX_TICKS INT32_MAX
16 #define MIN_DELAY (1000)
17
18 static struct k_spinlock lock;
19 static volatile uint64_t last_cycle;
20
arm_arch_timer_compare_isr(const void * arg)21 static void arm_arch_timer_compare_isr(const void *arg)
22 {
23 ARG_UNUSED(arg);
24
25 k_spinlock_key_t key = k_spin_lock(&lock);
26
27 uint64_t curr_cycle = arm_arch_timer_count();
28 uint32_t delta_ticks = (uint32_t)((curr_cycle - last_cycle) / CYC_PER_TICK);
29
30 last_cycle += delta_ticks * CYC_PER_TICK;
31
32 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
33 uint64_t next_cycle = last_cycle + CYC_PER_TICK;
34
35 if ((uint64_t)(next_cycle - curr_cycle) < MIN_DELAY) {
36 next_cycle += CYC_PER_TICK;
37 }
38 arm_arch_timer_set_compare(next_cycle);
39 arm_arch_timer_set_irq_mask(false);
40 } else {
41 arm_arch_timer_set_irq_mask(true);
42 }
43
44 k_spin_unlock(&lock, key);
45
46 sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? delta_ticks : 1);
47 }
48
sys_clock_driver_init(const struct device * dev)49 int sys_clock_driver_init(const struct device *dev)
50 {
51 ARG_UNUSED(dev);
52
53 IRQ_CONNECT(ARM_ARCH_TIMER_IRQ, ARM_ARCH_TIMER_PRIO,
54 arm_arch_timer_compare_isr, NULL, ARM_ARCH_TIMER_FLAGS);
55 arm_arch_timer_init();
56 arm_arch_timer_set_compare(arm_arch_timer_count() + CYC_PER_TICK);
57 arm_arch_timer_enable(true);
58 irq_enable(ARM_ARCH_TIMER_IRQ);
59 arm_arch_timer_set_irq_mask(false);
60
61 return 0;
62 }
63
sys_clock_set_timeout(int32_t ticks,bool idle)64 void sys_clock_set_timeout(int32_t ticks, bool idle)
65 {
66 #if defined(CONFIG_TICKLESS_KERNEL)
67
68 if (ticks == K_TICKS_FOREVER && idle) {
69 return;
70 }
71
72 ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : \
73 MIN(MAX_TICKS, MAX(ticks - 1, 0));
74
75 k_spinlock_key_t key = k_spin_lock(&lock);
76 uint64_t curr_cycle = arm_arch_timer_count();
77 uint64_t req_cycle = ticks * CYC_PER_TICK;
78
79 /* Round up to next tick boundary */
80 req_cycle += (curr_cycle - last_cycle) + (CYC_PER_TICK - 1);
81
82 req_cycle = (req_cycle / CYC_PER_TICK) * CYC_PER_TICK;
83
84 if ((req_cycle + last_cycle - curr_cycle) < MIN_DELAY) {
85 req_cycle += CYC_PER_TICK;
86 }
87
88 arm_arch_timer_set_compare(req_cycle + last_cycle);
89 arm_arch_timer_set_irq_mask(false);
90 k_spin_unlock(&lock, key);
91
92 #else /* CONFIG_TICKLESS_KERNEL */
93 ARG_UNUSED(ticks);
94 ARG_UNUSED(idle);
95 #endif
96 }
97
sys_clock_elapsed(void)98 uint32_t sys_clock_elapsed(void)
99 {
100 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
101 return 0;
102 }
103
104 k_spinlock_key_t key = k_spin_lock(&lock);
105 uint32_t ret = (uint32_t)((arm_arch_timer_count() - last_cycle)
106 / CYC_PER_TICK);
107
108 k_spin_unlock(&lock, key);
109 return ret;
110 }
111
sys_clock_cycle_get_32(void)112 uint32_t sys_clock_cycle_get_32(void)
113 {
114 return (uint32_t)arm_arch_timer_count();
115 }
116
117 #ifdef CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT
arch_busy_wait(uint32_t usec_to_wait)118 void arch_busy_wait(uint32_t usec_to_wait)
119 {
120 if (usec_to_wait == 0) {
121 return;
122 }
123
124 uint64_t start_cycles = arm_arch_timer_count();
125
126 uint64_t cycles_to_wait = sys_clock_hw_cycles_per_sec() / USEC_PER_SEC * usec_to_wait;
127
128 for (;;) {
129 uint64_t current_cycles = arm_arch_timer_count();
130
131 /* this handles the rollover on an unsigned 32-bit value */
132 if ((current_cycles - start_cycles) >= cycles_to_wait) {
133 break;
134 }
135 }
136 }
137 #endif
138
139 #ifdef CONFIG_SMP
smp_timer_init(void)140 void smp_timer_init(void)
141 {
142 /*
143 * set the initial status of timer0 of each secondary core
144 */
145 arm_arch_timer_set_compare(arm_arch_timer_count() + CYC_PER_TICK);
146 arm_arch_timer_enable(true);
147 irq_enable(ARM_ARCH_TIMER_IRQ);
148 arm_arch_timer_set_irq_mask(false);
149 }
150 #endif
151
