1 /*
2 * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /*
20 * This file is derivative of CMSIS V5.9.0 startup_ARMCM23.c
21 * Git SHA: 2b7495b8535bdcb306dac29b9ded4cfb679d7e5c
22 */
23
24 #include "tfm_hal_device_header.h"
25
26 /*----------------------------------------------------------------------------
27 External References
28 *----------------------------------------------------------------------------*/
29 extern uint32_t __INITIAL_SP;
30 extern uint32_t __STACK_LIMIT;
31 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
32 extern uint64_t __STACK_SEAL;
33 #endif
34
35 extern __NO_RETURN void __PROGRAM_START(void);
36
37 /*----------------------------------------------------------------------------
38 Internal References
39 *----------------------------------------------------------------------------*/
40 __NO_RETURN void Reset_Handler (void);
41
42 /*----------------------------------------------------------------------------
43 Exception / Interrupt Handler
44 *----------------------------------------------------------------------------*/
45 #define DEFAULT_IRQ_HANDLER(handler_name) \
46 __NO_RETURN void __WEAK handler_name(void); \
47 void handler_name(void) { \
48 while(1); \
49 }
50
51 DEFAULT_IRQ_HANDLER(NMI_Handler)
52 DEFAULT_IRQ_HANDLER(HardFault_Handler)
53 DEFAULT_IRQ_HANDLER(SVC_Handler)
54 DEFAULT_IRQ_HANDLER(PendSV_Handler)
55 DEFAULT_IRQ_HANDLER(SysTick_Handler)
56
57 DEFAULT_IRQ_HANDLER(BOD_IRQHandler)
58 DEFAULT_IRQ_HANDLER(IRC_IRQHandler)
59 DEFAULT_IRQ_HANDLER(PWRWU_IRQHandler)
60 DEFAULT_IRQ_HANDLER(SRAM_IRQHandler)
61 DEFAULT_IRQ_HANDLER(CLKFAIL_IRQHandler)
62
63 DEFAULT_IRQ_HANDLER(RTC_IRQHandler)
64 DEFAULT_IRQ_HANDLER(TAMPER_IRQHandler)
65 DEFAULT_IRQ_HANDLER(WDT_IRQHandler)
66 DEFAULT_IRQ_HANDLER(WWDT_IRQHandler)
67 DEFAULT_IRQ_HANDLER(EINT0_IRQHandler)
68 DEFAULT_IRQ_HANDLER(EINT1_IRQHandler)
69 DEFAULT_IRQ_HANDLER(EINT2_IRQHandler)
70 DEFAULT_IRQ_HANDLER(EINT3_IRQHandler)
71 DEFAULT_IRQ_HANDLER(EINT4_IRQHandler)
72 DEFAULT_IRQ_HANDLER(EINT5_IRQHandler)
73 DEFAULT_IRQ_HANDLER(GPA_IRQHandler)
74 DEFAULT_IRQ_HANDLER(GPB_IRQHandler)
75 DEFAULT_IRQ_HANDLER(GPC_IRQHandler)
76 DEFAULT_IRQ_HANDLER(GPD_IRQHandler)
77 DEFAULT_IRQ_HANDLER(GPE_IRQHandler)
78 DEFAULT_IRQ_HANDLER(GPF_IRQHandler)
79 DEFAULT_IRQ_HANDLER(QSPI0_IRQHandler)
80 DEFAULT_IRQ_HANDLER(SPI0_IRQHandler)
81 DEFAULT_IRQ_HANDLER(BRAKE0_IRQHandler)
82 DEFAULT_IRQ_HANDLER(EPWM0_P0_IRQHandler)
83 DEFAULT_IRQ_HANDLER(EPWM0_P1_IRQHandler)
84 DEFAULT_IRQ_HANDLER(EPWM0_P2_IRQHandler)
85 DEFAULT_IRQ_HANDLER(BRAKE1_IRQHandler)
86 DEFAULT_IRQ_HANDLER(EPWM1_P0_IRQHandler)
87 DEFAULT_IRQ_HANDLER(EPWM1_P1_IRQHandler)
88 DEFAULT_IRQ_HANDLER(EPWM1_P2_IRQHandler)
89 DEFAULT_IRQ_HANDLER(TFM_TIMER0_IRQ_Handler)
90 DEFAULT_IRQ_HANDLER(TMR1_IRQHandler)
91 DEFAULT_IRQ_HANDLER(TIMER1_Handler) /*Just a handler to use TMR2 hardware */
92 DEFAULT_IRQ_HANDLER(TMR3_IRQHandler)
93 DEFAULT_IRQ_HANDLER(UART0_IRQHandler)
94 DEFAULT_IRQ_HANDLER(UART1_IRQHandler)
95 DEFAULT_IRQ_HANDLER(I2C0_IRQHandler)
96 DEFAULT_IRQ_HANDLER(I2C1_IRQHandler)
97 DEFAULT_IRQ_HANDLER(PDMA0_IRQHandler)
98 DEFAULT_IRQ_HANDLER(DAC_IRQHandler)
99 DEFAULT_IRQ_HANDLER(EADC0_IRQHandler)
100 DEFAULT_IRQ_HANDLER(EADC1_IRQHandler)
101 DEFAULT_IRQ_HANDLER(ACMP01_IRQHandler)
102 DEFAULT_IRQ_HANDLER(EADC2_IRQHandler)
103 DEFAULT_IRQ_HANDLER(EADC3_IRQHandler)
104 DEFAULT_IRQ_HANDLER(UART2_IRQHandler)
105 DEFAULT_IRQ_HANDLER(UART3_IRQHandler)
106 DEFAULT_IRQ_HANDLER(SPI1_IRQHandler)
107 DEFAULT_IRQ_HANDLER(SPI2_IRQHandler)
108 DEFAULT_IRQ_HANDLER(USBD_IRQHandler)
109 DEFAULT_IRQ_HANDLER(USBH_IRQHandler)
110 DEFAULT_IRQ_HANDLER(USBOTG_IRQHandler)
111 DEFAULT_IRQ_HANDLER(CAN0_IRQHandler)
112 DEFAULT_IRQ_HANDLER(SC0_IRQHandler)
113 DEFAULT_IRQ_HANDLER(SC1_IRQHandler)
114 DEFAULT_IRQ_HANDLER(SC2_IRQHandler)
115 DEFAULT_IRQ_HANDLER(SPI3_IRQHandler)
116 DEFAULT_IRQ_HANDLER(SDH0_IRQHandler)
117 DEFAULT_IRQ_HANDLER(I2S0_IRQHandler)
118 DEFAULT_IRQ_HANDLER(OPA0_IRQHandler)
119 DEFAULT_IRQ_HANDLER(CRPT_IRQHandler)
120 DEFAULT_IRQ_HANDLER(GPG_IRQHandler)
121 DEFAULT_IRQ_HANDLER(EINT6_IRQHandler)
122 DEFAULT_IRQ_HANDLER(UART4_IRQHandler)
123 DEFAULT_IRQ_HANDLER(UART5_IRQHandler)
124 DEFAULT_IRQ_HANDLER(USCI0_IRQHandler)
125 DEFAULT_IRQ_HANDLER(USCI1_IRQHandler)
126 DEFAULT_IRQ_HANDLER(BPWM0_IRQHandler)
127 DEFAULT_IRQ_HANDLER(BPWM1_IRQHandler)
128 DEFAULT_IRQ_HANDLER(I2C2_IRQHandler)
129 DEFAULT_IRQ_HANDLER(QEI0_IRQHandler)
130 DEFAULT_IRQ_HANDLER(QEI1_IRQHandler)
131 DEFAULT_IRQ_HANDLER(ECAP0_IRQHandler)
132 DEFAULT_IRQ_HANDLER(ECAP1_IRQHandler)
133 DEFAULT_IRQ_HANDLER(GPH_IRQHandler)
134 DEFAULT_IRQ_HANDLER(EINT7_IRQHandler)
135 DEFAULT_IRQ_HANDLER(PDMA1_IRQHandler)
136 DEFAULT_IRQ_HANDLER(SCU_IRQHandler)
137 DEFAULT_IRQ_HANDLER(TRNG_IRQHandler)
138
139 DEFAULT_IRQ_HANDLER(Default_Handler)
140
141
142 /*----------------------------------------------------------------------------
143 Exception / Interrupt Vector table
144 *----------------------------------------------------------------------------*/
145
146 #if defined ( __GNUC__ )
147 #pragma GCC diagnostic push
148 #pragma GCC diagnostic ignored "-Wpedantic"
149 #endif
150
151 extern const VECTOR_TABLE_Type __VECTOR_TABLE[];
152 const VECTOR_TABLE_Type __VECTOR_TABLE[] __VECTOR_TABLE_ATTRIBUTE = {
153 (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
154 Reset_Handler, /* Reset Handler */
155 NMI_Handler, /* NMI Handler */
156 HardFault_Handler, /* Hard Fault Handler */
157 0, /* Reserved */
158 0, /* Reserved */
159 0, /* Reserved */
160 0, /* Reserved */
161 0, /* Reserved */
162 0, /* Reserved */
163 0, /* Reserved */
164 SVC_Handler, /* SVCall Handler */
165 0, /* Reserved */
166 0, /* Reserved */
167 PendSV_Handler, /* PendSV Handler */
168 SysTick_Handler, /* SysTick Handler */
169
170 /* External interrupts */
171 BOD_IRQHandler, /* 0 */
172 IRC_IRQHandler, /* 1 */
173 PWRWU_IRQHandler, /* 2 */
174 SRAM_IRQHandler, /* 3 */
175 CLKFAIL_IRQHandler, /* 4 */
176 Default_Handler, /* 5 */
177 RTC_IRQHandler, /* 6 */
178 TAMPER_IRQHandler, /* 7 */
179 WDT_IRQHandler, /* 8 */
180 WWDT_IRQHandler, /* 9 */
181 EINT0_IRQHandler, /* 10 */
182 EINT1_IRQHandler, /* 11 */
183 EINT2_IRQHandler, /* 12 */
184 EINT3_IRQHandler, /* 13 */
185 EINT4_IRQHandler, /* 14 */
186 EINT5_IRQHandler, /* 15 */
187 GPA_IRQHandler, /* 16 */
188 GPB_IRQHandler, /* 17 */
189 GPC_IRQHandler, /* 18 */
190 GPD_IRQHandler, /* 19 */
191 GPE_IRQHandler, /* 20 */
192 GPF_IRQHandler, /* 21 */
193 QSPI0_IRQHandler, /* 22 */
194 SPI0_IRQHandler, /* 23 */
195 BRAKE0_IRQHandler, /* 24 */
196 EPWM0_P0_IRQHandler, /* 25 */
197 EPWM0_P1_IRQHandler, /* 26 */
198 EPWM0_P2_IRQHandler, /* 27 */
199 BRAKE1_IRQHandler, /* 28 */
200 EPWM1_P0_IRQHandler, /* 29 */
201 EPWM1_P1_IRQHandler, /* 30 */
202 EPWM1_P2_IRQHandler, /* 31 */
203 TFM_TIMER0_IRQ_Handler,/* 32 */
204 TMR1_IRQHandler, /* 33 */
205 TIMER1_Handler, /* TMR2_IRQHandler 34 */
206 TMR3_IRQHandler, /* 35 */
207 UART0_IRQHandler, /* 36 */
208 UART1_IRQHandler, /* 37 */
209 I2C0_IRQHandler, /* 38 */
210 I2C1_IRQHandler, /* 39 */
211 PDMA0_IRQHandler, /* 40 */
212 DAC_IRQHandler, /* 41 */
213 EADC0_IRQHandler, /* 42 */
214 EADC1_IRQHandler, /* 43 */
215 ACMP01_IRQHandler, /* 44 */
216 Default_Handler, /* 45 */
217 EADC2_IRQHandler, /* 46 */
218 EADC3_IRQHandler, /* 47 */
219 UART2_IRQHandler, /* 48 */
220 UART3_IRQHandler, /* 49 */
221 Default_Handler, /* 50 */
222 SPI1_IRQHandler, /* 51 */
223 SPI2_IRQHandler, /* 52 */
224 USBD_IRQHandler, /* 53 */
225 USBH_IRQHandler, /* 54 */
226 USBOTG_IRQHandler, /* 55 */
227 CAN0_IRQHandler, /* 56 */
228 Default_Handler, /* 57 */
229 SC0_IRQHandler, /* 58 */
230 SC1_IRQHandler, /* 59 */
231 SC2_IRQHandler, /* 60 */
232 Default_Handler, /* 61 */
233 SPI3_IRQHandler, /* 62 */
234 Default_Handler, /* 63 */
235 SDH0_IRQHandler, /* 64 */
236 Default_Handler, /* 65 */
237 Default_Handler, /* 66 */
238 Default_Handler, /* 67 */
239 I2S0_IRQHandler, /* 68 */
240 Default_Handler, /* 69 */
241 OPA0_IRQHandler, /* 70 */
242 CRPT_IRQHandler, /* 71 */
243 GPG_IRQHandler, /* 72 */
244 EINT6_IRQHandler, /* 73 */
245 UART4_IRQHandler, /* 74 */
246 UART5_IRQHandler, /* 75 */
247 USCI0_IRQHandler, /* 76 */
248 USCI1_IRQHandler, /* 77 */
249 BPWM0_IRQHandler, /* 78 */
250 BPWM1_IRQHandler, /* 79 */
251 Default_Handler, /* 80 */
252 Default_Handler, /* 81 */
253 I2C2_IRQHandler, /* 82 */
254 Default_Handler, /* 83 */
255 QEI0_IRQHandler, /* 84 */
256 QEI1_IRQHandler, /* 85 */
257 ECAP0_IRQHandler, /* 86 */
258 ECAP1_IRQHandler, /* 87 */
259 GPH_IRQHandler, /* 88 */
260 EINT7_IRQHandler, /* 89 */
261 Default_Handler, /* 90 */
262 Default_Handler, /* 91 */
263 Default_Handler, /* 92 */
264 Default_Handler, /* 93 */
265 Default_Handler, /* 94 */
266 Default_Handler, /* 95 */
267 Default_Handler, /* 96 */
268 Default_Handler, /* 97 */
269 PDMA1_IRQHandler, /* 98 */
270 SCU_IRQHandler, /* 99 */
271 Default_Handler, /* 100 */
272 TRNG_IRQHandler, /* 101 */
273 };
274
275 #if defined ( __GNUC__ )
276 #pragma GCC diagnostic pop
277 #endif
278
279 /*----------------------------------------------------------------------------
280 Reset Handler called on controller reset
281 *----------------------------------------------------------------------------*/
Reset_Handler(void)282 void Reset_Handler(void)
283 {
284 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
285 __disable_irq();
286 #endif
287 __set_PSP((uint32_t)(&__INITIAL_SP));
288
289 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
290 __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
291 __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
292
293 __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
294 #endif
295
296 SystemInit(); /* CMSIS System Initialization */
297 __PROGRAM_START(); /* Enter PreMain (C library entry point) */
298 }
299
300 /* Dummy function for m2354 bsp */
__PC()301 uint32_t __PC()
302 {
303 return 0;
304 }
305
