1;/*
2; * Copyright (c) 2021-2024 Arm Limited. All rights reserved.
3; *
4; * Licensed under the Apache License, Version 2.0 (the "License");
5; * you may not use this file except in compliance with the License.
6; * You may obtain a copy of the License at
7; *
8; *     http://www.apache.org/licenses/LICENSE-2.0
9; *
10; * Unless required by applicable law or agreed to in writing, software
11; * distributed under the License is distributed on an "AS IS" BASIS,
12; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13; * See the License for the specific language governing permissions and
14; * limitations under the License.
15; *
16; *
17; * This file is derivative of CMSIS V5.00 gcc_arm.ld
18; */
19
20/* Linker script to configure memory regions. */
21/* This file will be run trough the pre-processor. */
22
23#include "region_defs.h"
24
25MEMORY
26{
27    FLASH (rx)  : ORIGIN = BL1_2_CODE_START, LENGTH = BL1_2_CODE_SIZE
28    RAM   (rwx) : ORIGIN = BL1_2_DATA_START, LENGTH = BL1_2_DATA_SIZE
29}
30
31__heap_size__  = BL1_2_HEAP_SIZE;
32__msp_stack_size__ = BL1_2_MSP_STACK_SIZE;
33
34ENTRY(Reset_Handler)
35
36SECTIONS
37{
38    .text (READONLY) :
39    {
40        KEEP(*(.vectors))
41        __Vectors_End = .;
42        __Vectors_Size = __Vectors_End - __Vectors;
43        __end__ = .;
44
45        *(.text*)
46
47        . = ALIGN(4);
48        /* preinit data */
49        PROVIDE_HIDDEN (__preinit_array_start = .);
50        KEEP(*(.preinit_array))
51        PROVIDE_HIDDEN (__preinit_array_end = .);
52
53        . = ALIGN(4);
54        /* init data */
55        PROVIDE_HIDDEN (__init_array_start = .);
56        KEEP(*(SORT(.init_array.*)))
57        KEEP(*(.init_array))
58        PROVIDE_HIDDEN (__init_array_end = .);
59
60        . = ALIGN(4);
61        /* finit data */
62        PROVIDE_HIDDEN (__fini_array_start = .);
63        KEEP(*(SORT(.fini_array.*)))
64        KEEP(*(.fini_array))
65        PROVIDE_HIDDEN (__fini_array_end = .);
66
67        /* .copy.table
68         * To copy multiple ROM to RAM sections,
69         * define etext2/data2_start/data2_end and
70         * define __STARTUP_COPY_MULTIPLE in startup file */
71        . = ALIGN(4);
72        __copy_table_start__ = .;
73        LONG (__etext)
74        LONG (__data_start__)
75        LONG ((__data_end__ - __data_start__) / 4)
76        LONG (DEFINED(__etext2) ? __etext2 : 0)
77        LONG (DEFINED(__data2_start__) ? __data2_start__ : 0)
78        LONG (DEFINED(__data2_start__) ? ((__data2_end__ - __data2_start__) / 4) : 0)
79        __copy_table_end__ = .;
80
81        /* .zero.table
82         * To clear multiple BSS sections,
83         * uncomment .zero.table section and,
84         * define __STARTUP_CLEAR_BSS_MULTIPLE in startup file */
85        . = ALIGN(4);
86        __zero_table_start__ = .;
87        LONG (__bss_start__)
88        LONG ((__bss_end__ - __bss_start__) / 4)
89        LONG (DEFINED(__bss2_start__) ? __bss2_start__ : 0)
90        LONG (DEFINED(__bss2_start__) ? ((__bss2_end__ - __bss2_start__) / 4) : 0)
91        __zero_table_end__ = .;
92
93        KEEP(*(.init))
94        KEEP(*(.fini))
95
96        /* .ctors */
97        *crtbegin.o(.ctors)
98        *crtbegin?.o(.ctors)
99        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
100        *(SORT(.ctors.*))
101        *(.ctors)
102
103        /* .dtors */
104         *crtbegin.o(.dtors)
105         *crtbegin?.o(.dtors)
106         *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
107         *(SORT(.dtors.*))
108         *(.dtors)
109
110        *(.rodata*)
111
112        KEEP(*(.eh_frame*))
113    } > FLASH
114
115    .ARM.extab :
116    {
117        *(.ARM.extab* .gnu.linkonce.armextab.*)
118    } > FLASH
119
120    __exidx_start = .;
121    .ARM.exidx :
122    {
123        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
124    } > FLASH
125    __exidx_end = .;
126
127    __etext = ALIGN(4);
128
129    .tfm_bl2_shared_data : ALIGN(32)
130    {
131        . += BOOT_TFM_SHARED_DATA_SIZE;
132    } > RAM
133    Image$$SHARED_DATA$$RW$$Base = ADDR(.tfm_bl2_shared_data);
134    Image$$SHARED_DATA$$RW$$Limit = ADDR(.tfm_bl2_shared_data) + SIZEOF(.tfm_bl2_shared_data);
135
136    . = BL1_2_DATA_START;
137    Image$$BL1_2_ER_DATA_START$$Base = .;
138    .data : AT (__etext)
139    {
140        __data_start__ = .;
141        *(vtable)
142        *(.data*)
143
144        KEEP(*(.jcr*))
145        . = ALIGN(4);
146        /* All data end */
147        __data_end__ = .;
148
149    } > RAM
150    Image$$ER_DATA$$Base = ADDR(.data);
151
152    .bss :
153    {
154        . = ALIGN(4);
155        __bss_start__ = .;
156        *(.bss*)
157        *(COMMON)
158        . = ALIGN(4);
159        __bss_end__ = .;
160    } > RAM
161
162    bss_size = __bss_end__ - __bss_start__;
163
164    .msp_stack : ALIGN(32)
165    {
166        . += __msp_stack_size__;
167    } > RAM
168    Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack);
169    Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack);
170
171    .heap : ALIGN(8)
172    {
173        . = ALIGN(8);
174        __end__ = .;
175        PROVIDE(end = .);
176        __HeapBase = .;
177        . += __heap_size__;
178        __HeapLimit = .;
179        __heap_limit = .; /* Add for _sbrk */
180    } > RAM
181    Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap);
182
183    PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit);
184    Image$$BL1_2_ER_DATA_LIMIT$$Base = .;
185
186    Image$$BL1_1_ER_DATA_START$$Base = BL1_1_DATA_START;
187    Image$$BL1_1_ER_DATA_LIMIT$$Base = BL1_1_DATA_START + BL1_1_DATA_SIZE;
188}
189