1;/* 2; * Copyright (c) 2021-2024 Arm Limited. All rights reserved. 3; * 4; * Licensed under the Apache License, Version 2.0 (the "License"); 5; * you may not use this file except in compliance with the License. 6; * You may obtain a copy of the License at 7; * 8; * http://www.apache.org/licenses/LICENSE-2.0 9; * 10; * Unless required by applicable law or agreed to in writing, software 11; * distributed under the License is distributed on an "AS IS" BASIS, 12; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13; * See the License for the specific language governing permissions and 14; * limitations under the License. 15; * 16; * 17; * This file is derivative of CMSIS V5.00 gcc_arm.ld 18; */ 19 20/* Linker script to configure memory regions. */ 21/* This file will be run trough the pre-processor. */ 22 23#include "region_defs.h" 24 25MEMORY 26{ 27 FLASH (rx) : ORIGIN = BL1_1_CODE_START, LENGTH = BL1_1_CODE_SIZE 28 SHARED (rwx) : ORIGIN = BOOT_TFM_SHARED_DATA_BASE, LENGTH = BOOT_TFM_SHARED_DATA_SIZE 29 RAM (rwx) : ORIGIN = BL1_1_DATA_START, LENGTH = BL1_1_DATA_SIZE 30} 31 32__heap_size__ = BL1_1_HEAP_SIZE; 33__msp_stack_size__ = BL1_1_MSP_STACK_SIZE; 34 35ENTRY(Reset_Handler) 36 37SECTIONS 38{ 39 .text (READONLY) : 40 { 41 KEEP(*(.vectors)) 42 __Vectors_End = .; 43 __Vectors_Size = __Vectors_End - __Vectors; 44 __end__ = .; 45 46 *(.text*) 47 48 . = ALIGN(4); 49 /* preinit data */ 50 PROVIDE_HIDDEN (__preinit_array_start = .); 51 KEEP(*(.preinit_array)) 52 PROVIDE_HIDDEN (__preinit_array_end = .); 53 54 . = ALIGN(4); 55 /* init data */ 56 PROVIDE_HIDDEN (__init_array_start = .); 57 KEEP(*(SORT(.init_array.*))) 58 KEEP(*(.init_array)) 59 PROVIDE_HIDDEN (__init_array_end = .); 60 61 . = ALIGN(4); 62 /* finit data */ 63 PROVIDE_HIDDEN (__fini_array_start = .); 64 KEEP(*(SORT(.fini_array.*))) 65 KEEP(*(.fini_array)) 66 PROVIDE_HIDDEN (__fini_array_end = .); 67 68 /* .copy.table 69 * To copy multiple ROM to RAM sections, 70 * define etext2/data2_start/data2_end and 71 * define __STARTUP_COPY_MULTIPLE in startup file */ 72 . = ALIGN(4); 73 __copy_table_start__ = .; 74 LONG (__etext) 75 LONG (__data_start__) 76 LONG ((__data_end__ - __data_start__) / 4) 77 LONG (DEFINED(__etext2) ? __etext2 : 0) 78 LONG (DEFINED(__data2_start__) ? __data2_start__ : 0) 79 LONG (DEFINED(__data2_start__) ? ((__data2_end__ - __data2_start__) / 4) : 0) 80 __copy_table_end__ = .; 81 82 /* .zero.table 83 * To clear multiple BSS sections, 84 * uncomment .zero.table and, 85 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup file */ 86 . = ALIGN(4); 87 __zero_table_start__ = .; 88 LONG (__bss_start__) 89 LONG ((__bss_end__ - __bss_start__) / 4) 90 LONG (DEFINED(__bss2_start__) ? __bss2_start__ : 0) 91 LONG (DEFINED(__bss2_start__) ? ((__bss2_end__ - __bss2_start__) / 4) : 0) 92 __zero_table_end__ = .; 93 94 KEEP(*(.init)) 95 KEEP(*(.fini)) 96 97 /* .ctors */ 98 *crtbegin.o(.ctors) 99 *crtbegin?.o(.ctors) 100 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) 101 *(SORT(.ctors.*)) 102 *(.ctors) 103 104 /* .dtors */ 105 *crtbegin.o(.dtors) 106 *crtbegin?.o(.dtors) 107 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) 108 *(SORT(.dtors.*)) 109 *(.dtors) 110 111 *(.rodata*) 112 113 KEEP(*(.eh_frame*)) 114 } > FLASH 115 116 .ARM.extab : 117 { 118 *(.ARM.extab* .gnu.linkonce.armextab.*) 119 } > FLASH 120 121 __exidx_start = .; 122 .ARM.exidx : 123 { 124 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 125 } > FLASH 126 __exidx_end = .; 127 128 __etext = ALIGN(4); 129 130 .tfm_bl2_shared_data : ALIGN(32) 131 { 132 . += BOOT_TFM_SHARED_DATA_SIZE; 133 } > SHARED 134 Image$$SHARED_DATA$$RW$$Base = ADDR(.tfm_bl2_shared_data); 135 Image$$SHARED_DATA$$RW$$Limit = ADDR(.tfm_bl2_shared_data) + SIZEOF(.tfm_bl2_shared_data); 136 137 . = BL1_1_DATA_START; 138 Image$$BL1_1_ER_DATA_START$$Base = .; 139 .data : AT (__etext) 140 { 141 __data_start__ = .; 142 __got_start__ = .; 143 *(.got) 144 *(.got*) 145 *(.rel*) 146 __got_end__ = .; 147 148 *(vtable) 149 *(.data*) 150 151 KEEP(*(.jcr*)) 152 . = ALIGN(4); 153 /* All data end */ 154 __data_end__ = .; 155 156 } > RAM 157 Image$$ER_DATA$$Base = ADDR(.data); 158 159 .bss : 160 { 161 . = ALIGN(4); 162 __bss_start__ = .; 163 *(.bss*) 164 *(COMMON) 165 . = ALIGN(4); 166 __bss_end__ = .; 167 } > RAM 168 169 bss_size = __bss_end__ - __bss_start__; 170 171 .msp_stack : ALIGN(32) 172 { 173 . += __msp_stack_size__; 174 } > RAM 175 Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack); 176 Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack); 177 178 .heap : ALIGN(8) 179 { 180 . = ALIGN(8); 181 __end__ = .; 182 PROVIDE(end = .); 183 __HeapBase = .; 184 . += __heap_size__; 185 __HeapLimit = .; 186 __heap_limit = .; /* Add for _sbrk */ 187 } > RAM 188 Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap); 189 190 PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit); 191 Image$$BL1_1_ER_DATA_LIMIT$$Base = .; 192 193 Image$$BL1_2_ER_DATA_START$$Base = BL1_2_DATA_START; 194 Image$$BL1_2_ER_DATA_LIMIT$$Base = BL1_2_DATA_START + BL1_2_DATA_SIZE; 195} 196