1 /*
2 * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #ifdef __ZEPHYR__
8 #include <zephyr/kernel.h>
9 #endif
10 #include <stdint.h>
11 #include <sys/param.h>
12 #include <sys/lock.h>
13
14 #include "esp_attr.h"
15 #include "soc/rtc.h"
16
17 #if CONFIG_IDF_TARGET_ESP32
18 #include "esp32/rom/rtc.h"
19 #include "esp32/clk.h"
20 #include "esp32/rtc.h"
21 #elif CONFIG_IDF_TARGET_ESP32S2
22 #include "esp32s2/rom/rtc.h"
23 #include "esp32s2/clk.h"
24 #include "esp32s2/rtc.h"
25 #elif CONFIG_IDF_TARGET_ESP32S3
26 #include "esp32s3/rom/rtc.h"
27 #include "esp32s3/clk.h"
28 #include "esp32s3/rtc.h"
29 #include "esp32s3/rom/ets_sys.h"
30 #elif CONFIG_IDF_TARGET_ESP32C3
31 #include "esp32c3/rom/rtc.h"
32 #include "esp32c3/clk.h"
33 #include "esp32c3/rtc.h"
34 #elif CONFIG_IDF_TARGET_ESP32H2
35 #include "esp32h2/rom/rtc.h"
36 #include "esp32h2/clk.h"
37 #include "esp32h2/rtc.h"
38 #endif
39
40 #ifndef __ZEPHYR__
41 #define MHZ (1000000)
42 #endif
43
44 // g_ticks_us defined in ROMs for PRO and APP CPU
45 extern uint32_t g_ticks_per_us_pro;
46 #if CONFIG_IDF_TARGET_ESP32
47 #ifdef CONFIG_SMP
48 extern uint32_t g_ticks_per_us_app;
49 #endif
50 #endif
51
52 static int s_esp_rtc_time_lock;
53 static RTC_DATA_ATTR uint64_t s_esp_rtc_time_us = 0, s_rtc_last_ticks = 0;
54
s_get_cpu_freq_mhz(void)55 inline static int IRAM_ATTR s_get_cpu_freq_mhz(void)
56 {
57 #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
58 return ets_get_cpu_frequency();
59 #else
60 return g_ticks_per_us_pro;
61 #endif
62 }
63
esp_clk_cpu_freq(void)64 int IRAM_ATTR esp_clk_cpu_freq(void)
65 {
66 #ifdef __ZEPHYR__
67 return MHZ(s_get_cpu_freq_mhz());
68 #else
69 return s_get_cpu_freq_mhz() * MHZ;
70 #endif
71 }
72
esp_clk_apb_freq(void)73 int IRAM_ATTR esp_clk_apb_freq(void)
74 {
75 #ifdef __ZEPHYR__
76 return MHZ(MIN(s_get_cpu_freq_mhz(), 80));
77 #else
78 return MIN(s_get_cpu_freq_mhz(), 80) * MHZ;
79 #endif
80 }
81
esp_clk_xtal_freq(void)82 int IRAM_ATTR esp_clk_xtal_freq(void)
83 {
84 #ifdef __ZEPHYR__
85 return MHZ(rtc_clk_xtal_freq_get());
86 #else
87 return rtc_clk_xtal_freq_get() * MHZ;
88 #endif
89 }
90
91 #if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
ets_update_cpu_frequency(uint32_t ticks_per_us)92 void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us)
93 {
94 /* Update scale factors used by esp_rom_delay_us */
95 g_ticks_per_us_pro = ticks_per_us;
96 #if CONFIG_IDF_TARGET_ESP32
97 #ifdef CONFIG_SMP
98 g_ticks_per_us_app = ticks_per_us;
99 #endif
100 #endif
101 }
102 #endif
103
esp_rtc_get_time_us(void)104 uint64_t esp_rtc_get_time_us(void)
105 {
106 s_esp_rtc_time_lock = irq_lock();
107 const uint32_t cal = esp_clk_slowclk_cal_get();
108 const uint64_t rtc_this_ticks = rtc_time_get();
109 const uint64_t ticks = rtc_this_ticks - s_rtc_last_ticks;
110 /* RTC counter result is up to 2^48, calibration factor is up to 2^24,
111 * for a 32kHz clock. We need to calculate (assuming no overflow):
112 * (ticks * cal) >> RTC_CLK_CAL_FRACT
113 *
114 * An overflow in the (ticks * cal) multiplication would cause time to
115 * wrap around after approximately 13 days, which is probably not enough
116 * for some applications.
117 * Therefore multiplication is split into two terms, for the lower 32-bit
118 * and the upper 16-bit parts of "ticks", i.e.:
119 * ((ticks_low + 2^32 * ticks_high) * cal) >> RTC_CLK_CAL_FRACT
120 */
121 const uint64_t ticks_low = ticks & UINT32_MAX;
122 const uint64_t ticks_high = ticks >> 32;
123 const uint64_t delta_time_us = ((ticks_low * cal) >> RTC_CLK_CAL_FRACT) +
124 ((ticks_high * cal) << (32 - RTC_CLK_CAL_FRACT));
125 s_esp_rtc_time_us += delta_time_us;
126 s_rtc_last_ticks = rtc_this_ticks;
127 irq_unlock(s_esp_rtc_time_lock);
128 return s_esp_rtc_time_us;
129 }
130
esp_clk_slowclk_cal_set(uint32_t new_cal)131 void esp_clk_slowclk_cal_set(uint32_t new_cal)
132 {
133 #if defined(CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER)
134 /* To force monotonic time values even when clock calibration value changes,
135 * we adjust esp_rtc_time
136 */
137 esp_rtc_get_time_us();
138 #endif // CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER
139 REG_WRITE(RTC_SLOW_CLK_CAL_REG, new_cal);
140 }
141
esp_clk_slowclk_cal_get(void)142 uint32_t esp_clk_slowclk_cal_get(void)
143 {
144 return REG_READ(RTC_SLOW_CLK_CAL_REG);
145 }
146
esp_clk_rtc_time(void)147 uint64_t esp_clk_rtc_time(void)
148 {
149 #ifdef CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER
150 return esp_rtc_get_time_us();
151 #else
152 return 0;
153 #endif
154 }
155
