1 /* 2 * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include "sdkconfig.h" 8 #include "esp_efuse.h" 9 #include <assert.h> 10 #include "esp_efuse_table.h" 11 12 // md5_digest_table 614c862c2cfa8ccda3a79183ce767255 13 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. 14 // If you want to change some fields, you need to change esp_efuse_table.csv file 15 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. 16 // To show efuse_table run the command 'show_efuse_table'. 17 18 static const esp_efuse_desc_t WR_DIS[] = { 19 {EFUSE_BLK0, 0, 32}, // Write protection, 20 }; 21 22 static const esp_efuse_desc_t WR_DIS_RD_DIS[] = { 23 {EFUSE_BLK0, 0, 1}, // Write protection for RD_DIS.KEY0 RD_DIS.KEY1 RD_DIS.KEY2 RD_DIS.KEY3 RD_DIS.KEY4 RD_DIS.KEY5 RD_DIS.SYS_DATA_PART2, 24 }; 25 26 static const esp_efuse_desc_t WR_DIS_DIS_RTC_RAM_BOOT[] = { 27 {EFUSE_BLK0, 1, 1}, // Write protection for DIS_RTC_RAM_BOOT, 28 }; 29 30 static const esp_efuse_desc_t WR_DIS_GROUP_1[] = { 31 {EFUSE_BLK0, 2, 1}, // Write protection for DIS_ICACHE DIS_DCACHE DIS_DOWNLOAD_ICACHE DIS_DOWNLOAD_DCACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN DIS_BOOT_REMAP SOFT_DIS_JTAG HARD_DIS.JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT, 32 }; 33 34 static const esp_efuse_desc_t WR_DIS_GROUP_2[] = { 35 {EFUSE_BLK0, 3, 1}, // Write protection for VDD_SPI_XPD VDD_SPI_TIEH VDD_SPI_FORCE VDD_SPI_INIT VDD_SPI_DCAP WDT_DELAY_SEL, 36 }; 37 38 static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = { 39 {EFUSE_BLK0, 4, 1}, // Write protection for SPI_BOOT_CRYPT_CNT, 40 }; 41 42 static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = { 43 {EFUSE_BLK0, 5, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE0, 44 }; 45 46 static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = { 47 {EFUSE_BLK0, 6, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE1, 48 }; 49 50 static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = { 51 {EFUSE_BLK0, 7, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE2, 52 }; 53 54 static const esp_efuse_desc_t WR_DIS_KEY0_PURPOSE[] = { 55 {EFUSE_BLK0, 8, 1}, // Write protection for key_purpose. KEY0, 56 }; 57 58 static const esp_efuse_desc_t WR_DIS_KEY1_PURPOSE[] = { 59 {EFUSE_BLK0, 9, 1}, // Write protection for key_purpose. KEY1, 60 }; 61 62 static const esp_efuse_desc_t WR_DIS_KEY2_PURPOSE[] = { 63 {EFUSE_BLK0, 10, 1}, // Write protection for key_purpose. KEY2, 64 }; 65 66 static const esp_efuse_desc_t WR_DIS_KEY3_PURPOSE[] = { 67 {EFUSE_BLK0, 11, 1}, // Write protection for key_purpose. KEY3, 68 }; 69 70 static const esp_efuse_desc_t WR_DIS_KEY4_PURPOSE[] = { 71 {EFUSE_BLK0, 12, 1}, // Write protection for key_purpose. KEY4, 72 }; 73 74 static const esp_efuse_desc_t WR_DIS_KEY5_PURPOSE[] = { 75 {EFUSE_BLK0, 13, 1}, // Write protection for key_purpose. KEY5, 76 }; 77 78 static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = { 79 {EFUSE_BLK0, 15, 1}, // Write protection for SECURE_BOOT_EN, 80 }; 81 82 static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { 83 {EFUSE_BLK0, 16, 1}, // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE, 84 }; 85 86 static const esp_efuse_desc_t WR_DIS_GROUP_3[] = { 87 {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION, 88 }; 89 90 static const esp_efuse_desc_t WR_DIS_BLK1[] = { 91 {EFUSE_BLK0, 20, 1}, // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS, 92 }; 93 94 static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = { 95 {EFUSE_BLK0, 21, 1}, // Write protection for EFUSE_BLK2. SYS_DATA_PART1, 96 }; 97 98 static const esp_efuse_desc_t WR_DIS_USER_DATA[] = { 99 {EFUSE_BLK0, 22, 1}, // Write protection for EFUSE_BLK3. USER_DATA, 100 }; 101 102 static const esp_efuse_desc_t WR_DIS_KEY0[] = { 103 {EFUSE_BLK0, 23, 1}, // Write protection for EFUSE_BLK4. KEY0, 104 }; 105 106 static const esp_efuse_desc_t WR_DIS_KEY1[] = { 107 {EFUSE_BLK0, 24, 1}, // Write protection for EFUSE_BLK5. KEY1, 108 }; 109 110 static const esp_efuse_desc_t WR_DIS_KEY2[] = { 111 {EFUSE_BLK0, 25, 1}, // Write protection for EFUSE_BLK6. KEY2, 112 }; 113 114 static const esp_efuse_desc_t WR_DIS_KEY3[] = { 115 {EFUSE_BLK0, 26, 1}, // Write protection for EFUSE_BLK7. KEY3, 116 }; 117 118 static const esp_efuse_desc_t WR_DIS_KEY4[] = { 119 {EFUSE_BLK0, 27, 1}, // Write protection for EFUSE_BLK8. KEY4, 120 }; 121 122 static const esp_efuse_desc_t WR_DIS_KEY5[] = { 123 {EFUSE_BLK0, 28, 1}, // Write protection for EFUSE_BLK9. KEY5, 124 }; 125 126 static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART2[] = { 127 {EFUSE_BLK0, 29, 1}, // Write protection for EFUSE_BLK10. SYS_DATA_PART2, 128 }; 129 130 static const esp_efuse_desc_t WR_DIS_USB_EXCHG_PINS[] = { 131 {EFUSE_BLK0, 30, 1}, // Write protection for USB_EXCHG_PINS, 132 }; 133 134 static const esp_efuse_desc_t RD_DIS[] = { 135 {EFUSE_BLK0, 32, 7}, // Read protection, 136 }; 137 138 static const esp_efuse_desc_t RD_DIS_KEY0[] = { 139 {EFUSE_BLK0, 32, 1}, // Read protection for EFUSE_BLK4. KEY0, 140 }; 141 142 static const esp_efuse_desc_t RD_DIS_KEY1[] = { 143 {EFUSE_BLK0, 33, 1}, // Read protection for EFUSE_BLK5. KEY1, 144 }; 145 146 static const esp_efuse_desc_t RD_DIS_KEY2[] = { 147 {EFUSE_BLK0, 34, 1}, // Read protection for EFUSE_BLK6. KEY2, 148 }; 149 150 static const esp_efuse_desc_t RD_DIS_KEY3[] = { 151 {EFUSE_BLK0, 35, 1}, // Read protection for EFUSE_BLK7. KEY3, 152 }; 153 154 static const esp_efuse_desc_t RD_DIS_KEY4[] = { 155 {EFUSE_BLK0, 36, 1}, // Read protection for EFUSE_BLK8. KEY4, 156 }; 157 158 static const esp_efuse_desc_t RD_DIS_KEY5[] = { 159 {EFUSE_BLK0, 37, 1}, // Read protection for EFUSE_BLK9. KEY5, 160 }; 161 162 static const esp_efuse_desc_t RD_DIS_SYS_DATA_PART2[] = { 163 {EFUSE_BLK0, 38, 1}, // Read protection for EFUSE_BLK10. SYS_DATA_PART2, 164 }; 165 166 static const esp_efuse_desc_t DIS_RTC_RAM_BOOT[] = { 167 {EFUSE_BLK0, 39, 1}, // Disable boot from RTC RAM, 168 }; 169 170 static const esp_efuse_desc_t DIS_ICACHE[] = { 171 {EFUSE_BLK0, 40, 1}, // Disable Icache, 172 }; 173 174 static const esp_efuse_desc_t DIS_DCACHE[] = { 175 {EFUSE_BLK0, 41, 1}, // Disable Dcace, 176 }; 177 178 static const esp_efuse_desc_t DIS_DOWNLOAD_ICACHE[] = { 179 {EFUSE_BLK0, 42, 1}, // Disable Icache in download mode include boot_mode 0 1 2 3 6 7, 180 }; 181 182 static const esp_efuse_desc_t DIS_DOWNLOAD_DCACHE[] = { 183 {EFUSE_BLK0, 43, 1}, // Disable Dcache in download mode include boot_mode 0 1 2 3 6 7, 184 }; 185 186 static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = { 187 {EFUSE_BLK0, 44, 1}, // Disable force chip go to download mode function, 188 }; 189 190 static const esp_efuse_desc_t DIS_USB[] = { 191 {EFUSE_BLK0, 45, 1}, // Disable USB function, 192 }; 193 194 static const esp_efuse_desc_t DIS_CAN[] = { 195 {EFUSE_BLK0, 46, 1}, // Disable CAN function, 196 }; 197 198 static const esp_efuse_desc_t DIS_BOOT_REMAP[] = { 199 {EFUSE_BLK0, 47, 1}, // Disable boot from RAM. REMAP means RAM space can be mapped to ROM space. this signal will disable this function, 200 }; 201 202 static const esp_efuse_desc_t SOFT_DIS_JTAG[] = { 203 {EFUSE_BLK0, 49, 1}, // Software disable jtag jtag can be activated again by hmac module, 204 }; 205 206 static const esp_efuse_desc_t HARD_DIS_JTAG[] = { 207 {EFUSE_BLK0, 50, 1}, // Hardware disable jtag permanently disable jtag function, 208 }; 209 210 static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = { 211 {EFUSE_BLK0, 51, 1}, // Disable flash encrypt function, 212 }; 213 214 static const esp_efuse_desc_t USB_EXCHG_PINS[] = { 215 {EFUSE_BLK0, 56, 1}, // Exchange D+ D- pins, 216 }; 217 218 static const esp_efuse_desc_t USB_EXT_PHY_ENABLE[] = { 219 {EFUSE_BLK0, 57, 1}, // Enable external PHY, 220 }; 221 222 static const esp_efuse_desc_t BLOCK0_VERSION[] = { 223 {EFUSE_BLK0, 59, 2}, // BLOCK0 efuse version, 224 }; 225 226 static const esp_efuse_desc_t VDD_SPI_XPD[] = { 227 {EFUSE_BLK0, 68, 1}, // VDD_SPI regulator power up, 228 }; 229 230 static const esp_efuse_desc_t VDD_SPI_TIEH[] = { 231 {EFUSE_BLK0, 69, 1}, // VDD_SPI regulator tie high to vdda, 232 }; 233 234 static const esp_efuse_desc_t VDD_SPI_FORCE[] = { 235 {EFUSE_BLK0, 70, 1}, // Force using eFuse configuration of VDD_SPI, 236 }; 237 238 static const esp_efuse_desc_t WDT_DELAY_SEL[] = { 239 {EFUSE_BLK0, 80, 2}, // Select RTC WDT time out threshold, 240 }; 241 242 static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = { 243 {EFUSE_BLK0, 82, 3}, // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable, 244 }; 245 246 static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = { 247 {EFUSE_BLK0, 85, 1}, // Enable revoke first secure boot key, 248 }; 249 250 static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = { 251 {EFUSE_BLK0, 86, 1}, // Enable revoke second secure boot key, 252 }; 253 254 static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = { 255 {EFUSE_BLK0, 87, 1}, // Enable revoke third secure boot key, 256 }; 257 258 static const esp_efuse_desc_t KEY_PURPOSE_0[] = { 259 {EFUSE_BLK0, 88, 4}, // Key0 purpose, 260 }; 261 262 static const esp_efuse_desc_t KEY_PURPOSE_1[] = { 263 {EFUSE_BLK0, 92, 4}, // Key1 purpose, 264 }; 265 266 static const esp_efuse_desc_t KEY_PURPOSE_2[] = { 267 {EFUSE_BLK0, 96, 4}, // Key2 purpose, 268 }; 269 270 static const esp_efuse_desc_t KEY_PURPOSE_3[] = { 271 {EFUSE_BLK0, 100, 4}, // Key3 purpose, 272 }; 273 274 static const esp_efuse_desc_t KEY_PURPOSE_4[] = { 275 {EFUSE_BLK0, 104, 4}, // Key4 purpose, 276 }; 277 278 static const esp_efuse_desc_t KEY_PURPOSE_5[] = { 279 {EFUSE_BLK0, 108, 4}, // Key5 purpose, 280 }; 281 282 static const esp_efuse_desc_t SECURE_BOOT_EN[] = { 283 {EFUSE_BLK0, 116, 1}, // Secure boot enable, 284 }; 285 286 static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = { 287 {EFUSE_BLK0, 117, 1}, // Enable aggressive secure boot revoke, 288 }; 289 290 static const esp_efuse_desc_t FLASH_TPUW[] = { 291 {EFUSE_BLK0, 124, 4}, // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms, 292 }; 293 294 static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = { 295 {EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7, 296 }; 297 298 static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = { 299 {EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4, 300 }; 301 302 static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = { 303 {EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1, 304 }; 305 306 static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = { 307 {EFUSE_BLK0, 132, 1}, // Disable download through USB, 308 }; 309 310 static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = { 311 {EFUSE_BLK0, 133, 1}, // Enable security download mode, 312 }; 313 314 static const esp_efuse_desc_t UART_PRINT_CONTROL[] = { 315 {EFUSE_BLK0, 134, 2}, // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print., 316 }; 317 318 static const esp_efuse_desc_t PIN_POWER_SELECTION[] = { 319 {EFUSE_BLK0, 136, 1}, // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI., 320 }; 321 322 static const esp_efuse_desc_t FLASH_TYPE[] = { 323 {EFUSE_BLK0, 137, 1}, // Connected Flash interface type. 0: 4 data line. 1: 8 data line, 324 }; 325 326 static const esp_efuse_desc_t FORCE_SEND_RESUME[] = { 327 {EFUSE_BLK0, 138, 1}, // Force ROM code to send a resume command during SPI boot, 328 }; 329 330 static const esp_efuse_desc_t SECURE_VERSION[] = { 331 {EFUSE_BLK0, 139, 16}, // Secure version for anti-rollback, 332 }; 333 334 static const esp_efuse_desc_t MAC_FACTORY[] = { 335 {EFUSE_BLK1, 40, 8}, // Factory MAC addr [0], 336 {EFUSE_BLK1, 32, 8}, // Factory MAC addr [1], 337 {EFUSE_BLK1, 24, 8}, // Factory MAC addr [2], 338 {EFUSE_BLK1, 16, 8}, // Factory MAC addr [3], 339 {EFUSE_BLK1, 8, 8}, // Factory MAC addr [4], 340 {EFUSE_BLK1, 0, 8}, // Factory MAC addr [5], 341 }; 342 343 static const esp_efuse_desc_t SPI_PAD_CONFIG_CLK[] = { 344 {EFUSE_BLK1, 48, 6}, // SPI_PAD_configure CLK, 345 }; 346 347 static const esp_efuse_desc_t SPI_PAD_CONFIG_Q_D1[] = { 348 {EFUSE_BLK1, 54, 6}, // SPI_PAD_configure Q(D1), 349 }; 350 351 static const esp_efuse_desc_t SPI_PAD_CONFIG_D_D0[] = { 352 {EFUSE_BLK1, 60, 6}, // SPI_PAD_configure D(D0), 353 }; 354 355 static const esp_efuse_desc_t SPI_PAD_CONFIG_CS[] = { 356 {EFUSE_BLK1, 66, 6}, // SPI_PAD_configure CS, 357 }; 358 359 static const esp_efuse_desc_t SPI_PAD_CONFIG_HD_D3[] = { 360 {EFUSE_BLK1, 72, 6}, // SPI_PAD_configure HD(D3), 361 }; 362 363 static const esp_efuse_desc_t SPI_PAD_CONFIG_WP_D2[] = { 364 {EFUSE_BLK1, 78, 6}, // SPI_PAD_configure WP(D2), 365 }; 366 367 static const esp_efuse_desc_t SPI_PAD_CONFIG_DQS[] = { 368 {EFUSE_BLK1, 84, 6}, // SPI_PAD_configure DQS, 369 }; 370 371 static const esp_efuse_desc_t SPI_PAD_CONFIG_D4[] = { 372 {EFUSE_BLK1, 90, 6}, // SPI_PAD_configure D4, 373 }; 374 375 static const esp_efuse_desc_t SPI_PAD_CONFIG_D5[] = { 376 {EFUSE_BLK1, 96, 6}, // SPI_PAD_configure D5, 377 }; 378 379 static const esp_efuse_desc_t SPI_PAD_CONFIG_D6[] = { 380 {EFUSE_BLK1, 102, 6}, // SPI_PAD_configure D6, 381 }; 382 383 static const esp_efuse_desc_t SPI_PAD_CONFIG_D7[] = { 384 {EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7, 385 }; 386 387 static const esp_efuse_desc_t WAFER_VERSION[] = { 388 {EFUSE_BLK1, 114, 3}, // WAFER version 0:A, 389 }; 390 391 static const esp_efuse_desc_t FLASH_VERSION[] = { 392 {EFUSE_BLK1, 117, 4}, // Flash_version, 393 }; 394 395 static const esp_efuse_desc_t BLOCK1_VERSION[] = { 396 {EFUSE_BLK1, 121, 3}, // BLOCK1 efuse version, 397 }; 398 399 static const esp_efuse_desc_t PSRAM_VERSION[] = { 400 {EFUSE_BLK1, 124, 4}, // PSRAM version, 401 }; 402 403 static const esp_efuse_desc_t PKG_VERSION[] = { 404 {EFUSE_BLK1, 128, 4}, // Package version, 405 }; 406 407 static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = { 408 {EFUSE_BLK2, 0, 128}, // Optional unique 128-bit ID, 409 }; 410 411 static const esp_efuse_desc_t BLOCK2_VERSION[] = { 412 {EFUSE_BLK2, 132, 3}, // Version of BLOCK2: 0-No ADC calib; 1-ADC calib V1; 2-ADC calib V2, 413 }; 414 415 static const esp_efuse_desc_t USER_DATA[] = { 416 {EFUSE_BLK3, 0, 256}, // User data, 417 }; 418 419 static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = { 420 {EFUSE_BLK3, 200, 48}, // Custom MAC, 421 }; 422 423 static const esp_efuse_desc_t KEY0[] = { 424 {EFUSE_BLK4, 0, 256}, // Key0 or user data, 425 }; 426 427 static const esp_efuse_desc_t KEY1[] = { 428 {EFUSE_BLK5, 0, 256}, // Key1 or user data, 429 }; 430 431 static const esp_efuse_desc_t KEY2[] = { 432 {EFUSE_BLK6, 0, 256}, // Key2 or user data, 433 }; 434 435 static const esp_efuse_desc_t KEY3[] = { 436 {EFUSE_BLK7, 0, 256}, // Key3 or user data, 437 }; 438 439 static const esp_efuse_desc_t KEY4[] = { 440 {EFUSE_BLK8, 0, 256}, // Key4 or user data, 441 }; 442 443 static const esp_efuse_desc_t KEY5[] = { 444 {EFUSE_BLK9, 0, 256}, // Key5 or user data, 445 }; 446 447 static const esp_efuse_desc_t SYS_DATA_PART2[] = { 448 {EFUSE_BLK10, 0, 256}, // System configuration, 449 }; 450 451 452 453 454 455 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[] = { 456 &WR_DIS[0], // Write protection 457 NULL 458 }; 459 460 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = { 461 &WR_DIS_RD_DIS[0], // Write protection for RD_DIS.KEY0 RD_DIS.KEY1 RD_DIS.KEY2 RD_DIS.KEY3 RD_DIS.KEY4 RD_DIS.KEY5 RD_DIS.SYS_DATA_PART2 462 NULL 463 }; 464 465 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_RTC_RAM_BOOT[] = { 466 &WR_DIS_DIS_RTC_RAM_BOOT[0], // Write protection for DIS_RTC_RAM_BOOT 467 NULL 468 }; 469 470 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[] = { 471 &WR_DIS_GROUP_1[0], // Write protection for DIS_ICACHE DIS_DCACHE DIS_DOWNLOAD_ICACHE DIS_DOWNLOAD_DCACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN DIS_BOOT_REMAP SOFT_DIS_JTAG HARD_DIS.JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT 472 NULL 473 }; 474 475 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[] = { 476 &WR_DIS_GROUP_2[0], // Write protection for VDD_SPI_XPD VDD_SPI_TIEH VDD_SPI_FORCE VDD_SPI_INIT VDD_SPI_DCAP WDT_DELAY_SEL 477 NULL 478 }; 479 480 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = { 481 &WR_DIS_SPI_BOOT_CRYPT_CNT[0], // Write protection for SPI_BOOT_CRYPT_CNT 482 NULL 483 }; 484 485 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = { 486 &WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // Write protection for SECURE_BOOT_KEY_REVOKE0 487 NULL 488 }; 489 490 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = { 491 &WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // Write protection for SECURE_BOOT_KEY_REVOKE1 492 NULL 493 }; 494 495 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = { 496 &WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // Write protection for SECURE_BOOT_KEY_REVOKE2 497 NULL 498 }; 499 500 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[] = { 501 &WR_DIS_KEY0_PURPOSE[0], // Write protection for key_purpose. KEY0 502 NULL 503 }; 504 505 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[] = { 506 &WR_DIS_KEY1_PURPOSE[0], // Write protection for key_purpose. KEY1 507 NULL 508 }; 509 510 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[] = { 511 &WR_DIS_KEY2_PURPOSE[0], // Write protection for key_purpose. KEY2 512 NULL 513 }; 514 515 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[] = { 516 &WR_DIS_KEY3_PURPOSE[0], // Write protection for key_purpose. KEY3 517 NULL 518 }; 519 520 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[] = { 521 &WR_DIS_KEY4_PURPOSE[0], // Write protection for key_purpose. KEY4 522 NULL 523 }; 524 525 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[] = { 526 &WR_DIS_KEY5_PURPOSE[0], // Write protection for key_purpose. KEY5 527 NULL 528 }; 529 530 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = { 531 &WR_DIS_SECURE_BOOT_EN[0], // Write protection for SECURE_BOOT_EN 532 NULL 533 }; 534 535 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { 536 &WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE 537 NULL 538 }; 539 540 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = { 541 &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION 542 NULL 543 }; 544 545 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = { 546 &WR_DIS_BLK1[0], // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS 547 NULL 548 }; 549 550 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = { 551 &WR_DIS_SYS_DATA_PART1[0], // Write protection for EFUSE_BLK2. SYS_DATA_PART1 552 NULL 553 }; 554 555 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[] = { 556 &WR_DIS_USER_DATA[0], // Write protection for EFUSE_BLK3. USER_DATA 557 NULL 558 }; 559 560 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[] = { 561 &WR_DIS_KEY0[0], // Write protection for EFUSE_BLK4. KEY0 562 NULL 563 }; 564 565 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[] = { 566 &WR_DIS_KEY1[0], // Write protection for EFUSE_BLK5. KEY1 567 NULL 568 }; 569 570 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[] = { 571 &WR_DIS_KEY2[0], // Write protection for EFUSE_BLK6. KEY2 572 NULL 573 }; 574 575 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[] = { 576 &WR_DIS_KEY3[0], // Write protection for EFUSE_BLK7. KEY3 577 NULL 578 }; 579 580 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[] = { 581 &WR_DIS_KEY4[0], // Write protection for EFUSE_BLK8. KEY4 582 NULL 583 }; 584 585 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[] = { 586 &WR_DIS_KEY5[0], // Write protection for EFUSE_BLK9. KEY5 587 NULL 588 }; 589 590 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[] = { 591 &WR_DIS_SYS_DATA_PART2[0], // Write protection for EFUSE_BLK10. SYS_DATA_PART2 592 NULL 593 }; 594 595 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USB_EXCHG_PINS[] = { 596 &WR_DIS_USB_EXCHG_PINS[0], // Write protection for USB_EXCHG_PINS 597 NULL 598 }; 599 600 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[] = { 601 &RD_DIS[0], // Read protection 602 NULL 603 }; 604 605 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[] = { 606 &RD_DIS_KEY0[0], // Read protection for EFUSE_BLK4. KEY0 607 NULL 608 }; 609 610 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[] = { 611 &RD_DIS_KEY1[0], // Read protection for EFUSE_BLK5. KEY1 612 NULL 613 }; 614 615 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[] = { 616 &RD_DIS_KEY2[0], // Read protection for EFUSE_BLK6. KEY2 617 NULL 618 }; 619 620 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[] = { 621 &RD_DIS_KEY3[0], // Read protection for EFUSE_BLK7. KEY3 622 NULL 623 }; 624 625 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[] = { 626 &RD_DIS_KEY4[0], // Read protection for EFUSE_BLK8. KEY4 627 NULL 628 }; 629 630 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[] = { 631 &RD_DIS_KEY5[0], // Read protection for EFUSE_BLK9. KEY5 632 NULL 633 }; 634 635 const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[] = { 636 &RD_DIS_SYS_DATA_PART2[0], // Read protection for EFUSE_BLK10. SYS_DATA_PART2 637 NULL 638 }; 639 640 const esp_efuse_desc_t* ESP_EFUSE_DIS_RTC_RAM_BOOT[] = { 641 &DIS_RTC_RAM_BOOT[0], // Disable boot from RTC RAM 642 NULL 643 }; 644 645 const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = { 646 &DIS_ICACHE[0], // Disable Icache 647 NULL 648 }; 649 650 const esp_efuse_desc_t* ESP_EFUSE_DIS_DCACHE[] = { 651 &DIS_DCACHE[0], // Disable Dcace 652 NULL 653 }; 654 655 const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[] = { 656 &DIS_DOWNLOAD_ICACHE[0], // Disable Icache in download mode include boot_mode 0 1 2 3 6 7 657 NULL 658 }; 659 660 const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_DCACHE[] = { 661 &DIS_DOWNLOAD_DCACHE[0], // Disable Dcache in download mode include boot_mode 0 1 2 3 6 7 662 NULL 663 }; 664 665 const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = { 666 &DIS_FORCE_DOWNLOAD[0], // Disable force chip go to download mode function 667 NULL 668 }; 669 670 const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[] = { 671 &DIS_USB[0], // Disable USB function 672 NULL 673 }; 674 675 const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = { 676 &DIS_CAN[0], // Disable CAN function 677 NULL 678 }; 679 680 const esp_efuse_desc_t* ESP_EFUSE_DIS_BOOT_REMAP[] = { 681 &DIS_BOOT_REMAP[0], // Disable boot from RAM. REMAP means RAM space can be mapped to ROM space. this signal will disable this function 682 NULL 683 }; 684 685 const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = { 686 &SOFT_DIS_JTAG[0], // Software disable jtag jtag can be activated again by hmac module 687 NULL 688 }; 689 690 const esp_efuse_desc_t* ESP_EFUSE_HARD_DIS_JTAG[] = { 691 &HARD_DIS_JTAG[0], // Hardware disable jtag permanently disable jtag function 692 NULL 693 }; 694 695 const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = { 696 &DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // Disable flash encrypt function 697 NULL 698 }; 699 700 const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = { 701 &USB_EXCHG_PINS[0], // Exchange D+ D- pins 702 NULL 703 }; 704 705 const esp_efuse_desc_t* ESP_EFUSE_USB_EXT_PHY_ENABLE[] = { 706 &USB_EXT_PHY_ENABLE[0], // Enable external PHY 707 NULL 708 }; 709 710 const esp_efuse_desc_t* ESP_EFUSE_BLOCK0_VERSION[] = { 711 &BLOCK0_VERSION[0], // BLOCK0 efuse version 712 NULL 713 }; 714 715 const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[] = { 716 &VDD_SPI_XPD[0], // VDD_SPI regulator power up 717 NULL 718 }; 719 720 const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_TIEH[] = { 721 &VDD_SPI_TIEH[0], // VDD_SPI regulator tie high to vdda 722 NULL 723 }; 724 725 const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_FORCE[] = { 726 &VDD_SPI_FORCE[0], // Force using eFuse configuration of VDD_SPI 727 NULL 728 }; 729 730 const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = { 731 &WDT_DELAY_SEL[0], // Select RTC WDT time out threshold 732 NULL 733 }; 734 735 const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = { 736 &SPI_BOOT_CRYPT_CNT[0], // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable 737 NULL 738 }; 739 740 const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = { 741 &SECURE_BOOT_KEY_REVOKE0[0], // Enable revoke first secure boot key 742 NULL 743 }; 744 745 const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = { 746 &SECURE_BOOT_KEY_REVOKE1[0], // Enable revoke second secure boot key 747 NULL 748 }; 749 750 const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = { 751 &SECURE_BOOT_KEY_REVOKE2[0], // Enable revoke third secure boot key 752 NULL 753 }; 754 755 const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = { 756 &KEY_PURPOSE_0[0], // Key0 purpose 757 NULL 758 }; 759 760 const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = { 761 &KEY_PURPOSE_1[0], // Key1 purpose 762 NULL 763 }; 764 765 const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = { 766 &KEY_PURPOSE_2[0], // Key2 purpose 767 NULL 768 }; 769 770 const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = { 771 &KEY_PURPOSE_3[0], // Key3 purpose 772 NULL 773 }; 774 775 const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = { 776 &KEY_PURPOSE_4[0], // Key4 purpose 777 NULL 778 }; 779 780 const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = { 781 &KEY_PURPOSE_5[0], // Key5 purpose 782 NULL 783 }; 784 785 const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = { 786 &SECURE_BOOT_EN[0], // Secure boot enable 787 NULL 788 }; 789 790 const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { 791 &SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Enable aggressive secure boot revoke 792 NULL 793 }; 794 795 const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = { 796 &FLASH_TPUW[0], // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms 797 NULL 798 }; 799 800 const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = { 801 &DIS_DOWNLOAD_MODE[0], // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7 802 NULL 803 }; 804 805 const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = { 806 &DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4 807 NULL 808 }; 809 810 const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = { 811 &UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1 812 NULL 813 }; 814 815 const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = { 816 &DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB 817 NULL 818 }; 819 820 const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = { 821 &ENABLE_SECURITY_DOWNLOAD[0], // Enable security download mode 822 NULL 823 }; 824 825 const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = { 826 &UART_PRINT_CONTROL[0], // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print. 827 NULL 828 }; 829 830 const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[] = { 831 &PIN_POWER_SELECTION[0], // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI. 832 NULL 833 }; 834 835 const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = { 836 &FLASH_TYPE[0], // Connected Flash interface type. 0: 4 data line. 1: 8 data line 837 NULL 838 }; 839 840 const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = { 841 &FORCE_SEND_RESUME[0], // Force ROM code to send a resume command during SPI boot 842 NULL 843 }; 844 845 const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = { 846 &SECURE_VERSION[0], // Secure version for anti-rollback 847 NULL 848 }; 849 850 const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[] = { 851 &MAC_FACTORY[0], // Factory MAC addr [0] 852 &MAC_FACTORY[1], // Factory MAC addr [1] 853 &MAC_FACTORY[2], // Factory MAC addr [2] 854 &MAC_FACTORY[3], // Factory MAC addr [3] 855 &MAC_FACTORY[4], // Factory MAC addr [4] 856 &MAC_FACTORY[5], // Factory MAC addr [5] 857 NULL 858 }; 859 860 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[] = { 861 &SPI_PAD_CONFIG_CLK[0], // SPI_PAD_configure CLK 862 NULL 863 }; 864 865 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[] = { 866 &SPI_PAD_CONFIG_Q_D1[0], // SPI_PAD_configure Q(D1) 867 NULL 868 }; 869 870 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[] = { 871 &SPI_PAD_CONFIG_D_D0[0], // SPI_PAD_configure D(D0) 872 NULL 873 }; 874 875 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[] = { 876 &SPI_PAD_CONFIG_CS[0], // SPI_PAD_configure CS 877 NULL 878 }; 879 880 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[] = { 881 &SPI_PAD_CONFIG_HD_D3[0], // SPI_PAD_configure HD(D3) 882 NULL 883 }; 884 885 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[] = { 886 &SPI_PAD_CONFIG_WP_D2[0], // SPI_PAD_configure WP(D2) 887 NULL 888 }; 889 890 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[] = { 891 &SPI_PAD_CONFIG_DQS[0], // SPI_PAD_configure DQS 892 NULL 893 }; 894 895 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[] = { 896 &SPI_PAD_CONFIG_D4[0], // SPI_PAD_configure D4 897 NULL 898 }; 899 900 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[] = { 901 &SPI_PAD_CONFIG_D5[0], // SPI_PAD_configure D5 902 NULL 903 }; 904 905 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[] = { 906 &SPI_PAD_CONFIG_D6[0], // SPI_PAD_configure D6 907 NULL 908 }; 909 910 const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[] = { 911 &SPI_PAD_CONFIG_D7[0], // SPI_PAD_configure D7 912 NULL 913 }; 914 915 const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[] = { 916 &WAFER_VERSION[0], // WAFER version 0:A 917 NULL 918 }; 919 920 const esp_efuse_desc_t* ESP_EFUSE_FLASH_VERSION[] = { 921 &FLASH_VERSION[0], // Flash_version 922 NULL 923 }; 924 925 const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[] = { 926 &BLOCK1_VERSION[0], // BLOCK1 efuse version 927 NULL 928 }; 929 930 const esp_efuse_desc_t* ESP_EFUSE_PSRAM_VERSION[] = { 931 &PSRAM_VERSION[0], // PSRAM version 932 NULL 933 }; 934 935 const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = { 936 &PKG_VERSION[0], // Package version 937 NULL 938 }; 939 940 const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = { 941 &OPTIONAL_UNIQUE_ID[0], // Optional unique 128-bit ID 942 NULL 943 }; 944 945 const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[] = { 946 &BLOCK2_VERSION[0], // Version of BLOCK2: 0-No ADC calib; 1-ADC calib V1; 2-ADC calib V2 947 NULL 948 }; 949 950 const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = { 951 &USER_DATA[0], // User data 952 NULL 953 }; 954 955 const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = { 956 &USER_DATA_MAC_CUSTOM[0], // Custom MAC 957 NULL 958 }; 959 960 const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = { 961 &KEY0[0], // Key0 or user data 962 NULL 963 }; 964 965 const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = { 966 &KEY1[0], // Key1 or user data 967 NULL 968 }; 969 970 const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = { 971 &KEY2[0], // Key2 or user data 972 NULL 973 }; 974 975 const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = { 976 &KEY3[0], // Key3 or user data 977 NULL 978 }; 979 980 const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = { 981 &KEY4[0], // Key4 or user data 982 NULL 983 }; 984 985 const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = { 986 &KEY5[0], // Key5 or user data 987 NULL 988 }; 989 990 const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = { 991 &SYS_DATA_PART2[0], // System configuration 992 NULL 993 }; 994
