1 /*
2  * Copyright 2018 NXP
3  * All rights reserved.
4  *
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #include "fsl_common.h"
10 #include "fsl_adapter_crc.h"
11 
12 /*******************************************************************************
13  * Code
14  ******************************************************************************/
HAL_CrcCompute(hal_crc_config_t * crcConfig,uint8_t * dataIn,uint32_t length)15 uint32_t HAL_CrcCompute(hal_crc_config_t *crcConfig, uint8_t *dataIn, uint32_t length)
16 {
17     uint32_t shiftReg    = crcConfig->crcSeed << ((4U - crcConfig->crcSize) << 3U);
18     uint32_t crcPoly     = crcConfig->crcPoly << ((4U - crcConfig->crcSize) << 3U);
19     uint32_t crcXorOut   = crcConfig->crcXorOut << ((4U - crcConfig->crcSize) << 3U);
20     uint16_t startOffset = crcConfig->crcStartByte;
21     uint8_t crcBits      = 8U * crcConfig->crcSize;
22     uint32_t computedCRC = 0;
23     uint32_t i, j;
24     uint8_t data = 0;
25     uint8_t bit;
26 
27     /* Size 0 will bypass CRC calculation. */
28     if (crcConfig->crcSize != 0U)
29     {
30         for (i = 0UL + startOffset; i < length; i++)
31         {
32             data = dataIn[i];
33 
34             if (crcConfig->crcRefIn == KHAL_CrcRefInput)
35             {
36                 bit = 0U;
37                 for (j = 0U; j < 8U; j++)
38                 {
39                     bit = (bit << 1);
40                     bit |= ((data & 1U) != 0U) ? 1U : 0U;
41                     data = (data >> 1);
42                 }
43                 data = bit;
44             }
45 
46             for (j = 0; j < 8U; j++)
47             {
48                 bit  = ((data & 0x80U) != 0U) ? 1U : 0U;
49                 data = (data << 1);
50 
51                 if ((shiftReg & 1UL << 31) != 0U)
52                 {
53                     bit = (bit != 0U) ? 0U : 1U;
54                 }
55 
56                 shiftReg = (shiftReg << 1);
57 
58                 if (bit != 0U)
59                 {
60                     shiftReg ^= crcPoly;
61                 }
62 
63                 if ((bool)bit && ((crcPoly & (1UL << (32U - crcBits))) != 0U))
64                 {
65                     shiftReg |= (1UL << (32U - crcBits));
66                 }
67                 else
68                 {
69                     shiftReg &= ~(1UL << (32U - crcBits));
70                 }
71             }
72         }
73 
74         shiftReg ^= crcXorOut;
75 
76         if (crcConfig->crcByteOrder == KHAL_CrcMSByteFirst)
77         {
78             computedCRC = (shiftReg >> (32U - crcBits));
79         }
80         else
81         {
82             computedCRC = 0;
83             j           = 1U;
84             for (i = 0; i < 32U; i++)
85             {
86                 computedCRC = (computedCRC << 1);
87                 computedCRC |= ((shiftReg & j) != 0U) ? 1U : 0U;
88                 j = (j << 1);
89             }
90         }
91     }
92 
93     return computedCRC;
94 }
95