1 /*
2 * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /*
20 * This file is derivative of CMSIS V5.9.0 startup_ARMCM33.c
21 * Git SHA: 2b7495b8535bdcb306dac29b9ded4cfb679d7e5c
22 */
23
24 #include "tfm_hal_device_header.h"
25 #include "startup.h"
26 #include "exception_info.h"
27
default_tfm_IRQHandler(void)28 __NO_RETURN __attribute__((naked)) void default_tfm_IRQHandler(void) {
29 EXCEPTION_INFO();
30
31 __ASM volatile(
32 "BL default_irq_handler \n"
33 "B . \n"
34 );
35 }
36
37 DEFAULT_IRQ_HANDLER(NMI_Handler)
38 DEFAULT_IRQ_HANDLER(SVC_Handler)
39 DEFAULT_IRQ_HANDLER(DebugMon_Handler)
40 DEFAULT_IRQ_HANDLER(PendSV_Handler)
41 DEFAULT_IRQ_HANDLER(SysTick_Handler)
42
43 DEFAULT_IRQ_HANDLER(FPU_IRQHandler)
44 DEFAULT_IRQ_HANDLER(CACHE_IRQHandler)
45 DEFAULT_IRQ_HANDLER(CLOCK_POWER_IRQHandler)
46 DEFAULT_IRQ_HANDLER(SERIAL0_IRQHandler)
47 DEFAULT_IRQ_HANDLER(SERIAL1_IRQHandler)
48 DEFAULT_IRQ_HANDLER(SPIM4_IRQHandler)
49 DEFAULT_IRQ_HANDLER(SERIAL2_IRQHandler)
50 DEFAULT_IRQ_HANDLER(SERIAL3_IRQHandler)
51 DEFAULT_IRQ_HANDLER(GPIOTE0_IRQHandler)
52 DEFAULT_IRQ_HANDLER(SAADC_IRQHandler)
53 DEFAULT_IRQ_HANDLER(TIMER0_IRQHandler)
54 DEFAULT_IRQ_HANDLER(TIMER1_IRQHandler)
55 DEFAULT_IRQ_HANDLER(TIMER2_IRQHandler)
56 DEFAULT_IRQ_HANDLER(RTC0_IRQHandler)
57 DEFAULT_IRQ_HANDLER(RTC1_IRQHandler)
58 DEFAULT_IRQ_HANDLER(WDT0_IRQHandler)
59 DEFAULT_IRQ_HANDLER(WDT1_IRQHandler)
60 DEFAULT_IRQ_HANDLER(COMP_LPCOMP_IRQHandler)
61 DEFAULT_IRQ_HANDLER(EGU0_IRQHandler)
62 DEFAULT_IRQ_HANDLER(EGU1_IRQHandler)
63 DEFAULT_IRQ_HANDLER(EGU2_IRQHandler)
64 DEFAULT_IRQ_HANDLER(EGU3_IRQHandler)
65 DEFAULT_IRQ_HANDLER(EGU4_IRQHandler)
66 DEFAULT_IRQ_HANDLER(EGU5_IRQHandler)
67 DEFAULT_IRQ_HANDLER(PWM0_IRQHandler)
68 DEFAULT_IRQ_HANDLER(PWM1_IRQHandler)
69 DEFAULT_IRQ_HANDLER(PWM2_IRQHandler)
70 DEFAULT_IRQ_HANDLER(PWM3_IRQHandler)
71 DEFAULT_IRQ_HANDLER(PDM0_IRQHandler)
72 DEFAULT_IRQ_HANDLER(I2S0_IRQHandler)
73 DEFAULT_IRQ_HANDLER(IPC_IRQHandler)
74 DEFAULT_IRQ_HANDLER(QSPI_IRQHandler)
75 DEFAULT_IRQ_HANDLER(NFCT_IRQHandler)
76 DEFAULT_IRQ_HANDLER(GPIOTE1_IRQHandler)
77 DEFAULT_IRQ_HANDLER(QDEC0_IRQHandler)
78 DEFAULT_IRQ_HANDLER(QDEC1_IRQHandler)
79 DEFAULT_IRQ_HANDLER(USBD_IRQHandler)
80 DEFAULT_IRQ_HANDLER(USBREGULATOR_IRQHandler)
81 DEFAULT_IRQ_HANDLER(KMU_IRQHandler)
82 DEFAULT_IRQ_HANDLER(CRYPTOCELL_IRQHandler)
83
84 #if defined(DOMAIN_NS) || defined(BL2)
85 DEFAULT_IRQ_HANDLER(SPU_IRQHandler)
86 DEFAULT_IRQ_HANDLER(HardFault_Handler)
87 DEFAULT_IRQ_HANDLER(MemManage_Handler)
88 DEFAULT_IRQ_HANDLER(BusFault_Handler)
89 DEFAULT_IRQ_HANDLER(UsageFault_Handler)
90 DEFAULT_IRQ_HANDLER(SecureFault_Handler)
91 #else
92 /*
93 * Default IRQ handlers will usually be overriden as they are
94 * weak. But due to the way TF-M links it's binary (doesn't use
95 * whole-archive), weak doesn't always work. So we explicitly ifdef
96 * out some IRQ handlers that we know will be overridden anyway to be
97 * safe.
98 */
99 #endif
100
101 #if defined ( __GNUC__ )
102 #pragma GCC diagnostic push
103 #pragma GCC diagnostic ignored "-Wpedantic"
104 #endif
105
106 const VECTOR_TABLE_Type __VECTOR_TABLE[] __VECTOR_TABLE_ATTRIBUTE = {
107 (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
108 Reset_Handler, /* Reset Handler */
109 NMI_Handler, /* NMI Handler */
110 HardFault_Handler, /* Hard Fault Handler */
111 MemManage_Handler, /* MPU Fault Handler */
112 BusFault_Handler, /* Bus Fault Handler */
113 UsageFault_Handler, /* Usage Fault Handler */
114 SecureFault_Handler, /* Secure Fault Handler */
115 0, /* Reserved */
116 0, /* Reserved */
117 0, /* Reserved */
118 SVC_Handler, /* SVCall Handler */
119 DebugMon_Handler, /* Debug Monitor Handler */
120 0, /* Reserved */
121 PendSV_Handler, /* PendSV Handler */
122 SysTick_Handler, /* SysTick Handler */
123
124 /* External Interrupts */
125 FPU_IRQHandler,
126 CACHE_IRQHandler,
127 0, /* Reserved */
128 SPU_IRQHandler,
129 0, /* Reserved */
130 CLOCK_POWER_IRQHandler,
131 0, /* Reserved */
132 0, /* Reserved */
133 SERIAL0_IRQHandler,
134 SERIAL1_IRQHandler,
135 SPIM4_IRQHandler,
136 SERIAL2_IRQHandler,
137 SERIAL3_IRQHandler,
138 GPIOTE0_IRQHandler,
139 SAADC_IRQHandler,
140 TIMER0_IRQHandler,
141 TIMER1_IRQHandler,
142 TIMER2_IRQHandler,
143 0, /* Reserved */
144 0, /* Reserved */
145 RTC0_IRQHandler,
146 RTC1_IRQHandler,
147 0, /* Reserved */
148 0, /* Reserved */
149 WDT0_IRQHandler,
150 WDT1_IRQHandler,
151 COMP_LPCOMP_IRQHandler,
152 EGU0_IRQHandler,
153 EGU1_IRQHandler,
154 EGU2_IRQHandler,
155 EGU3_IRQHandler,
156 EGU4_IRQHandler,
157 EGU5_IRQHandler,
158 PWM0_IRQHandler,
159 PWM1_IRQHandler,
160 PWM2_IRQHandler,
161 PWM3_IRQHandler,
162 0, /* Reserved */
163 PDM0_IRQHandler,
164 0, /* Reserved */
165 I2S0_IRQHandler,
166 0, /* Reserved */
167 IPC_IRQHandler,
168 QSPI_IRQHandler,
169 0, /* Reserved */
170 NFCT_IRQHandler,
171 0, /* Reserved */
172 GPIOTE1_IRQHandler,
173 0, /* Reserved */
174 0, /* Reserved */
175 0, /* Reserved */
176 QDEC0_IRQHandler,
177 QDEC1_IRQHandler,
178 0, /* Reserved */
179 USBD_IRQHandler,
180 USBREGULATOR_IRQHandler,
181 0, /* Reserved */
182 KMU_IRQHandler,
183 0, /* Reserved */
184 0, /* Reserved */
185 0, /* Reserved */
186 0, /* Reserved */
187 0, /* Reserved */
188 0, /* Reserved */
189 0, /* Reserved */
190 0, /* Reserved */
191 0, /* Reserved */
192 0, /* Reserved */
193 CRYPTOCELL_IRQHandler,
194 };
195
196 #if defined ( __GNUC__ )
197 #pragma GCC diagnostic pop
198 #endif
199
