1 /*
2 * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
3 * Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
4 * Copyright 2016-2017，2020 NXP. Not a Contribution.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 *
8 * Licensed under the Apache License, Version 2.0 (the License); you may
9 * not use this file except in compliance with the License.
10 * You may obtain a copy of the License at
11 *
12 * http://www.apache.org/licenses/LICENSE-2.0
13 *
14 * Unless required by applicable law or agreed to in writing, software
15 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
16 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
17 * See the License for the specific language governing permissions and
18 * limitations under the License.
19 */
20
21 #include "fsl_uart_cmsis.h"
22
23 /* Component ID definition, used by tools. */
24 #ifndef FSL_COMPONENT_ID
25 #define FSL_COMPONENT_ID "platform.drivers.iuart_cmsis"
26 #endif
27
28 #if ((defined(UART1) && defined(RTE_USART1) && RTE_USART1) || (defined(UART2) && defined(RTE_USART2) && RTE_USART2) || \
29 (defined(UART3) && defined(RTE_USART3) && RTE_USART3) || (RTE_USART4 && defined(UART4)))
30
31 #define ARM_UART_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR((2), (1))
32
33 /*
34 * ARMCC does not support split the data section automatically, so the driver
35 * needs to split the data to separate sections explicitly, to reduce codesize.
36 */
37 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
38 #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
39 #endif
40
41 typedef const struct _cmsis_uart_resource
42 {
43 UART_Type *base; /*!< UART peripheral base address. */
44 uint32_t (*GetFreq)(void); /*!< Function to get the clock frequency. */
45 } cmsis_uart_resource_t;
46
47 typedef struct _cmsis_uart_non_blocking_driver_state
48 {
49 cmsis_uart_resource_t *resource; /*!< Basic UART resource. */
50 uart_handle_t *handle; /*!< Interupt transfer handle. */
51 ARM_USART_SignalEvent_t cb_event; /*!< Callback function. */
52 uint8_t flags; /*!< Control and state flags. */
53 } cmsis_uart_non_blocking_driver_state_t;
54 #if (defined(FSL_FEATURE_SOC_SDMA_COUNT) && FSL_FEATURE_SOC_SDMA_COUNT)
55 typedef struct _cmsis_uart_sdma_resource
56 {
57 SDMAARM_Type *txSdmaBase; /*!< SDMA peripheral base address for TX. */
58 uint32_t txSdmaChannel; /*!< SDMA channel for UART TX. */
59 uint32_t txSdmaRequest; /*!< TX SDMA request source. */
60 uint8_t txSdmaPriority; /*!< TX SDMA channel priority. */
61
62 SDMAARM_Type *rxSdmaBase; /*!< SDMA peripheral base address for RX. */
63 uint32_t rxSdmaChannel; /*!< SDMA channel for UART RX. */
64 uint32_t rxSdmaRequest; /*!< RX SDMA request source. */
65 uint8_t rxSdmaPriority; /*!< RX SDMA channel priority. */
66 } cmsis_uart_sdma_resource_t;
67
68 typedef struct _cmsis_uart_sdma_driver_state
69 {
70 cmsis_uart_resource_t *resource; /*!< UART basic resource. */
71 cmsis_uart_sdma_resource_t *sdmaResource; /*!< UART SDMA resource. */
72 uart_sdma_handle_t *handle; /*!< UART SDMA transfer handle. */
73 sdma_handle_t *rxHandle; /*!< SDMA RX handle. */
74 sdma_handle_t *txHandle; /*!< SDMA TX handle. */
75 ARM_USART_SignalEvent_t cb_event; /*!< Callback function. */
76 uint8_t flags; /*!< Control and state flags. */
77 } cmsis_uart_sdma_driver_state_t;
78 #endif
79
80 enum _uart_transfer_states
81 {
82 kUART_TxIdle, /*!< TX idle. */
83 kUART_TxBusy, /*!< TX busy. */
84 kUART_RxIdle, /*!< RX idle. */
85 kUART_RxBusy /*!< RX busy. */
86 };
87
88 /* Driver Version */
89 static const ARM_DRIVER_VERSION s_uartDriverVersion = {ARM_USART_API_VERSION, ARM_UART_DRV_VERSION};
90
91 static const ARM_USART_CAPABILITIES s_uartDriverCapabilities = {
92 1, /* supports UART (Asynchronous) mode */
93 0, /* supports Synchronous Master mode */
94 0, /* supports Synchronous Slave mode */
95 0, /* supports UART Single-wire mode */
96 0, /* supports UART IrDA mode */
97 0, /* supports UART Smart Card mode */
98 0, /* Smart Card Clock generator */
99 0, /* RTS Flow Control available */
100 0, /* CTS Flow Control available */
101 0, /* Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE */
102 0, /* Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT */
103 0, /* RTS Line: 0=not available, 1=available */
104 0, /* CTS Line: 0=not available, 1=available */
105 0, /* DTR Line: 0=not available, 1=available */
106 0, /* DSR Line: 0=not available, 1=available */
107 0, /* DCD Line: 0=not available, 1=available */
108 0, /* RI Line: 0=not available, 1=available */
109 0, /* Signal CTS change event: \ref ARM_USART_EVENT_CTS */
110 0, /* Signal DSR change event: \ref ARM_USART_EVENT_DSR */
111 0, /* Signal DCD change event: \ref ARM_USART_EVENT_DCD */
112 0, /* Signal RI change event: \ref ARM_USART_EVENT_RI */
113 };
114
115 /*
116 * Common control function used by UART_NonBlockingControl/UART_DmaControl
117 */
UART_CommonControl(uint32_t control,uint32_t arg,cmsis_uart_resource_t * resource,uint8_t * isConfigured)118 static int32_t UART_CommonControl(uint32_t control,
119 uint32_t arg,
120 cmsis_uart_resource_t *resource,
121 uint8_t *isConfigured)
122 {
123 uart_config_t config;
124 int32_t result = ARM_DRIVER_OK;
125 bool isContinue = false;
126
127 UART_GetDefaultConfig(&config);
128
129 switch (control & ARM_USART_CONTROL_Msk)
130 {
131 case ARM_USART_MODE_ASYNCHRONOUS:
132 /* USART Baudrate */
133 config.baudRate_Bps = arg;
134 isContinue = true;
135 break;
136
137 /* TX/RX IO is controlled in application layer. */
138 case ARM_USART_CONTROL_TX:
139 if (0U != arg)
140 {
141 UART_EnableTx(resource->base, true);
142 }
143 else
144 {
145 UART_EnableTx(resource->base, false);
146 }
147 result = ARM_DRIVER_OK;
148 break;
149
150 case ARM_USART_CONTROL_RX:
151 if (0U != arg)
152 {
153 UART_EnableRx(resource->base, true);
154 }
155 else
156 {
157 UART_EnableRx(resource->base, false);
158 }
159
160 result = ARM_DRIVER_OK;
161 break;
162
163 default:
164 result = ARM_DRIVER_ERROR_UNSUPPORTED;
165 break;
166 }
167 if (!isContinue)
168 {
169 return result;
170 }
171
172 switch (control & ARM_USART_DATA_BITS_Msk)
173 {
174 case ARM_USART_DATA_BITS_7:
175 config.dataBitsCount = kUART_SevenDataBits;
176 break;
177
178 case ARM_USART_DATA_BITS_8:
179 config.dataBitsCount = kUART_EightDataBits;
180 break;
181
182 default:
183 result = ARM_USART_ERROR_DATA_BITS;
184 break;
185 }
186 if (result == ARM_USART_ERROR_DATA_BITS)
187 {
188 return result;
189 }
190
191 switch (control & ARM_USART_PARITY_Msk)
192 {
193 case ARM_USART_PARITY_NONE:
194 config.parityMode = kUART_ParityDisabled;
195 break;
196 case ARM_USART_PARITY_EVEN:
197 config.parityMode = kUART_ParityEven;
198 break;
199 case ARM_USART_PARITY_ODD:
200 config.parityMode = kUART_ParityOdd;
201 break;
202 default:
203 result = ARM_USART_ERROR_PARITY;
204 break;
205 }
206 if (result == ARM_USART_ERROR_PARITY)
207 {
208 return result;
209 }
210
211 switch (control & (uint32_t)ARM_USART_STOP_BITS_Msk)
212 {
213 case ARM_USART_STOP_BITS_1:
214 /* The GetDefaultConfig has already set for this case. */
215 break;
216 case ARM_USART_STOP_BITS_2:
217 config.stopBitCount = kUART_TwoStopBit;
218 break;
219 default:
220 result = ARM_USART_ERROR_STOP_BITS;
221 break;
222 }
223
224 /* If UART is already configured, deinit it first. */
225 if (((*isConfigured) & (uint8_t)USART_FLAG_CONFIGURED) != 0U)
226 {
227 UART_Deinit(resource->base);
228 *isConfigured &= ~(uint8_t)(USART_FLAG_CONFIGURED);
229 }
230
231 config.enableTx = true;
232 config.enableRx = true;
233
234 if (kStatus_UART_BaudrateNotSupport == UART_Init(resource->base, &config, resource->GetFreq()))
235 {
236 result = ARM_USART_ERROR_BAUDRATE;
237 }
238 else
239 {
240 *isConfigured |= USART_FLAG_CONFIGURED;
241 }
242 return result;
243 }
244
UARTx_GetVersion(void)245 static ARM_DRIVER_VERSION UARTx_GetVersion(void)
246 {
247 return s_uartDriverVersion;
248 }
249
UARTx_GetCapabilities(void)250 static ARM_USART_CAPABILITIES UARTx_GetCapabilities(void)
251 {
252 return s_uartDriverCapabilities;
253 }
254
UARTx_SetModemControl(ARM_USART_MODEM_CONTROL control)255 static int32_t UARTx_SetModemControl(ARM_USART_MODEM_CONTROL control)
256 {
257 return ARM_DRIVER_ERROR_UNSUPPORTED;
258 }
259
UARTx_GetModemStatus(void)260 static ARM_USART_MODEM_STATUS UARTx_GetModemStatus(void)
261 {
262 ARM_USART_MODEM_STATUS modem_status = {0};
263
264 modem_status.cts = 0U;
265 modem_status.dsr = 0U;
266 modem_status.ri = 0U;
267 modem_status.dcd = 0U;
268 modem_status.reserved = 0U;
269
270 return modem_status;
271 }
272
273 #endif
274
275 #if ((defined(UART1) && defined(RTE_USART1_DMA_EN) && RTE_USART1_DMA_EN) || \
276 (defined(UART2) && defined(RTE_USART2_DMA_EN) && RTE_USART2_DMA_EN) || \
277 (defined(UART3) && defined(RTE_USART3_DMA_EN) && RTE_USART3_DMA_EN) || \
278 (defined(UART4) && defined(RTE_USART4_DMA_EN) && RTE_USART4_DMA_EN) || \
279 (defined(UART5) && defined(RTE_USART5_DMA_EN) && RTE_USART5_DMA_EN))
280
KSDK_UART_SdmaCallback(UART_Type * base,uart_sdma_handle_t * handle,status_t status,void * userData)281 static void KSDK_UART_SdmaCallback(UART_Type *base, uart_sdma_handle_t *handle, status_t status, void *userData)
282 {
283 uint32_t event = 0U;
284
285 if (kStatus_UART_TxIdle == status)
286 {
287 event = ARM_USART_EVENT_SEND_COMPLETE;
288 }
289 else if (kStatus_UART_RxIdle == status)
290 {
291 event = ARM_USART_EVENT_RECEIVE_COMPLETE;
292 }
293 else
294 {
295 ; /* Intentional empty */
296 }
297
298 /* User data is actually CMSIS driver callback. */
299 if ((0U != event) && (NULL != userData))
300 {
301 ((ARM_USART_SignalEvent_t)userData)(event);
302 }
303 }
304
UART_SdmaInitialize(ARM_USART_SignalEvent_t cb_event,cmsis_uart_sdma_driver_state_t * uart)305 static int32_t UART_SdmaInitialize(ARM_USART_SignalEvent_t cb_event, cmsis_uart_sdma_driver_state_t *uart)
306 {
307 if ((uart->flags & (uint8_t)USART_FLAG_INIT) == 0U)
308 {
309 uart->cb_event = cb_event;
310 uart->flags = (uint8_t)USART_FLAG_INIT;
311 }
312
313 return ARM_DRIVER_OK;
314 }
315
UART_SdmaUninitialize(cmsis_uart_sdma_driver_state_t * uart)316 static int32_t UART_SdmaUninitialize(cmsis_uart_sdma_driver_state_t *uart)
317 {
318 uart->flags = (uint8_t)USART_FLAG_UNINIT;
319 return ARM_DRIVER_OK;
320 }
321
UART_SdmaPowerControl(ARM_POWER_STATE state,cmsis_uart_sdma_driver_state_t * uart,sdma_context_data_t * rxContext,sdma_context_data_t * txContext)322 static int32_t UART_SdmaPowerControl(ARM_POWER_STATE state,
323 cmsis_uart_sdma_driver_state_t *uart,
324 sdma_context_data_t *rxContext,
325 sdma_context_data_t *txContext)
326 {
327 status_t status;
328 uart_config_t config;
329 int32_t result = ARM_DRIVER_OK;
330
331 switch (state)
332 {
333 case ARM_POWER_OFF:
334 if ((uart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
335 {
336 UART_Deinit(uart->resource->base);
337 uart->flags = USART_FLAG_INIT;
338 }
339 break;
340 case ARM_POWER_LOW:
341 result = ARM_DRIVER_ERROR_UNSUPPORTED;
342 break;
343 case ARM_POWER_FULL:
344 /* Must be initialized first. */
345 if (uart->flags == (uint8_t)USART_FLAG_UNINIT)
346 {
347 return ARM_DRIVER_ERROR;
348 }
349
350 if ((uart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
351 {
352 /* Driver already powered */
353 break;
354 }
355
356 UART_GetDefaultConfig(&config);
357 config.enableTx = true;
358 config.enableRx = true;
359
360 /* Set up DMA setting. */
361 SDMA_CreateHandle(uart->txHandle, uart->sdmaResource->txSdmaBase, uart->sdmaResource->txSdmaChannel,
362 txContext);
363 SDMA_CreateHandle(uart->rxHandle, uart->sdmaResource->rxSdmaBase, uart->sdmaResource->rxSdmaChannel,
364 rxContext);
365 SDMA_SetChannelPriority(uart->sdmaResource->txSdmaBase, uart->sdmaResource->txSdmaChannel,
366 uart->sdmaResource->txSdmaPriority);
367 SDMA_SetChannelPriority(uart->sdmaResource->rxSdmaBase, uart->sdmaResource->rxSdmaChannel,
368 uart->sdmaResource->rxSdmaPriority);
369 /* Setup the UART. */
370 status = UART_Init(uart->resource->base, &config, uart->resource->GetFreq());
371 if (kStatus_Success != status)
372 {
373 return kStatus_Fail;
374 }
375
376 /* Create UART SDMA handle. */
377 UART_TransferCreateHandleSDMA(uart->resource->base, uart->handle, KSDK_UART_SdmaCallback,
378 (void *)uart->cb_event, uart->txHandle, uart->rxHandle,
379 uart->sdmaResource->txSdmaRequest, uart->sdmaResource->rxSdmaRequest);
380
381 uart->flags = (uart->flags | (uint8_t)(USART_FLAG_POWER | (uint8_t)USART_FLAG_CONFIGURED));
382 break;
383 default:
384 result = ARM_DRIVER_ERROR_UNSUPPORTED;
385 break;
386 }
387
388 return result;
389 }
390
UART_SdmaSend(const void * data,uint32_t num,cmsis_uart_sdma_driver_state_t * uart)391 static int32_t UART_SdmaSend(const void *data, uint32_t num, cmsis_uart_sdma_driver_state_t *uart)
392 {
393 int32_t ret;
394 status_t status;
395 uart_transfer_t xfer;
396
397 xfer.data = (uint8_t *)(uint32_t)data;
398 xfer.dataSize = num;
399
400 status = UART_SendSDMA(uart->resource->base, uart->handle, &xfer);
401
402 switch (status)
403 {
404 case kStatus_Success:
405 ret = ARM_DRIVER_OK;
406 break;
407 case kStatus_InvalidArgument:
408 ret = ARM_DRIVER_ERROR_PARAMETER;
409 break;
410 case kStatus_UART_RxBusy:
411 ret = ARM_DRIVER_ERROR_BUSY;
412 break;
413 default:
414 ret = ARM_DRIVER_ERROR;
415 break;
416 }
417
418 return ret;
419 }
420
UART_SdmaReceive(void * data,uint32_t num,cmsis_uart_sdma_driver_state_t * uart)421 static int32_t UART_SdmaReceive(void *data, uint32_t num, cmsis_uart_sdma_driver_state_t *uart)
422 {
423 int32_t ret;
424 status_t status;
425 uart_transfer_t xfer;
426
427 xfer.data = data;
428 xfer.dataSize = num;
429
430 status = UART_ReceiveSDMA(uart->resource->base, uart->handle, &xfer);
431 switch (status)
432 {
433 case kStatus_Success:
434 ret = ARM_DRIVER_OK;
435 break;
436 case kStatus_InvalidArgument:
437 ret = ARM_DRIVER_ERROR_PARAMETER;
438 break;
439 case kStatus_UART_TxBusy:
440 ret = ARM_DRIVER_ERROR_BUSY;
441 break;
442 default:
443 ret = ARM_DRIVER_ERROR;
444 break;
445 }
446
447 return ret;
448 }
449
UART_SdmaTransfer(const void * data_out,void * data_in,uint32_t num,cmsis_uart_sdma_driver_state_t * uart)450 static int32_t UART_SdmaTransfer(const void *data_out,
451 void *data_in,
452 uint32_t num,
453 cmsis_uart_sdma_driver_state_t *uart)
454 {
455 /* Only in synchronous mode */
456 return ARM_DRIVER_ERROR;
457 }
458
UART_SdmaGetTxCount(cmsis_uart_sdma_driver_state_t * uart)459 static uint32_t UART_SdmaGetTxCount(cmsis_uart_sdma_driver_state_t *uart)
460 {
461 /* Not supported by current driver. */
462 return 0;
463 }
464
UART_SdmaGetRxCount(cmsis_uart_sdma_driver_state_t * uart)465 static uint32_t UART_SdmaGetRxCount(cmsis_uart_sdma_driver_state_t *uart)
466 {
467 /* Not supported by current driver. */
468 return 0;
469 }
470
UART_SdmaControl(uint32_t control,uint32_t arg,cmsis_uart_sdma_driver_state_t * uart)471 static int32_t UART_SdmaControl(uint32_t control, uint32_t arg, cmsis_uart_sdma_driver_state_t *uart)
472 {
473 /* Must be power on. */
474 if ((uart->flags & (uint8_t)USART_FLAG_POWER) == 0U)
475 {
476 return ARM_DRIVER_ERROR;
477 }
478
479 /* Does not support these features. */
480 if ((control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk)) != 0U)
481 {
482 return ARM_DRIVER_ERROR_UNSUPPORTED;
483 }
484
485 int32_t result = ARM_DRIVER_OK;
486 bool isContinue = false;
487 switch (control & ARM_USART_CONTROL_Msk)
488 {
489 /* Abort Send */
490 case ARM_USART_ABORT_SEND:
491 UART_TransferAbortSendSDMA(uart->resource->base, uart->handle);
492 result = ARM_DRIVER_OK;
493 break;
494
495 /* Abort receive */
496 case ARM_USART_ABORT_RECEIVE:
497 UART_TransferAbortReceiveSDMA(uart->resource->base, uart->handle);
498 result = ARM_DRIVER_OK;
499 break;
500 default:
501 isContinue = true;
502 break;
503 }
504
505 if (isContinue)
506 {
507 result = UART_CommonControl(control, arg, uart->resource, &uart->flags);
508 }
509 return result;
510 }
511
UART_SdmaGetStatus(cmsis_uart_sdma_driver_state_t * uart)512 static ARM_USART_STATUS UART_SdmaGetStatus(cmsis_uart_sdma_driver_state_t *uart)
513 {
514 ARM_USART_STATUS stat = {0};
515
516 stat.tx_busy = ((uint8_t)kUART_TxBusy == uart->handle->txState) ? (1U) : (0U);
517 stat.rx_busy = ((uint8_t)kUART_RxBusy == uart->handle->rxState) ? (1U) : (0U);
518
519 stat.tx_underflow = 0U;
520 stat.rx_overflow = (uint32_t)UART_GetStatusFlag(uart->resource->base, (uint32_t)kUART_RxOverrunFlag);
521 stat.rx_break = (uint32_t)UART_GetStatusFlag(uart->resource->base, (uint32_t)kUART_BreakDetectFlag);
522 stat.rx_framing_error = (uint8_t)UART_GetStatusFlag(uart->resource->base, (uint8_t)kUART_FrameErrorFlag);
523 stat.rx_parity_error = (uint32_t)UART_GetStatusFlag(uart->resource->base, (uint32_t)kUART_ParityErrorFlag);
524 stat.reserved = 0U;
525
526 return stat;
527 }
528 #endif
529
530 #if ((defined(UART1) && defined(RTE_USART1) && RTE_USART1 && !(defined(RTE_USART1_DMA_EN) && RTE_USART1_DMA_EN)) || \
531 (defined(UART2) && defined(RTE_USART2) && RTE_USART2 && !(defined(RTE_USART2_DMA_EN) && RTE_USART2_DMA_EN)) || \
532 (defined(UART3) && defined(RTE_USART3) && RTE_USART3 && !(defined(RTE_USART3_DMA_EN) && RTE_USART3_DMA_EN)) || \
533 (defined(UART4) && defined(RTE_USART4) && RTE_USART4 && !(defined(RTE_USART4_DMA_EN) && RTE_USART4_DMA_EN)))
534
KSDK_UART_NonBlockingCallback(UART_Type * base,uart_handle_t * handle,status_t status,void * userData)535 static void KSDK_UART_NonBlockingCallback(UART_Type *base, uart_handle_t *handle, status_t status, void *userData)
536 {
537 uint32_t event = 0U;
538
539 if (kStatus_UART_TxIdle == status)
540 {
541 event = ARM_USART_EVENT_SEND_COMPLETE;
542 }
543 if (kStatus_UART_RxIdle == status)
544 {
545 event = ARM_USART_EVENT_RECEIVE_COMPLETE;
546 }
547 if (kStatus_UART_RxHardwareOverrun == status)
548 {
549 event = ARM_USART_EVENT_RX_OVERFLOW;
550 }
551
552 /* User data is actually CMSIS driver callback. */
553 if ((0U != event) && (userData != NULL))
554 {
555 ((ARM_USART_SignalEvent_t)userData)(event);
556 }
557 }
558
UART_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event,cmsis_uart_non_blocking_driver_state_t * uart)559 static int32_t UART_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event,
560 cmsis_uart_non_blocking_driver_state_t *uart)
561 {
562 if (0U == (uart->flags & (uint8_t)USART_FLAG_INIT))
563 {
564 uart->cb_event = cb_event;
565 uart->flags = (uint8_t)USART_FLAG_INIT;
566 }
567
568 return ARM_DRIVER_OK;
569 }
570
UART_NonBlockingUninitialize(cmsis_uart_non_blocking_driver_state_t * uart)571 static int32_t UART_NonBlockingUninitialize(cmsis_uart_non_blocking_driver_state_t *uart)
572 {
573 uart->flags = (uint8_t)USART_FLAG_UNINIT;
574 return ARM_DRIVER_OK;
575 }
576
UART_NonBlockingPowerControl(ARM_POWER_STATE state,cmsis_uart_non_blocking_driver_state_t * uart)577 static int32_t UART_NonBlockingPowerControl(ARM_POWER_STATE state, cmsis_uart_non_blocking_driver_state_t *uart)
578 {
579 status_t status;
580 uart_config_t config;
581 int32_t result = ARM_DRIVER_OK;
582
583 switch (state)
584 {
585 case ARM_POWER_OFF:
586 if ((uart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
587 {
588 UART_Deinit(uart->resource->base);
589 uart->flags = USART_FLAG_INIT;
590 }
591 break;
592 case ARM_POWER_LOW:
593 result = ARM_DRIVER_ERROR_UNSUPPORTED;
594 break;
595 case ARM_POWER_FULL:
596 /* Must be initialized first. */
597 if (uart->flags == USART_FLAG_UNINIT)
598 {
599 return ARM_DRIVER_ERROR;
600 }
601
602 if ((uart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
603 {
604 /* Driver already powered */
605 break;
606 }
607
608 UART_GetDefaultConfig(&config);
609 config.enableTx = true;
610 config.enableRx = true;
611
612 status = UART_Init(uart->resource->base, &config, uart->resource->GetFreq());
613 if (kStatus_Success != status)
614 {
615 return kStatus_Fail;
616 }
617 UART_TransferCreateHandle(uart->resource->base, uart->handle, KSDK_UART_NonBlockingCallback,
618 (void *)uart->cb_event);
619 uart->flags |= (USART_FLAG_POWER | USART_FLAG_CONFIGURED);
620 break;
621 default:
622 result = ARM_DRIVER_ERROR_UNSUPPORTED;
623 break;
624 }
625
626 return result;
627 }
628
UART_NonBlockingSend(const void * data,uint32_t num,cmsis_uart_non_blocking_driver_state_t * uart)629 static int32_t UART_NonBlockingSend(const void *data, uint32_t num, cmsis_uart_non_blocking_driver_state_t *uart)
630 {
631 int32_t ret;
632 status_t status;
633 uart_transfer_t xfer;
634
635 xfer.data = (uint8_t *)data;
636 xfer.dataSize = num;
637
638 status = UART_TransferSendNonBlocking(uart->resource->base, uart->handle, &xfer);
639
640 switch (status)
641 {
642 case kStatus_Success:
643 ret = ARM_DRIVER_OK;
644 break;
645 case kStatus_InvalidArgument:
646 ret = ARM_DRIVER_ERROR_PARAMETER;
647 break;
648 case kStatus_UART_RxBusy:
649 ret = ARM_DRIVER_ERROR_BUSY;
650 break;
651 default:
652 ret = ARM_DRIVER_ERROR;
653 break;
654 }
655
656 return ret;
657 }
658
UART_NonBlockingReceive(void * data,uint32_t num,cmsis_uart_non_blocking_driver_state_t * uart)659 static int32_t UART_NonBlockingReceive(void *data, uint32_t num, cmsis_uart_non_blocking_driver_state_t *uart)
660 {
661 int32_t ret;
662 status_t status;
663 uart_transfer_t xfer;
664
665 xfer.data = data;
666 xfer.dataSize = num;
667
668 status = UART_TransferReceiveNonBlocking(uart->resource->base, uart->handle, &xfer, NULL);
669
670 switch (status)
671 {
672 case kStatus_Success:
673 ret = ARM_DRIVER_OK;
674 break;
675 case kStatus_InvalidArgument:
676 ret = ARM_DRIVER_ERROR_PARAMETER;
677 break;
678 case kStatus_UART_TxBusy:
679 ret = ARM_DRIVER_ERROR_BUSY;
680 break;
681 default:
682 ret = ARM_DRIVER_ERROR;
683 break;
684 }
685
686 return ret;
687 }
688
UART_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num,cmsis_uart_non_blocking_driver_state_t * uart)689 static int32_t UART_NonBlockingTransfer(const void *data_out,
690 void *data_in,
691 uint32_t num,
692 cmsis_uart_non_blocking_driver_state_t *uart)
693 {
694 /* Only in synchronous mode */
695 return ARM_DRIVER_ERROR;
696 }
697
UART_NonBlockingGetTxCount(cmsis_uart_non_blocking_driver_state_t * uart)698 static uint32_t UART_NonBlockingGetTxCount(cmsis_uart_non_blocking_driver_state_t *uart)
699 {
700 uint32_t cnt;
701
702 /* If TX not in progress, then the TX count is txDataSizeAll saved in handle. */
703 if (kStatus_NoTransferInProgress == UART_TransferGetSendCount(uart->resource->base, uart->handle, &cnt))
704 {
705 cnt = uart->handle->txDataSizeAll;
706 }
707
708 return cnt;
709 }
710
UART_NonBlockingGetRxCount(cmsis_uart_non_blocking_driver_state_t * uart)711 static uint32_t UART_NonBlockingGetRxCount(cmsis_uart_non_blocking_driver_state_t *uart)
712 {
713 uint32_t cnt;
714
715 if (kStatus_NoTransferInProgress == UART_TransferGetReceiveCount(uart->resource->base, uart->handle, &cnt))
716 {
717 cnt = uart->handle->rxDataSizeAll;
718 }
719
720 return cnt;
721 }
722
UART_NonBlockingControl(uint32_t control,uint32_t arg,cmsis_uart_non_blocking_driver_state_t * uart)723 static int32_t UART_NonBlockingControl(uint32_t control, uint32_t arg, cmsis_uart_non_blocking_driver_state_t *uart)
724 {
725 int32_t result = ARM_DRIVER_OK;
726 bool isContinue = false;
727 /* Must be power on. */
728 if (0U == (uart->flags & (uint8_t)USART_FLAG_POWER))
729 {
730 return ARM_DRIVER_ERROR;
731 }
732
733 /* Does not support these features. */
734 if ((control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk)) != 0U)
735 {
736 return ARM_DRIVER_ERROR_UNSUPPORTED;
737 }
738
739 switch (control & ARM_USART_CONTROL_Msk)
740 {
741 /* Abort Send */
742 case ARM_USART_ABORT_SEND:
743 UART_TransferAbortSend(uart->resource->base, uart->handle);
744 result = ARM_DRIVER_OK;
745 break;
746
747 /* Abort receive */
748 case ARM_USART_ABORT_RECEIVE:
749 UART_TransferAbortReceive(uart->resource->base, uart->handle);
750 result = ARM_DRIVER_OK;
751 break;
752 default:
753 isContinue = true;
754 break;
755 }
756
757 if (isContinue)
758 {
759 result = UART_CommonControl(control, arg, uart->resource, &uart->flags);
760 }
761 return result;
762 }
763
UART_NonBlockingGetStatus(cmsis_uart_non_blocking_driver_state_t * uart)764 static ARM_USART_STATUS UART_NonBlockingGetStatus(cmsis_uart_non_blocking_driver_state_t *uart)
765 {
766 ARM_USART_STATUS stat = {0};
767
768 stat.tx_busy = (((uint8_t)kUART_TxBusy == uart->handle->txState) ? (1U) : (0U));
769 stat.rx_busy = (((uint8_t)kUART_RxBusy == uart->handle->rxState) ? (1U) : (0U));
770
771 stat.tx_underflow = 0U;
772 stat.rx_overflow = (uint32_t)UART_GetStatusFlag(uart->resource->base, (uint32_t)kUART_RxOverrunFlag);
773 stat.rx_break = (uint32_t)UART_GetStatusFlag(uart->resource->base, (uint32_t)kUART_BreakDetectFlag);
774 stat.rx_framing_error = (uint32_t)UART_GetStatusFlag(uart->resource->base, (uint32_t)kUART_FrameErrorFlag);
775 stat.rx_parity_error = (uint32_t)UART_GetStatusFlag(uart->resource->base, (uint32_t)kUART_ParityErrorFlag);
776 stat.reserved = 0U;
777
778 return stat;
779 }
780
781 #endif
782
783 #if defined(UART1) && defined(RTE_USART1) && RTE_USART1
784
785 /* User needs to provide the implementation for UART1_GetFreq/InitPins/DeinitPins
786 * in the application for enabling according instance.
787 */
788 extern uint32_t UART1_GetFreq(void);
789
790 static cmsis_uart_resource_t UART1_Resource = {UART1, UART1_GetFreq};
791
792 #if defined(RTE_USART1_DMA_EN) && RTE_USART1_DMA_EN
793
794 static cmsis_uart_sdma_resource_t UART1_SdmaResource = {
795 RTE_USART1_SDMA_TX_DMA_BASE, RTE_USART1_SDMA_TX_CH, RTE_USART1_SDMA_TX_REQUEST, RTE_USART1_SDMA_TX_PRIORITY,
796 RTE_USART1_SDMA_RX_DMA_BASE, RTE_USART1_SDMA_RX_CH, RTE_USART1_SDMA_RX_REQUEST, RTE_USART1_SDMA_RX_PRIORITY,
797 };
798
799 AT_NONCACHEABLE_SECTION_ALIGN(static uart_sdma_handle_t UART1_SdmaHandle, 4);
800 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART1_SdmaTxHandle, 4);
801 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART1_SdmaRxHandle, 4);
802
803 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART1_SdmaTxContext, 4);
804 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART1_SdmaRxContext, 4);
805
806 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
807 ARMCC_SECTION("uart1_sdma_driver_state")
808 static cmsis_uart_sdma_driver_state_t UART1_SdmaDriverState = {
809 #else
810 static cmsis_uart_sdma_driver_state_t UART1_SdmaDriverState = {
811 #endif
812 &UART1_Resource, &UART1_SdmaResource, &UART1_SdmaHandle, &UART1_SdmaRxHandle, &UART1_SdmaTxHandle,
813 };
814
UART1_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)815 static int32_t UART1_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)
816 {
817 #ifdef RTE_USART1_PIN_INIT
818 RTE_USART1_PIN_INIT();
819 #endif
820 return UART_SdmaInitialize(cb_event, &UART1_SdmaDriverState);
821 }
822
UART1_SdmaUninitialize(void)823 static int32_t UART1_SdmaUninitialize(void)
824 {
825 #ifdef RTE_USART1_PIN_DEINIT
826 RTE_USART1_PIN_DEINIT();
827 #endif
828 return UART_SdmaUninitialize(&UART1_SdmaDriverState);
829 }
830
UART1_SdmaPowerControl(ARM_POWER_STATE state)831 static int32_t UART1_SdmaPowerControl(ARM_POWER_STATE state)
832 {
833 return UART_SdmaPowerControl(state, &UART1_SdmaDriverState, &UART1_SdmaRxContext, &UART1_SdmaTxContext);
834 }
835
UART1_SdmaSend(const void * data,uint32_t num)836 static int32_t UART1_SdmaSend(const void *data, uint32_t num)
837 {
838 return UART_SdmaSend(data, num, &UART1_SdmaDriverState);
839 }
840
UART1_SdmaReceive(void * data,uint32_t num)841 static int32_t UART1_SdmaReceive(void *data, uint32_t num)
842 {
843 return UART_SdmaReceive(data, num, &UART1_SdmaDriverState);
844 }
845
UART1_SdmaTransfer(const void * data_out,void * data_in,uint32_t num)846 static int32_t UART1_SdmaTransfer(const void *data_out, void *data_in, uint32_t num)
847 {
848 return UART_SdmaTransfer(data_out, data_in, num, &UART1_SdmaDriverState);
849 }
850
UART1_SdmaGetTxCount(void)851 static uint32_t UART1_SdmaGetTxCount(void)
852 {
853 return UART_SdmaGetTxCount(&UART1_SdmaDriverState);
854 }
855
UART1_SdmaGetRxCount(void)856 static uint32_t UART1_SdmaGetRxCount(void)
857 {
858 return UART_SdmaGetRxCount(&UART1_SdmaDriverState);
859 }
860
UART1_SdmaControl(uint32_t control,uint32_t arg)861 static int32_t UART1_SdmaControl(uint32_t control, uint32_t arg)
862 {
863 return UART_SdmaControl(control, arg, &UART1_SdmaDriverState);
864 }
865
UART1_SdmaGetStatus(void)866 static ARM_USART_STATUS UART1_SdmaGetStatus(void)
867 {
868 return UART_SdmaGetStatus(&UART1_SdmaDriverState);
869 }
870
871 #else
872
873 static uart_handle_t UART1_Handle;
874
875 #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
876 static uint8_t uart1_rxRingBuffer[USART_RX_BUFFER_LEN];
877 #endif
878
879 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
880 ARMCC_SECTION("uart1_non_blocking_driver_state")
881 static cmsis_uart_non_blocking_driver_state_t UART1_NonBlockingDriverState = {
882 #else
883 static cmsis_uart_non_blocking_driver_state_t UART1_NonBlockingDriverState = {
884 #endif
885 &UART1_Resource,
886 &UART1_Handle,
887 };
888
UART1_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)889 static int32_t UART1_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
890 {
891 #ifdef RTE_USART1_PIN_INIT
892 RTE_USART1_PIN_INIT();
893 #endif
894 return UART_NonBlockingInitialize(cb_event, &UART1_NonBlockingDriverState);
895 }
896
UART1_NonBlockingUninitialize(void)897 static int32_t UART1_NonBlockingUninitialize(void)
898 {
899 #ifdef RTE_USART1_PIN_DEINIT
900 RTE_USART1_PIN_DEINIT();
901 #endif
902 return UART_NonBlockingUninitialize(&UART1_NonBlockingDriverState);
903 }
904
UART1_NonBlockingPowerControl(ARM_POWER_STATE state)905 static int32_t UART1_NonBlockingPowerControl(ARM_POWER_STATE state)
906 {
907 uint32_t result;
908
909 result = UART_NonBlockingPowerControl(state, &UART1_NonBlockingDriverState);
910
911 #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
912 if ((state == ARM_POWER_FULL) && (UART1_NonBlockingDriverState.handle->rxRingBuffer == NULL))
913 {
914 UART_TransferStartRingBuffer(UART1_NonBlockingDriverState.resource->base, UART1_NonBlockingDriverState.handle,
915 uart1_rxRingBuffer, USART_RX_BUFFER_LEN);
916 }
917 #endif
918
919 return result;
920 }
921
UART1_NonBlockingSend(const void * data,uint32_t num)922 static int32_t UART1_NonBlockingSend(const void *data, uint32_t num)
923 {
924 return UART_NonBlockingSend(data, num, &UART1_NonBlockingDriverState);
925 }
926
UART1_NonBlockingReceive(void * data,uint32_t num)927 static int32_t UART1_NonBlockingReceive(void *data, uint32_t num)
928 {
929 return UART_NonBlockingReceive(data, num, &UART1_NonBlockingDriverState);
930 }
931
UART1_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)932 static int32_t UART1_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
933 {
934 return UART_NonBlockingTransfer(data_out, data_in, num, &UART1_NonBlockingDriverState);
935 }
936
UART1_NonBlockingGetTxCount(void)937 static uint32_t UART1_NonBlockingGetTxCount(void)
938 {
939 return UART_NonBlockingGetTxCount(&UART1_NonBlockingDriverState);
940 }
941
UART1_NonBlockingGetRxCount(void)942 static uint32_t UART1_NonBlockingGetRxCount(void)
943 {
944 return UART_NonBlockingGetRxCount(&UART1_NonBlockingDriverState);
945 }
946
UART1_NonBlockingControl(uint32_t control,uint32_t arg)947 static int32_t UART1_NonBlockingControl(uint32_t control, uint32_t arg)
948 {
949 int32_t result;
950
951 result = UART_NonBlockingControl(control, arg, &UART1_NonBlockingDriverState);
952 if (ARM_DRIVER_OK != result)
953 {
954 return result;
955 }
956 /* Enable the receive interrupts if ring buffer is used */
957 if (UART1_NonBlockingDriverState.handle->rxRingBuffer != NULL)
958 {
959 UART_EnableInterrupts(UART1_NonBlockingDriverState.resource->base,
960 (kUART_RxReadyEnable | kUART_AgingTimerEnable | kUART_RxOverrunEnable |
961 kUART_ParityErrorEnable | kUART_FrameErrorEnable));
962 }
963
964 return ARM_DRIVER_OK;
965 }
966
UART1_NonBlockingGetStatus(void)967 static ARM_USART_STATUS UART1_NonBlockingGetStatus(void)
968 {
969 return UART_NonBlockingGetStatus(&UART1_NonBlockingDriverState);
970 }
971 #endif
972
973 ARM_DRIVER_USART Driver_USART1 = {
974 UARTx_GetVersion, UARTx_GetCapabilities,
975 #if RTE_USART1_DMA_EN
976 UART1_SdmaInitialize, UART1_SdmaUninitialize, UART1_SdmaPowerControl, UART1_SdmaSend, UART1_SdmaReceive,
977 UART1_SdmaTransfer, UART1_SdmaGetTxCount, UART1_SdmaGetRxCount, UART1_SdmaControl, UART1_SdmaGetStatus,
978 #else
979 UART1_NonBlockingInitialize,
980 UART1_NonBlockingUninitialize,
981 UART1_NonBlockingPowerControl,
982 UART1_NonBlockingSend,
983 UART1_NonBlockingReceive,
984 UART1_NonBlockingTransfer,
985 UART1_NonBlockingGetTxCount,
986 UART1_NonBlockingGetRxCount,
987 UART1_NonBlockingControl,
988 UART1_NonBlockingGetStatus,
989 #endif
990 UARTx_SetModemControl, UARTx_GetModemStatus};
991 #endif /* UART1 */
992
993 #if defined(UART2) && defined(RTE_USART2) && RTE_USART2
994
995 /* User needs to provide the implementation for UART2_GetFreq/InitPins/DeinitPins
996 * in the application for enabling according instance.
997 */
998 extern uint32_t UART2_GetFreq(void);
999
1000 static cmsis_uart_resource_t UART2_Resource = {UART2, UART2_GetFreq};
1001
1002 #if defined(RTE_USART2_DMA_EN) && RTE_USART2_DMA_EN
1003
1004 static cmsis_uart_sdma_resource_t UART2_SdmaResource = {
1005 RTE_USART2_SDMA_TX_DMA_BASE, RTE_USART2_SDMA_TX_CH, RTE_USART2_SDMA_TX_REQUEST, RTE_USART2_SDMA_TX_PRIORITY,
1006 RTE_USART2_SDMA_RX_DMA_BASE, RTE_USART2_SDMA_RX_CH, RTE_USART2_SDMA_RX_REQUEST, RTE_USART2_SDMA_RX_PRIORITY,
1007 };
1008
1009 AT_NONCACHEABLE_SECTION_ALIGN(static uart_sdma_handle_t UART2_SdmaHandle, 4);
1010 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART2_SdmaTxHandle, 4);
1011 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART2_SdmaRxHandle, 4);
1012
1013 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART2_SdmaTxContext, 4);
1014 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART2_SdmaRxContext, 4);
1015
1016 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1017 ARMCC_SECTION("uart2_sdma_driver_state")
1018 static cmsis_uart_sdma_driver_state_t UART2_SdmaDriverState = {
1019 #else
1020 static cmsis_uart_sdma_driver_state_t UART2_SdmaDriverState = {
1021 #endif
1022 &UART2_Resource, &UART2_SdmaResource, &UART2_SdmaHandle, &UART2_SdmaRxHandle, &UART2_SdmaTxHandle,
1023 };
1024
UART2_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)1025 static int32_t UART2_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)
1026 {
1027 #ifdef RTE_USART2_PIN_INIT
1028 RTE_USART2_PIN_INIT();
1029 #endif
1030 return UART_SdmaInitialize(cb_event, &UART2_SdmaDriverState);
1031 }
1032
UART2_SdmaUninitialize(void)1033 static int32_t UART2_SdmaUninitialize(void)
1034 {
1035 #ifdef RTE_USART2_PIN_DEINIT
1036 RTE_USART2_PIN_DEINIT();
1037 #endif
1038 return UART_SdmaUninitialize(&UART2_SdmaDriverState);
1039 }
1040
UART2_SdmaPowerControl(ARM_POWER_STATE state)1041 static int32_t UART2_SdmaPowerControl(ARM_POWER_STATE state)
1042 {
1043 return UART_SdmaPowerControl(state, &UART2_SdmaDriverState, &UART2_SdmaRxContext, &UART2_SdmaTxContext);
1044 }
1045
UART2_SdmaSend(const void * data,uint32_t num)1046 static int32_t UART2_SdmaSend(const void *data, uint32_t num)
1047 {
1048 return UART_SdmaSend(data, num, &UART2_SdmaDriverState);
1049 }
1050
UART2_SdmaReceive(void * data,uint32_t num)1051 static int32_t UART2_SdmaReceive(void *data, uint32_t num)
1052 {
1053 return UART_SdmaReceive(data, num, &UART2_SdmaDriverState);
1054 }
1055
UART2_SdmaTransfer(const void * data_out,void * data_in,uint32_t num)1056 static int32_t UART2_SdmaTransfer(const void *data_out, void *data_in, uint32_t num)
1057 {
1058 return UART_SdmaTransfer(data_out, data_in, num, &UART2_SdmaDriverState);
1059 }
1060
UART2_SdmaGetTxCount(void)1061 static uint32_t UART2_SdmaGetTxCount(void)
1062 {
1063 return UART_SdmaGetTxCount(&UART2_SdmaDriverState);
1064 }
1065
UART2_SdmaGetRxCount(void)1066 static uint32_t UART2_SdmaGetRxCount(void)
1067 {
1068 return UART_SdmaGetRxCount(&UART2_SdmaDriverState);
1069 }
1070
UART2_SdmaControl(uint32_t control,uint32_t arg)1071 static int32_t UART2_SdmaControl(uint32_t control, uint32_t arg)
1072 {
1073 return UART_SdmaControl(control, arg, &UART2_SdmaDriverState);
1074 }
1075
UART2_SdmaGetStatus(void)1076 static ARM_USART_STATUS UART2_SdmaGetStatus(void)
1077 {
1078 return UART_SdmaGetStatus(&UART2_SdmaDriverState);
1079 }
1080
1081 #else
1082
1083 static uart_handle_t UART2_Handle;
1084
1085 #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
1086 static uint8_t uart2_rxRingBuffer[USART_RX_BUFFER_LEN];
1087 #endif
1088
1089 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1090 ARMCC_SECTION("uart2_non_blocking_driver_state")
1091 static cmsis_uart_non_blocking_driver_state_t UART2_NonBlockingDriverState = {
1092 #else
1093 static cmsis_uart_non_blocking_driver_state_t UART2_NonBlockingDriverState = {
1094 #endif
1095 &UART2_Resource,
1096 &UART2_Handle,
1097 };
1098
UART2_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1099 static int32_t UART2_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1100 {
1101 #ifdef RTE_USART2_PIN_INIT
1102 RTE_USART2_PIN_INIT();
1103 #endif
1104 return UART_NonBlockingInitialize(cb_event, &UART2_NonBlockingDriverState);
1105 }
1106
UART2_NonBlockingUninitialize(void)1107 static int32_t UART2_NonBlockingUninitialize(void)
1108 {
1109 #ifdef RTE_USART2_PIN_DEINIT
1110 RTE_USART2_PIN_DEINIT();
1111 #endif
1112 return UART_NonBlockingUninitialize(&UART2_NonBlockingDriverState);
1113 }
1114
UART2_NonBlockingPowerControl(ARM_POWER_STATE state)1115 static int32_t UART2_NonBlockingPowerControl(ARM_POWER_STATE state)
1116 {
1117 uint32_t result;
1118
1119 result = UART_NonBlockingPowerControl(state, &UART2_NonBlockingDriverState);
1120
1121 #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
1122 if ((state == ARM_POWER_FULL) && (UART2_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1123 {
1124 UART_TransferStartRingBuffer(UART2_NonBlockingDriverState.resource->base, UART2_NonBlockingDriverState.handle,
1125 uart2_rxRingBuffer, USART_RX_BUFFER_LEN);
1126 }
1127 #endif
1128
1129 return result;
1130 }
1131
UART2_NonBlockingSend(const void * data,uint32_t num)1132 static int32_t UART2_NonBlockingSend(const void *data, uint32_t num)
1133 {
1134 return UART_NonBlockingSend(data, num, &UART2_NonBlockingDriverState);
1135 }
1136
UART2_NonBlockingReceive(void * data,uint32_t num)1137 static int32_t UART2_NonBlockingReceive(void *data, uint32_t num)
1138 {
1139 return UART_NonBlockingReceive(data, num, &UART2_NonBlockingDriverState);
1140 }
1141
UART2_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1142 static int32_t UART2_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1143 {
1144 return UART_NonBlockingTransfer(data_out, data_in, num, &UART2_NonBlockingDriverState);
1145 }
1146
UART2_NonBlockingGetTxCount(void)1147 static uint32_t UART2_NonBlockingGetTxCount(void)
1148 {
1149 return UART_NonBlockingGetTxCount(&UART2_NonBlockingDriverState);
1150 }
1151
UART2_NonBlockingGetRxCount(void)1152 static uint32_t UART2_NonBlockingGetRxCount(void)
1153 {
1154 return UART_NonBlockingGetRxCount(&UART2_NonBlockingDriverState);
1155 }
1156
UART2_NonBlockingControl(uint32_t control,uint32_t arg)1157 static int32_t UART2_NonBlockingControl(uint32_t control, uint32_t arg)
1158 {
1159 int32_t result;
1160
1161 result = UART_NonBlockingControl(control, arg, &UART2_NonBlockingDriverState);
1162 if (ARM_DRIVER_OK != result)
1163 {
1164 return result;
1165 }
1166 /* Enable the receive interrupts if ring buffer is used */
1167 if (UART2_NonBlockingDriverState.handle->rxRingBuffer != NULL)
1168 {
1169 UART_EnableInterrupts(UART2_NonBlockingDriverState.resource->base,
1170 (kUART_RxReadyEnable | kUART_AgingTimerEnable | kUART_RxOverrunEnable |
1171 kUART_ParityErrorEnable | kUART_FrameErrorEnable));
1172 }
1173
1174 return ARM_DRIVER_OK;
1175 }
1176
UART2_NonBlockingGetStatus(void)1177 static ARM_USART_STATUS UART2_NonBlockingGetStatus(void)
1178 {
1179 return UART_NonBlockingGetStatus(&UART2_NonBlockingDriverState);
1180 }
1181 #endif
1182
1183 ARM_DRIVER_USART Driver_USART2 = {
1184 UARTx_GetVersion, UARTx_GetCapabilities,
1185 #if RTE_USART2_DMA_EN
1186 UART2_SdmaInitialize, UART2_SdmaUninitialize, UART2_SdmaPowerControl, UART2_SdmaSend, UART2_SdmaReceive,
1187 UART2_SdmaTransfer, UART2_SdmaGetTxCount, UART2_SdmaGetRxCount, UART2_SdmaControl, UART2_SdmaGetStatus,
1188 #else
1189 UART2_NonBlockingInitialize,
1190 UART2_NonBlockingUninitialize,
1191 UART2_NonBlockingPowerControl,
1192 UART2_NonBlockingSend,
1193 UART2_NonBlockingReceive,
1194 UART2_NonBlockingTransfer,
1195 UART2_NonBlockingGetTxCount,
1196 UART2_NonBlockingGetRxCount,
1197 UART2_NonBlockingControl,
1198 UART2_NonBlockingGetStatus,
1199 #endif
1200 UARTx_SetModemControl, UARTx_GetModemStatus};
1201 #endif /* UART2 */
1202
1203 #if defined(UART3) && defined(RTE_USART3) && RTE_USART3
1204
1205 /* User needs to provide the implementation for UART3_GetFreq/InitPins/DeinitPins
1206 * in the application for enabling according instance.
1207 */
1208 extern uint32_t UART3_GetFreq(void);
1209
1210 static cmsis_uart_resource_t UART3_Resource = {UART3, UART3_GetFreq};
1211
1212 #if defined(RTE_USART3_DMA_EN) && RTE_USART3_DMA_EN
1213
1214 static cmsis_uart_sdma_resource_t UART3_SdmaResource = {
1215 RTE_USART3_SDMA_TX_DMA_BASE, RTE_USART3_SDMA_TX_CH, RTE_USART3_SDMA_TX_REQUEST, RTE_USART3_SDMA_TX_PRIORITY,
1216 RTE_USART3_SDMA_RX_DMA_BASE, RTE_USART3_SDMA_RX_CH, RTE_USART3_SDMA_RX_REQUEST, RTE_USART3_SDMA_RX_PRIORITY,
1217 };
1218
1219 AT_NONCACHEABLE_SECTION_ALIGN(static uart_sdma_handle_t UART3_SdmaHandle, 4);
1220 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART3_SdmaTxHandle, 4);
1221 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART3_SdmaRxHandle, 4);
1222
1223 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART3_SdmaTxContext, 4);
1224 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART3_SdmaRxContext, 4);
1225
1226 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1227 ARMCC_SECTION("uart3_sdma_driver_state")
1228 static cmsis_uart_sdma_driver_state_t UART3_SdmaDriverState = {
1229 #else
1230 static cmsis_uart_sdma_driver_state_t UART3_SdmaDriverState = {
1231 #endif
1232 &UART3_Resource, &UART3_SdmaResource, &UART3_SdmaHandle, &UART3_SdmaRxHandle, &UART3_SdmaTxHandle,
1233 };
1234
UART3_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)1235 static int32_t UART3_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)
1236 {
1237 #ifdef RTE_USART3_PIN_INIT
1238 RTE_USART3_PIN_INIT();
1239 #endif
1240 return UART_SdmaInitialize(cb_event, &UART3_SdmaDriverState);
1241 }
1242
UART3_SdmaUninitialize(void)1243 static int32_t UART3_SdmaUninitialize(void)
1244 {
1245 #ifdef RTE_USART3_PIN_DEINIT
1246 RTE_USART3_PIN_DEINIT();
1247 #endif
1248 return UART_SdmaUninitialize(&UART3_SdmaDriverState);
1249 }
1250
UART3_SdmaPowerControl(ARM_POWER_STATE state)1251 static int32_t UART3_SdmaPowerControl(ARM_POWER_STATE state)
1252 {
1253 return UART_SdmaPowerControl(state, &UART3_SdmaDriverState, &UART3_SdmaRxContext, &UART3_SdmaTxContext);
1254 }
1255
UART3_SdmaSend(const void * data,uint32_t num)1256 static int32_t UART3_SdmaSend(const void *data, uint32_t num)
1257 {
1258 return UART_SdmaSend(data, num, &UART3_SdmaDriverState);
1259 }
1260
UART3_SdmaReceive(void * data,uint32_t num)1261 static int32_t UART3_SdmaReceive(void *data, uint32_t num)
1262 {
1263 return UART_SdmaReceive(data, num, &UART3_SdmaDriverState);
1264 }
1265
UART3_SdmaTransfer(const void * data_out,void * data_in,uint32_t num)1266 static int32_t UART3_SdmaTransfer(const void *data_out, void *data_in, uint32_t num)
1267 {
1268 return UART_SdmaTransfer(data_out, data_in, num, &UART3_SdmaDriverState);
1269 }
1270
UART3_SdmaGetTxCount(void)1271 static uint32_t UART3_SdmaGetTxCount(void)
1272 {
1273 return UART_SdmaGetTxCount(&UART3_SdmaDriverState);
1274 }
1275
UART3_SdmaGetRxCount(void)1276 static uint32_t UART3_SdmaGetRxCount(void)
1277 {
1278 return UART_SdmaGetRxCount(&UART3_SdmaDriverState);
1279 }
1280
UART3_SdmaControl(uint32_t control,uint32_t arg)1281 static int32_t UART3_SdmaControl(uint32_t control, uint32_t arg)
1282 {
1283 return UART_SdmaControl(control, arg, &UART3_SdmaDriverState);
1284 }
1285
UART3_SdmaGetStatus(void)1286 static ARM_USART_STATUS UART3_SdmaGetStatus(void)
1287 {
1288 return UART_SdmaGetStatus(&UART3_SdmaDriverState);
1289 }
1290
1291 #else
1292
1293 static uart_handle_t UART3_Handle;
1294
1295 #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
1296 static uint8_t uart3_rxRingBuffer[USART_RX_BUFFER_LEN];
1297 #endif
1298
1299 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1300 ARMCC_SECTION("uart3_non_blocking_driver_state")
1301 static cmsis_uart_non_blocking_driver_state_t UART3_NonBlockingDriverState = {
1302 #else
1303 static cmsis_uart_non_blocking_driver_state_t UART3_NonBlockingDriverState = {
1304 #endif
1305 &UART3_Resource,
1306 &UART3_Handle,
1307 };
1308
UART3_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1309 static int32_t UART3_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1310 {
1311 #ifdef RTE_USART3_PIN_INIT
1312 RTE_USART3_PIN_INIT();
1313 #endif
1314 return UART_NonBlockingInitialize(cb_event, &UART3_NonBlockingDriverState);
1315 }
1316
UART3_NonBlockingUninitialize(void)1317 static int32_t UART3_NonBlockingUninitialize(void)
1318 {
1319 #ifdef RTE_USART3_PIN_DEINIT
1320 RTE_USART3_PIN_DEINIT();
1321 #endif
1322 return UART_NonBlockingUninitialize(&UART3_NonBlockingDriverState);
1323 }
1324
UART3_NonBlockingPowerControl(ARM_POWER_STATE state)1325 static int32_t UART3_NonBlockingPowerControl(ARM_POWER_STATE state)
1326 {
1327 uint32_t result;
1328
1329 result = UART_NonBlockingPowerControl(state, &UART3_NonBlockingDriverState);
1330
1331 #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
1332 if ((state == ARM_POWER_FULL) && (UART3_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1333 {
1334 UART_TransferStartRingBuffer(UART3_NonBlockingDriverState.resource->base, UART3_NonBlockingDriverState.handle,
1335 uart3_rxRingBuffer, USART_RX_BUFFER_LEN);
1336 }
1337 #endif
1338
1339 return result;
1340 }
1341
UART3_NonBlockingSend(const void * data,uint32_t num)1342 static int32_t UART3_NonBlockingSend(const void *data, uint32_t num)
1343 {
1344 return UART_NonBlockingSend(data, num, &UART3_NonBlockingDriverState);
1345 }
1346
UART3_NonBlockingReceive(void * data,uint32_t num)1347 static int32_t UART3_NonBlockingReceive(void *data, uint32_t num)
1348 {
1349 return UART_NonBlockingReceive(data, num, &UART3_NonBlockingDriverState);
1350 }
1351
UART3_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1352 static int32_t UART3_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1353 {
1354 return UART_NonBlockingTransfer(data_out, data_in, num, &UART3_NonBlockingDriverState);
1355 }
1356
UART3_NonBlockingGetTxCount(void)1357 static uint32_t UART3_NonBlockingGetTxCount(void)
1358 {
1359 return UART_NonBlockingGetTxCount(&UART3_NonBlockingDriverState);
1360 }
1361
UART3_NonBlockingGetRxCount(void)1362 static uint32_t UART3_NonBlockingGetRxCount(void)
1363 {
1364 return UART_NonBlockingGetRxCount(&UART3_NonBlockingDriverState);
1365 }
1366
UART3_NonBlockingControl(uint32_t control,uint32_t arg)1367 static int32_t UART3_NonBlockingControl(uint32_t control, uint32_t arg)
1368 {
1369 int32_t result;
1370
1371 result = UART_NonBlockingControl(control, arg, &UART3_NonBlockingDriverState);
1372 if (ARM_DRIVER_OK != result)
1373 {
1374 return result;
1375 }
1376 /* Enable the receive interrupts if ring buffer is used */
1377 if (UART3_NonBlockingDriverState.handle->rxRingBuffer != NULL)
1378 {
1379 UART_EnableInterrupts(UART3_NonBlockingDriverState.resource->base,
1380 (kUART_RxReadyEnable | kUART_AgingTimerEnable | kUART_RxOverrunEnable |
1381 kUART_ParityErrorEnable | kUART_FrameErrorEnable));
1382 }
1383
1384 return ARM_DRIVER_OK;
1385 }
1386
UART3_NonBlockingGetStatus(void)1387 static ARM_USART_STATUS UART3_NonBlockingGetStatus(void)
1388 {
1389 return UART_NonBlockingGetStatus(&UART3_NonBlockingDriverState);
1390 }
1391 #endif
1392
1393 ARM_DRIVER_USART Driver_USART3 = {
1394 UARTx_GetVersion, UARTx_GetCapabilities,
1395 #if RTE_USART3_DMA_EN
1396 UART3_SdmaInitialize, UART3_SdmaUninitialize, UART3_SdmaPowerControl, UART3_SdmaSend, UART3_SdmaReceive,
1397 UART3_SdmaTransfer, UART3_SdmaGetTxCount, UART3_SdmaGetRxCount, UART3_SdmaControl, UART3_SdmaGetStatus,
1398 #else
1399 UART3_NonBlockingInitialize,
1400 UART3_NonBlockingUninitialize,
1401 UART3_NonBlockingPowerControl,
1402 UART3_NonBlockingSend,
1403 UART3_NonBlockingReceive,
1404 UART3_NonBlockingTransfer,
1405 UART3_NonBlockingGetTxCount,
1406 UART3_NonBlockingGetRxCount,
1407 UART3_NonBlockingControl,
1408 UART3_NonBlockingGetStatus,
1409 #endif
1410 UARTx_SetModemControl, UARTx_GetModemStatus};
1411 #endif /* UART3 */
1412
1413 #if defined(UART4) && defined(RTE_USART4) && RTE_USART4
1414
1415 /* User needs to provide the implementation for UART4_GetFreq/InitPins/DeinitPins
1416 * in the application for enabling according instance.
1417 */
1418 extern uint32_t UART4_GetFreq(void);
1419
1420 static cmsis_uart_resource_t UART4_Resource = {UART4, UART4_GetFreq};
1421
1422 #if defined(RTE_USART4_DMA_EN) && RTE_USART4_DMA_EN
1423
1424 static cmsis_uart_sdma_resource_t UART4_SdmaResource = {
1425 RTE_USART4_SDMA_TX_DMA_BASE, RTE_USART4_SDMA_TX_CH, RTE_USART4_SDMA_TX_REQUEST, RTE_USART4_SDMA_TX_PRIORITY,
1426 RTE_USART4_SDMA_RX_DMA_BASE, RTE_USART4_SDMA_RX_CH, RTE_USART4_SDMA_RX_REQUEST, RTE_USART4_SDMA_RX_PRIORITY,
1427 };
1428
1429 AT_NONCACHEABLE_SECTION_ALIGN(static uart_sdma_handle_t UART4_SdmaHandle, 4);
1430 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART4_SdmaTxHandle, 4);
1431 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_handle_t UART4_SdmaRxHandle, 4);
1432
1433 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART4_SdmaTxContext, 4);
1434 AT_NONCACHEABLE_SECTION_ALIGN(static sdma_context_data_t UART4_SdmaRxContext, 4);
1435
1436 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1437 ARMCC_SECTION("uart4_sdma_driver_state")
1438 static cmsis_uart_sdma_driver_state_t UART4_SdmaDriverState = {
1439 #else
1440 static cmsis_uart_sdma_driver_state_t UART4_SdmaDriverState = {
1441 #endif
1442 &UART4_Resource, &UART4_SdmaResource, &UART4_SdmaHandle, &UART4_SdmaRxHandle, &UART4_SdmaTxHandle,
1443 };
1444
UART4_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)1445 static int32_t UART4_SdmaInitialize(ARM_USART_SignalEvent_t cb_event)
1446 {
1447 #ifdef RTE_USART4_PIN_INIT
1448 RTE_USART4_PIN_INIT();
1449 #endif
1450 return UART_SdmaInitialize(cb_event, &UART4_SdmaDriverState);
1451 }
1452
UART4_SdmaUninitialize(void)1453 static int32_t UART4_SdmaUninitialize(void)
1454 {
1455 #ifdef RTE_USART4_PIN_DEINIT
1456 RTE_USART4_PIN_DEINIT();
1457 #endif
1458 return UART_SdmaUninitialize(&UART4_SdmaDriverState);
1459 }
1460
UART4_SdmaPowerControl(ARM_POWER_STATE state)1461 static int32_t UART4_SdmaPowerControl(ARM_POWER_STATE state)
1462 {
1463 return UART_SdmaPowerControl(state, &UART4_SdmaDriverState, &UART4_SdmaRxContext, &UART4_SdmaTxContext);
1464 }
1465
UART4_SdmaSend(const void * data,uint32_t num)1466 static int32_t UART4_SdmaSend(const void *data, uint32_t num)
1467 {
1468 return UART_SdmaSend(data, num, &UART4_SdmaDriverState);
1469 }
1470
UART4_SdmaReceive(void * data,uint32_t num)1471 static int32_t UART4_SdmaReceive(void *data, uint32_t num)
1472 {
1473 return UART_SdmaReceive(data, num, &UART4_SdmaDriverState);
1474 }
1475
UART4_SdmaTransfer(const void * data_out,void * data_in,uint32_t num)1476 static int32_t UART4_SdmaTransfer(const void *data_out, void *data_in, uint32_t num)
1477 {
1478 return UART_SdmaTransfer(data_out, data_in, num, &UART4_SdmaDriverState);
1479 }
1480
UART4_SdmaGetTxCount(void)1481 static uint32_t UART4_SdmaGetTxCount(void)
1482 {
1483 return UART_SdmaGetTxCount(&UART4_SdmaDriverState);
1484 }
1485
UART4_SdmaGetRxCount(void)1486 static uint32_t UART4_SdmaGetRxCount(void)
1487 {
1488 return UART_SdmaGetRxCount(&UART4_SdmaDriverState);
1489 }
1490
UART4_SdmaControl(uint32_t control,uint32_t arg)1491 static int32_t UART4_SdmaControl(uint32_t control, uint32_t arg)
1492 {
1493 return UART_SdmaControl(control, arg, &UART4_SdmaDriverState);
1494 }
1495
UART4_SdmaGetStatus(void)1496 static ARM_USART_STATUS UART4_SdmaGetStatus(void)
1497 {
1498 return UART_SdmaGetStatus(&UART4_SdmaDriverState);
1499 }
1500
1501 #else
1502
1503 static uart_handle_t UART4_Handle;
1504
1505 #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
1506 static uint8_t uart4_rxRingBuffer[USART_RX_BUFFER_LEN];
1507 #endif
1508
1509 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1510 ARMCC_SECTION("uart4_non_blocking_driver_state")
1511 static cmsis_uart_non_blocking_driver_state_t UART4_NonBlockingDriverState = {
1512 #else
1513 static cmsis_uart_non_blocking_driver_state_t UART4_NonBlockingDriverState = {
1514 #endif
1515 &UART4_Resource,
1516 &UART4_Handle,
1517 };
1518
UART4_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1519 static int32_t UART4_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1520 {
1521 #ifdef RTE_USART4_PIN_INIT
1522 RTE_USART4_PIN_INIT();
1523 #endif
1524 return UART_NonBlockingInitialize(cb_event, &UART4_NonBlockingDriverState);
1525 }
1526
UART4_NonBlockingUninitialize(void)1527 static int32_t UART4_NonBlockingUninitialize(void)
1528 {
1529 #ifdef RTE_USART4_PIN_DEINIT
1530 RTE_USART4_PIN_DEINIT();
1531 #endif
1532 return UART_NonBlockingUninitialize(&UART4_NonBlockingDriverState);
1533 }
1534
UART4_NonBlockingPowerControl(ARM_POWER_STATE state)1535 static int32_t UART4_NonBlockingPowerControl(ARM_POWER_STATE state)
1536 {
1537 int32_t result;
1538
1539 result = UART_NonBlockingPowerControl(state, &UART4_NonBlockingDriverState);
1540
1541 #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
1542 if ((state == ARM_POWER_FULL) && (UART4_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1543 {
1544 UART_TransferStartRingBuffer(UART4_NonBlockingDriverState.resource->base, UART4_NonBlockingDriverState.handle,
1545 uart4_rxRingBuffer, USART_RX_BUFFER_LEN);
1546 }
1547 #endif
1548
1549 return result;
1550 }
1551
UART4_NonBlockingSend(const void * data,uint32_t num)1552 static int32_t UART4_NonBlockingSend(const void *data, uint32_t num)
1553 {
1554 return UART_NonBlockingSend(data, num, &UART4_NonBlockingDriverState);
1555 }
1556
UART4_NonBlockingReceive(void * data,uint32_t num)1557 static int32_t UART4_NonBlockingReceive(void *data, uint32_t num)
1558 {
1559 return UART_NonBlockingReceive(data, num, &UART4_NonBlockingDriverState);
1560 }
1561
UART4_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1562 static int32_t UART4_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1563 {
1564 return UART_NonBlockingTransfer(data_out, data_in, num, &UART4_NonBlockingDriverState);
1565 }
1566
UART4_NonBlockingGetTxCount(void)1567 static uint32_t UART4_NonBlockingGetTxCount(void)
1568 {
1569 return UART_NonBlockingGetTxCount(&UART4_NonBlockingDriverState);
1570 }
1571
UART4_NonBlockingGetRxCount(void)1572 static uint32_t UART4_NonBlockingGetRxCount(void)
1573 {
1574 return UART_NonBlockingGetRxCount(&UART4_NonBlockingDriverState);
1575 }
1576
UART4_NonBlockingControl(uint32_t control,uint32_t arg)1577 static int32_t UART4_NonBlockingControl(uint32_t control, uint32_t arg)
1578 {
1579 int32_t result;
1580
1581 result = UART_NonBlockingControl(control, arg, &UART4_NonBlockingDriverState);
1582 if (ARM_DRIVER_OK != result)
1583 {
1584 return result;
1585 }
1586 /* Enable the receive interrupts if ring buffer is used */
1587 if (UART4_NonBlockingDriverState.handle->rxRingBuffer != NULL)
1588 {
1589 UART_EnableInterrupts(
1590 UART4_NonBlockingDriverState.resource->base,
1591 ((uint32_t)kUART_RxReadyEnable | (uint32_t)kUART_AgingTimerEnable | (uint32_t)kUART_RxOverrunEnable |
1592 (uint32_t)kUART_ParityErrorEnable | (uint32_t)kUART_FrameErrorEnable));
1593 }
1594
1595 return ARM_DRIVER_OK;
1596 }
1597
UART4_NonBlockingGetStatus(void)1598 static ARM_USART_STATUS UART4_NonBlockingGetStatus(void)
1599 {
1600 return UART_NonBlockingGetStatus(&UART4_NonBlockingDriverState);
1601 }
1602 #endif
1603
1604 ARM_DRIVER_USART Driver_USART4 = {
1605 UARTx_GetVersion, UARTx_GetCapabilities,
1606 #if RTE_USART4_DMA_EN
1607 UART4_SdmaInitialize, UART4_SdmaUninitialize, UART4_SdmaPowerControl, UART4_SdmaSend, UART4_SdmaReceive,
1608 UART4_SdmaTransfer, UART4_SdmaGetTxCount, UART4_SdmaGetRxCount, UART4_SdmaControl, UART4_SdmaGetStatus,
1609 #else
1610 UART4_NonBlockingInitialize,
1611 UART4_NonBlockingUninitialize,
1612 UART4_NonBlockingPowerControl,
1613 UART4_NonBlockingSend,
1614 UART4_NonBlockingReceive,
1615 UART4_NonBlockingTransfer,
1616 UART4_NonBlockingGetTxCount,
1617 UART4_NonBlockingGetRxCount,
1618 UART4_NonBlockingControl,
1619 UART4_NonBlockingGetStatus,
1620 #endif
1621 UARTx_SetModemControl, UARTx_GetModemStatus};
1622 #endif /* UART4 */
1623
