1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "uart.h"
22 #include "mxc_device.h"
23 #include "mxc_pins.h"
24 #include "mxc_assert.h"
25 #include "uart_reva.h"
26 #include "uart_common.h"
27 #include "dma.h"
28
MXC_UART_DMACallback(int ch,int error)29 void MXC_UART_DMACallback(int ch, int error)
30 {
31 MXC_UART_RevA_DMACallback(ch, error);
32 }
33
MXC_UART_AsyncCallback(mxc_uart_regs_t * uart,int retVal)34 int MXC_UART_AsyncCallback(mxc_uart_regs_t *uart, int retVal)
35 {
36 return MXC_UART_RevA_AsyncCallback((mxc_uart_reva_regs_t *)uart, retVal);
37 }
38
MXC_UART_TxAsyncCallback(mxc_uart_regs_t * uart,int retVal)39 int MXC_UART_TxAsyncCallback(mxc_uart_regs_t *uart, int retVal)
40 {
41 return MXC_UART_RevA_TxAsyncCallback((mxc_uart_reva_regs_t *)uart, retVal);
42 }
43
MXC_UART_RxAsyncCallback(mxc_uart_regs_t * uart,int retVal)44 int MXC_UART_RxAsyncCallback(mxc_uart_regs_t *uart, int retVal)
45 {
46 return MXC_UART_RevA_RxAsyncCallback((mxc_uart_reva_regs_t *)uart, retVal);
47 }
48
MXC_UART_AsyncStop(mxc_uart_regs_t * uart)49 int MXC_UART_AsyncStop(mxc_uart_regs_t *uart)
50 {
51 return MXC_UART_RevA_AsyncStop((mxc_uart_reva_regs_t *)uart);
52 }
53
MXC_UART_TxAsyncStop(mxc_uart_regs_t * uart)54 int MXC_UART_TxAsyncStop(mxc_uart_regs_t *uart)
55 {
56 return MXC_UART_RevA_TxAsyncStop((mxc_uart_reva_regs_t *)uart);
57 }
58
MXC_UART_RxAsyncStop(mxc_uart_regs_t * uart)59 int MXC_UART_RxAsyncStop(mxc_uart_regs_t *uart)
60 {
61 return MXC_UART_RevA_RxAsyncStop((mxc_uart_reva_regs_t *)uart);
62 }
63
MXC_UART_Init(mxc_uart_regs_t * uart,unsigned int baud,sys_map_t map)64 int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, sys_map_t map)
65 {
66 #ifndef MSDK_NO_GPIO_CLK_INIT
67 int retval;
68
69 retval = MXC_UART_Shutdown(uart);
70
71 if (retval) {
72 return retval;
73 }
74
75 switch (MXC_UART_GET_IDX(uart)) {
76 case 0:
77 if (map == MAP_A) {
78 MXC_GPIO_Config(&gpio_cfg_uart0a);
79 } else {
80 MXC_GPIO_Config(&gpio_cfg_uart0b);
81 }
82 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART0);
83 break;
84
85 case 1:
86 if (map == MAP_A) {
87 MXC_GPIO_Config(&gpio_cfg_uart1a);
88 } else {
89 MXC_GPIO_Config(&gpio_cfg_uart1b);
90 }
91 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART1);
92 break;
93
94 case 2:
95 if (map == MAP_A) {
96 MXC_GPIO_Config(&gpio_cfg_uart2a);
97 } else {
98 MXC_GPIO_Config(&gpio_cfg_uart2b);
99 }
100 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART2);
101 break;
102 }
103 #else
104 (void)map;
105 #endif // MSDK_NO_GPIO_CLK_INIT
106
107 return MXC_UART_RevA_Init((mxc_uart_reva_regs_t *)uart, baud);
108 }
109
MXC_UART_Shutdown(mxc_uart_regs_t * uart)110 int MXC_UART_Shutdown(mxc_uart_regs_t *uart)
111 {
112 switch (MXC_UART_GET_IDX(uart)) {
113 case 0:
114 MXC_SYS_Reset_Periph(MXC_SYS_RESET_UART0);
115 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_UART0);
116 break;
117
118 case 1:
119 MXC_SYS_Reset_Periph(MXC_SYS_RESET_UART1);
120 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_UART1);
121 break;
122
123 case 2:
124 MXC_SYS_Reset_Periph(MXC_SYS_RESET_UART2);
125 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_UART2);
126 break;
127 }
128
129 return E_NO_ERROR;
130 }
131
MXC_UART_ReadyForSleep(mxc_uart_regs_t * uart)132 int MXC_UART_ReadyForSleep(mxc_uart_regs_t *uart)
133 {
134 return MXC_UART_RevA_ReadyForSleep((mxc_uart_reva_regs_t *)uart);
135 }
136
MXC_UART_SetFrequency(mxc_uart_regs_t * uart,unsigned int baud)137 int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud)
138 {
139 return MXC_UART_RevA_SetFrequency((mxc_uart_reva_regs_t *)uart, baud);
140 }
141
MXC_UART_GetFrequency(mxc_uart_regs_t * uart)142 int MXC_UART_GetFrequency(mxc_uart_regs_t *uart)
143 {
144 return MXC_UART_RevA_GetFrequency((mxc_uart_reva_regs_t *)uart);
145 }
146
MXC_UART_SetDataSize(mxc_uart_regs_t * uart,int dataSize)147 int MXC_UART_SetDataSize(mxc_uart_regs_t *uart, int dataSize)
148 {
149 return MXC_UART_RevA_SetDataSize((mxc_uart_reva_regs_t *)uart, dataSize);
150 }
151
MXC_UART_SetStopBits(mxc_uart_regs_t * uart,mxc_uart_stop_t stopBits)152 int MXC_UART_SetStopBits(mxc_uart_regs_t *uart, mxc_uart_stop_t stopBits)
153 {
154 return MXC_UART_RevA_SetStopBits((mxc_uart_reva_regs_t *)uart, stopBits);
155 }
156
MXC_UART_SetParity(mxc_uart_regs_t * uart,mxc_uart_parity_t parity)157 int MXC_UART_SetParity(mxc_uart_regs_t *uart, mxc_uart_parity_t parity)
158 {
159 return MXC_UART_RevA_SetParity((mxc_uart_reva_regs_t *)uart, parity);
160 }
161
MXC_UART_SetFlowCtrl(mxc_uart_regs_t * uart,mxc_uart_flow_t flowCtrl,int rtsThreshold,sys_map_t map)162 int MXC_UART_SetFlowCtrl(mxc_uart_regs_t *uart, mxc_uart_flow_t flowCtrl, int rtsThreshold,
163 sys_map_t map)
164 {
165 switch (MXC_UART_GET_IDX(uart)) {
166 case 0:
167 if (map == MAP_A) {
168 MXC_GPIO_Config(&gpio_cfg_uart0a_flow);
169 } else {
170 MXC_GPIO_Config(&gpio_cfg_uart0b_flow);
171 }
172 break;
173
174 case 1:
175 if (map == MAP_A) {
176 MXC_GPIO_Config(&gpio_cfg_uart1a_flow);
177 } else {
178 MXC_GPIO_Config(&gpio_cfg_uart1b_flow);
179 }
180 break;
181
182 case 2:
183 if (map == MAP_A) {
184 MXC_GPIO_Config(&gpio_cfg_uart2a_flow);
185 } else {
186 MXC_GPIO_Config(&gpio_cfg_uart2b_flow);
187 }
188 break;
189 }
190
191 return MXC_UART_RevA_SetFlowCtrl((mxc_uart_reva_regs_t *)uart, flowCtrl, rtsThreshold);
192 }
193
MXC_UART_SetClockSource(mxc_uart_regs_t * uart,int usePCLK)194 int MXC_UART_SetClockSource(mxc_uart_regs_t *uart, int usePCLK)
195 {
196 return MXC_UART_RevA_SetClockSource((mxc_uart_reva_regs_t *)uart, usePCLK);
197 }
198
MXC_UART_SetNullModem(mxc_uart_regs_t * uart,int nullModem)199 int MXC_UART_SetNullModem(mxc_uart_regs_t *uart, int nullModem)
200 {
201 return MXC_UART_RevA_SetNullModem((mxc_uart_reva_regs_t *)uart, nullModem);
202 }
203
MXC_UART_SendBreak(mxc_uart_regs_t * uart)204 int MXC_UART_SendBreak(mxc_uart_regs_t *uart)
205 {
206 return MXC_UART_RevA_SendBreak((mxc_uart_reva_regs_t *)uart);
207 }
208
MXC_UART_GetActive(mxc_uart_regs_t * uart)209 int MXC_UART_GetActive(mxc_uart_regs_t *uart)
210 {
211 return MXC_UART_RevA_GetActive((mxc_uart_reva_regs_t *)uart);
212 }
213
MXC_UART_AbortTransmission(mxc_uart_regs_t * uart)214 int MXC_UART_AbortTransmission(mxc_uart_regs_t *uart)
215 {
216 return MXC_UART_RevA_AbortTransmission((mxc_uart_reva_regs_t *)uart);
217 }
218
MXC_UART_ReadCharacterRaw(mxc_uart_regs_t * uart)219 int MXC_UART_ReadCharacterRaw(mxc_uart_regs_t *uart)
220 {
221 return MXC_UART_RevA_ReadCharacterRaw((mxc_uart_reva_regs_t *)uart);
222 }
223
MXC_UART_WriteCharacterRaw(mxc_uart_regs_t * uart,uint8_t character)224 int MXC_UART_WriteCharacterRaw(mxc_uart_regs_t *uart, uint8_t character)
225 {
226 return MXC_UART_RevA_WriteCharacterRaw((mxc_uart_reva_regs_t *)uart, character);
227 }
228
MXC_UART_ReadCharacter(mxc_uart_regs_t * uart)229 int MXC_UART_ReadCharacter(mxc_uart_regs_t *uart)
230 {
231 return MXC_UART_Common_ReadCharacter(uart);
232 }
233
MXC_UART_WriteCharacter(mxc_uart_regs_t * uart,uint8_t character)234 int MXC_UART_WriteCharacter(mxc_uart_regs_t *uart, uint8_t character)
235 {
236 return MXC_UART_Common_WriteCharacter(uart, character);
237 }
238
MXC_UART_Read(mxc_uart_regs_t * uart,uint8_t * buffer,int * len)239 int MXC_UART_Read(mxc_uart_regs_t *uart, uint8_t *buffer, int *len)
240 {
241 return MXC_UART_RevA_Read((mxc_uart_reva_regs_t *)uart, buffer, len);
242 }
243
MXC_UART_Write(mxc_uart_regs_t * uart,uint8_t * byte,int * len)244 int MXC_UART_Write(mxc_uart_regs_t *uart, uint8_t *byte, int *len)
245 {
246 return MXC_UART_RevA_Write((mxc_uart_reva_regs_t *)uart, byte, len);
247 }
248
MXC_UART_ReadRXFIFO(mxc_uart_regs_t * uart,unsigned char * bytes,unsigned int len)249 unsigned int MXC_UART_ReadRXFIFO(mxc_uart_regs_t *uart, unsigned char *bytes, unsigned int len)
250 {
251 return MXC_UART_RevA_ReadRXFIFO((mxc_uart_reva_regs_t *)uart, bytes, len);
252 }
253
MXC_UART_ReadRXFIFODMA(mxc_uart_regs_t * uart,mxc_dma_regs_t * dma,unsigned char * bytes,unsigned int len,mxc_uart_dma_complete_cb_t callback)254 int MXC_UART_ReadRXFIFODMA(mxc_uart_regs_t *uart, mxc_dma_regs_t *dma, unsigned char *bytes,
255 unsigned int len, mxc_uart_dma_complete_cb_t callback)
256 {
257 mxc_dma_config_t config;
258
259 if (MXC_DMA_GET_IDX(dma) == -1) {
260 return E_BAD_PARAM;
261 }
262
263 int uart_num = MXC_UART_GET_IDX(uart);
264 switch (uart_num) {
265 case 0:
266 config.reqsel = MXC_DMA_REQUEST_UART0RX;
267 break;
268
269 case 1:
270 config.reqsel = MXC_DMA_REQUEST_UART1RX;
271 break;
272
273 case 2:
274 config.reqsel = MXC_DMA_REQUEST_UART2RX;
275 break;
276
277 default:
278 return E_BAD_PARAM;
279 break;
280 }
281
282 return MXC_UART_RevA_ReadRXFIFODMA((mxc_uart_reva_regs_t *)uart, dma, bytes, len, callback,
283 config);
284 }
285
MXC_UART_GetRXFIFOAvailable(mxc_uart_regs_t * uart)286 unsigned int MXC_UART_GetRXFIFOAvailable(mxc_uart_regs_t *uart)
287 {
288 return MXC_UART_RevA_GetRXFIFOAvailable((mxc_uart_reva_regs_t *)uart);
289 }
290
MXC_UART_WriteTXFIFO(mxc_uart_regs_t * uart,unsigned char * bytes,unsigned int len)291 unsigned int MXC_UART_WriteTXFIFO(mxc_uart_regs_t *uart, unsigned char *bytes, unsigned int len)
292 {
293 return MXC_UART_RevA_WriteTXFIFO((mxc_uart_reva_regs_t *)uart, bytes, len);
294 }
295
MXC_UART_WriteTXFIFODMA(mxc_uart_regs_t * uart,mxc_dma_regs_t * dma,unsigned char * bytes,unsigned int len,mxc_uart_dma_complete_cb_t callback)296 int MXC_UART_WriteTXFIFODMA(mxc_uart_regs_t *uart, mxc_dma_regs_t *dma, unsigned char *bytes,
297 unsigned int len, mxc_uart_dma_complete_cb_t callback)
298 {
299 mxc_dma_config_t config;
300
301 if (MXC_DMA_GET_IDX(dma) == -1) {
302 return E_BAD_PARAM;
303 }
304
305 int uart_num = MXC_UART_GET_IDX(uart);
306 switch (uart_num) {
307 case 0:
308 config.reqsel = MXC_DMA_REQUEST_UART0TX;
309 break;
310
311 case 1:
312 config.reqsel = MXC_DMA_REQUEST_UART1TX;
313 break;
314
315 case 2:
316 config.reqsel = MXC_DMA_REQUEST_UART2TX;
317 break;
318
319 default:
320 return E_BAD_PARAM;
321 break;
322 }
323
324 return MXC_UART_RevA_WriteTXFIFODMA((mxc_uart_reva_regs_t *)uart, dma, bytes, len, callback,
325 config);
326 }
327
MXC_UART_GetTXFIFOAvailable(mxc_uart_regs_t * uart)328 unsigned int MXC_UART_GetTXFIFOAvailable(mxc_uart_regs_t *uart)
329 {
330 return MXC_UART_RevA_GetTXFIFOAvailable((mxc_uart_reva_regs_t *)uart);
331 }
332
MXC_UART_ClearRXFIFO(mxc_uart_regs_t * uart)333 void MXC_UART_ClearRXFIFO(mxc_uart_regs_t *uart)
334 {
335 MXC_UART_RevA_ClearRXFIFO((mxc_uart_reva_regs_t *)uart);
336 }
337
MXC_UART_ClearTXFIFO(mxc_uart_regs_t * uart)338 void MXC_UART_ClearTXFIFO(mxc_uart_regs_t *uart)
339 {
340 MXC_UART_RevA_ClearTXFIFO((mxc_uart_reva_regs_t *)uart);
341 }
342
MXC_UART_SetRXThreshold(mxc_uart_regs_t * uart,unsigned int numBytes)343 int MXC_UART_SetRXThreshold(mxc_uart_regs_t *uart, unsigned int numBytes)
344 {
345 return MXC_UART_RevA_SetRXThreshold((mxc_uart_reva_regs_t *)uart, numBytes);
346 }
347
MXC_UART_GetRXThreshold(mxc_uart_regs_t * uart)348 unsigned int MXC_UART_GetRXThreshold(mxc_uart_regs_t *uart)
349 {
350 return MXC_UART_RevA_GetRXThreshold((mxc_uart_reva_regs_t *)uart);
351 }
352
MXC_UART_SetTXThreshold(mxc_uart_regs_t * uart,unsigned int numBytes)353 int MXC_UART_SetTXThreshold(mxc_uart_regs_t *uart, unsigned int numBytes)
354 {
355 return MXC_UART_RevA_SetTXThreshold((mxc_uart_reva_regs_t *)uart, numBytes);
356 }
357
MXC_UART_GetTXThreshold(mxc_uart_regs_t * uart)358 unsigned int MXC_UART_GetTXThreshold(mxc_uart_regs_t *uart)
359 {
360 return MXC_UART_RevA_GetTXThreshold((mxc_uart_reva_regs_t *)uart);
361 }
362
MXC_UART_GetFlags(mxc_uart_regs_t * uart)363 unsigned int MXC_UART_GetFlags(mxc_uart_regs_t *uart)
364 {
365 return MXC_UART_RevA_GetFlags((mxc_uart_reva_regs_t *)uart);
366 }
367
MXC_UART_ClearFlags(mxc_uart_regs_t * uart,unsigned int flags)368 void MXC_UART_ClearFlags(mxc_uart_regs_t *uart, unsigned int flags)
369 {
370 MXC_UART_RevA_ClearFlags((mxc_uart_reva_regs_t *)uart, flags);
371 }
372
MXC_UART_EnableInt(mxc_uart_regs_t * uart,unsigned int intEn)373 void MXC_UART_EnableInt(mxc_uart_regs_t *uart, unsigned int intEn)
374 {
375 MXC_UART_RevA_EnableInt((mxc_uart_reva_regs_t *)uart, intEn);
376 }
377
MXC_UART_DisableInt(mxc_uart_regs_t * uart,unsigned int intDis)378 void MXC_UART_DisableInt(mxc_uart_regs_t *uart, unsigned int intDis)
379 {
380 MXC_UART_RevA_DisableInt((mxc_uart_reva_regs_t *)uart, intDis);
381 }
382
MXC_UART_GetStatus(mxc_uart_regs_t * uart)383 unsigned int MXC_UART_GetStatus(mxc_uart_regs_t *uart)
384 {
385 return MXC_UART_RevA_GetStatus((mxc_uart_reva_regs_t *)uart);
386 }
387
MXC_UART_Transaction(mxc_uart_req_t * req)388 int MXC_UART_Transaction(mxc_uart_req_t *req)
389 {
390 return MXC_UART_RevA_Transaction((mxc_uart_reva_req_t *)req);
391 }
392
MXC_UART_TransactionAsync(mxc_uart_req_t * req)393 int MXC_UART_TransactionAsync(mxc_uart_req_t *req)
394 {
395 return MXC_UART_RevA_TransactionAsync((mxc_uart_reva_req_t *)req);
396 }
397
MXC_UART_TransactionDMA(mxc_uart_req_t * req,mxc_dma_regs_t * dma)398 int MXC_UART_TransactionDMA(mxc_uart_req_t *req, mxc_dma_regs_t *dma)
399 {
400 if (MXC_DMA_GET_IDX(dma) == -1) {
401 return E_BAD_PARAM;
402 }
403
404 return MXC_UART_RevA_TransactionDMA((mxc_uart_reva_req_t *)req, dma);
405 }
406
MXC_UART_AbortAsync(mxc_uart_regs_t * uart)407 int MXC_UART_AbortAsync(mxc_uart_regs_t *uart)
408 {
409 return MXC_UART_RevA_AbortAsync((mxc_uart_reva_regs_t *)uart);
410 }
411
MXC_UART_TxAbortAsync(mxc_uart_regs_t * uart)412 int MXC_UART_TxAbortAsync(mxc_uart_regs_t *uart)
413 {
414 return MXC_UART_RevA_TxAbortAsync((mxc_uart_reva_regs_t *)uart);
415 }
416
MXC_UART_RxAbortAsync(mxc_uart_regs_t * uart)417 int MXC_UART_RxAbortAsync(mxc_uart_regs_t *uart)
418 {
419 return MXC_UART_RevA_RxAbortAsync((mxc_uart_reva_regs_t *)uart);
420 }
421
MXC_UART_AsyncHandler(mxc_uart_regs_t * uart)422 void MXC_UART_AsyncHandler(mxc_uart_regs_t *uart)
423 {
424 MXC_UART_RevA_AsyncHandler((mxc_uart_reva_regs_t *)uart);
425 }
426
MXC_UART_GetAsyncTXCount(mxc_uart_req_t * req)427 uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req)
428 {
429 return req->txCnt;
430 }
431
MXC_UART_GetAsyncRXCount(mxc_uart_req_t * req)432 uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req)
433 {
434 return req->rxCnt;
435 }
436
MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t * uart,bool enable)437 int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable)
438 {
439 return MXC_UART_RevA_SetAutoDMAHandlers((mxc_uart_reva_regs_t *)uart, enable);
440 }
MXC_UART_SetTXDMAChannel(mxc_uart_regs_t * uart,unsigned int channel)441 int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel)
442 {
443 return MXC_UART_RevA_SetTXDMAChannel((mxc_uart_reva_regs_t *)uart, channel);
444 }
MXC_UART_GetTXDMAChannel(mxc_uart_regs_t * uart)445 int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart)
446 {
447 return MXC_UART_RevA_GetTXDMAChannel((mxc_uart_reva_regs_t *)uart);
448 }
MXC_UART_SetRXDMAChannel(mxc_uart_regs_t * uart,unsigned int channel)449 int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel)
450 {
451 return MXC_UART_RevA_SetRXDMAChannel((mxc_uart_reva_regs_t *)uart, channel);
452 }
MXC_UART_GetRXDMAChannel(mxc_uart_regs_t * uart)453 int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart)
454 {
455 return MXC_UART_RevA_GetRXDMAChannel((mxc_uart_reva_regs_t *)uart);
456 }
457