1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 #include "uart.h"
22 #include "mxc_device.h"
23 #include "mxc_pins.h"
24 #include "mxc_assert.h"
25 #include "uart_revb.h"
26 #include "uart_common.h"
27 #include "dma.h"
28 
MXC_UART_DMACallback(int ch,int error)29 void MXC_UART_DMACallback(int ch, int error)
30 {
31     MXC_UART_RevB_DMACallback(ch, error);
32 }
33 
MXC_UART_AsyncCallback(mxc_uart_regs_t * uart,int retVal)34 int MXC_UART_AsyncCallback(mxc_uart_regs_t *uart, int retVal)
35 {
36     return MXC_UART_RevB_AsyncCallback((mxc_uart_revb_regs_t *)uart, retVal);
37 }
38 
MXC_UART_AsyncStop(mxc_uart_regs_t * uart)39 int MXC_UART_AsyncStop(mxc_uart_regs_t *uart)
40 {
41     return MXC_UART_RevB_AsyncStop((mxc_uart_revb_regs_t *)uart);
42 }
43 
MXC_UART_Init(mxc_uart_regs_t * uart,unsigned int baud,mxc_uart_clock_t clock,sys_map_t map)44 int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock, sys_map_t map)
45 {
46 #ifndef MSDK_NO_GPIO_CLK_INIT
47     int retval;
48 
49     retval = MXC_UART_Shutdown(uart);
50 
51     if (retval) {
52         return retval;
53     }
54 
55     switch (clock) {
56     case MXC_UART_EXT_CLK:
57         MXC_GPIO_Config(&gpio_cfg_hf_extclk);
58         break;
59 
60     case MXC_UART_IBRO_CLK:
61         MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO);
62         break;
63 
64     case MXC_UART_ERFO_CLK:
65         MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO);
66         break;
67 
68     default:
69         break;
70     }
71 
72     if (uart == MXC_UART0) {
73         if (map == MAP_B) {
74             MXC_GPIO_Config(&gpio_cfg_uart0b);
75         } else {
76             MXC_GPIO_Config(&gpio_cfg_uart0);
77         }
78         MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART0);
79     } else if (uart == MXC_UART1) {
80         MXC_GPIO_Config(&gpio_cfg_uart1);
81         MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART1);
82     } else {
83         return E_BAD_PARAM;
84     }
85 #else
86     (void)map;
87 #endif // MSDK_NO_GPIO_CLK_INIT
88 
89     return MXC_UART_RevB_Init((mxc_uart_revb_regs_t *)uart, baud, clock);
90 }
91 
MXC_UART_Shutdown(mxc_uart_regs_t * uart)92 int MXC_UART_Shutdown(mxc_uart_regs_t *uart)
93 {
94     switch (MXC_UART_GET_IDX(uart)) {
95     case 0:
96         MXC_SYS_Reset_Periph(MXC_SYS_RESET0_UART0);
97         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_UART0);
98         break;
99 
100     case 1:
101         MXC_SYS_Reset_Periph(MXC_SYS_RESET0_UART1);
102         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_UART1);
103         break;
104 
105     default:
106         return E_BAD_PARAM;
107     }
108 
109     return E_NO_ERROR;
110 }
111 
MXC_UART_ReadyForSleep(mxc_uart_regs_t * uart)112 int MXC_UART_ReadyForSleep(mxc_uart_regs_t *uart)
113 {
114     return MXC_UART_RevB_ReadyForSleep((mxc_uart_revb_regs_t *)uart);
115 }
116 
MXC_UART_SetFrequency(mxc_uart_regs_t * uart,unsigned int baud,mxc_uart_clock_t clock)117 int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock)
118 {
119     int freq;
120 
121     if (MXC_UART_GET_IDX(uart) < 0) {
122         return E_BAD_PARAM;
123     }
124 
125     freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, baud, clock);
126 
127     if (freq > 0) {
128         // Enable baud clock and wait for it to become ready.
129         uart->ctrl |= MXC_F_UART_CTRL_BCLKEN;
130         while (((uart->ctrl & MXC_F_UART_CTRL_BCLKRDY) >> MXC_F_UART_CTRL_BCLKRDY_POS) == 0) {}
131     }
132 
133     return freq;
134 }
135 
MXC_UART_GetFrequency(mxc_uart_regs_t * uart)136 int MXC_UART_GetFrequency(mxc_uart_regs_t *uart)
137 {
138     if (MXC_UART_GET_IDX(uart) < 0) {
139         return E_BAD_PARAM;
140     }
141 
142     return MXC_UART_RevB_GetFrequency((mxc_uart_revb_regs_t *)uart);
143 }
144 
MXC_UART_SetDataSize(mxc_uart_regs_t * uart,int dataSize)145 int MXC_UART_SetDataSize(mxc_uart_regs_t *uart, int dataSize)
146 {
147     return MXC_UART_RevB_SetDataSize((mxc_uart_revb_regs_t *)uart, dataSize);
148 }
149 
MXC_UART_SetStopBits(mxc_uart_regs_t * uart,mxc_uart_stop_t stopBits)150 int MXC_UART_SetStopBits(mxc_uart_regs_t *uart, mxc_uart_stop_t stopBits)
151 {
152     return MXC_UART_RevB_SetStopBits((mxc_uart_revb_regs_t *)uart, stopBits);
153 }
154 
MXC_UART_SetParity(mxc_uart_regs_t * uart,mxc_uart_parity_t parity)155 int MXC_UART_SetParity(mxc_uart_regs_t *uart, mxc_uart_parity_t parity)
156 {
157     return MXC_UART_RevB_SetParity((mxc_uart_revb_regs_t *)uart, parity);
158 }
159 
MXC_UART_SetFlowCtrl(mxc_uart_regs_t * uart,mxc_uart_flow_t flowCtrl,int rtsThreshold)160 int MXC_UART_SetFlowCtrl(mxc_uart_regs_t *uart, mxc_uart_flow_t flowCtrl, int rtsThreshold)
161 {
162     if (flowCtrl == MXC_UART_FLOW_EN) {
163         switch (MXC_UART_GET_IDX(uart)) {
164         case 0:
165             MXC_GPIO_Config(&gpio_cfg_uart0_flow);
166             break;
167 
168         case 1:
169             MXC_GPIO_Config(&gpio_cfg_uart1_flow);
170             break;
171 
172         default:
173             return E_BAD_PARAM;
174         }
175     } else {
176         switch (MXC_UART_GET_IDX(uart)) {
177         case 0:
178             MXC_GPIO_Config(&gpio_cfg_uart0_flow_disable);
179             break;
180 
181         case 1:
182             MXC_GPIO_Config(&gpio_cfg_uart1_flow_disable);
183             break;
184 
185         default:
186             return E_BAD_PARAM;
187         }
188     }
189 
190     return MXC_UART_RevB_SetFlowCtrl((mxc_uart_revb_regs_t *)uart, flowCtrl, rtsThreshold);
191 }
192 
MXC_UART_SetClockSource(mxc_uart_regs_t * uart,mxc_uart_clock_t clock)193 int MXC_UART_SetClockSource(mxc_uart_regs_t *uart, mxc_uart_clock_t clock)
194 {
195     return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock);
196 }
197 
MXC_UART_GetActive(mxc_uart_regs_t * uart)198 int MXC_UART_GetActive(mxc_uart_regs_t *uart)
199 {
200     return MXC_UART_RevB_GetActive((mxc_uart_revb_regs_t *)uart);
201 }
202 
MXC_UART_AbortTransmission(mxc_uart_regs_t * uart)203 int MXC_UART_AbortTransmission(mxc_uart_regs_t *uart)
204 {
205     return MXC_UART_RevB_AbortTransmission((mxc_uart_revb_regs_t *)uart);
206 }
207 
MXC_UART_ReadCharacterRaw(mxc_uart_regs_t * uart)208 int MXC_UART_ReadCharacterRaw(mxc_uart_regs_t *uart)
209 {
210     return MXC_UART_RevB_ReadCharacterRaw((mxc_uart_revb_regs_t *)uart);
211 }
212 
MXC_UART_WriteCharacterRaw(mxc_uart_regs_t * uart,uint8_t character)213 int MXC_UART_WriteCharacterRaw(mxc_uart_regs_t *uart, uint8_t character)
214 {
215     return MXC_UART_RevB_WriteCharacterRaw((mxc_uart_revb_regs_t *)uart, character);
216 }
217 
MXC_UART_ReadCharacter(mxc_uart_regs_t * uart)218 int MXC_UART_ReadCharacter(mxc_uart_regs_t *uart)
219 {
220     return MXC_UART_Common_ReadCharacter(uart);
221 }
222 
MXC_UART_WriteCharacter(mxc_uart_regs_t * uart,uint8_t character)223 int MXC_UART_WriteCharacter(mxc_uart_regs_t *uart, uint8_t character)
224 {
225     return MXC_UART_Common_WriteCharacter(uart, character);
226 }
227 
MXC_UART_Read(mxc_uart_regs_t * uart,uint8_t * buffer,int * len)228 int MXC_UART_Read(mxc_uart_regs_t *uart, uint8_t *buffer, int *len)
229 {
230     return MXC_UART_RevB_Read((mxc_uart_revb_regs_t *)uart, buffer, len);
231 }
232 
MXC_UART_Write(mxc_uart_regs_t * uart,const uint8_t * byte,int * len)233 int MXC_UART_Write(mxc_uart_regs_t *uart, const uint8_t *byte, int *len)
234 {
235     return MXC_UART_RevB_Write((mxc_uart_revb_regs_t *)uart, byte, len);
236 }
237 
MXC_UART_ReadRXFIFO(mxc_uart_regs_t * uart,unsigned char * bytes,unsigned int len)238 unsigned int MXC_UART_ReadRXFIFO(mxc_uart_regs_t *uart, unsigned char *bytes, unsigned int len)
239 {
240     return MXC_UART_RevB_ReadRXFIFO((mxc_uart_revb_regs_t *)uart, bytes, len);
241 }
242 
MXC_UART_ReadRXFIFODMA(mxc_uart_regs_t * uart,unsigned char * bytes,unsigned int len,mxc_uart_dma_complete_cb_t callback)243 int MXC_UART_ReadRXFIFODMA(mxc_uart_regs_t *uart, unsigned char *bytes, unsigned int len,
244                            mxc_uart_dma_complete_cb_t callback)
245 {
246     mxc_dma_config_t config;
247 
248     int uart_num = MXC_UART_GET_IDX(uart);
249 
250     switch (uart_num) {
251     case 0:
252         config.reqsel = MXC_DMA_REQUEST_UART0RX;
253         break;
254     case 1:
255         config.reqsel = MXC_DMA_REQUEST_UART1RX;
256         break;
257     default:
258         return E_BAD_PARAM;
259         break;
260     }
261 
262     return MXC_UART_RevB_ReadRXFIFODMA((mxc_uart_revb_regs_t *)uart, bytes, len, callback, config);
263 }
264 
MXC_UART_GetRXFIFOAvailable(mxc_uart_regs_t * uart)265 unsigned int MXC_UART_GetRXFIFOAvailable(mxc_uart_regs_t *uart)
266 {
267     return MXC_UART_RevB_GetRXFIFOAvailable((mxc_uart_revb_regs_t *)uart);
268 }
269 
MXC_UART_WriteTXFIFO(mxc_uart_regs_t * uart,const unsigned char * bytes,unsigned int len)270 unsigned int MXC_UART_WriteTXFIFO(mxc_uart_regs_t *uart, const unsigned char *bytes,
271                                   unsigned int len)
272 {
273     return MXC_UART_RevB_WriteTXFIFO((mxc_uart_revb_regs_t *)uart, bytes, len);
274 }
275 
MXC_UART_WriteTXFIFODMA(mxc_uart_regs_t * uart,const unsigned char * bytes,unsigned int len,mxc_uart_dma_complete_cb_t callback)276 int MXC_UART_WriteTXFIFODMA(mxc_uart_regs_t *uart, const unsigned char *bytes, unsigned int len,
277                             mxc_uart_dma_complete_cb_t callback)
278 {
279     mxc_dma_config_t config;
280 
281     int uart_num = MXC_UART_GET_IDX(uart);
282     switch (uart_num) {
283     case 0:
284         config.reqsel = MXC_DMA_REQUEST_UART0TX;
285         break;
286     case 1:
287         config.reqsel = MXC_DMA_REQUEST_UART1TX;
288         break;
289     default:
290         return E_BAD_PARAM;
291         break;
292     }
293 
294     return MXC_UART_RevB_WriteTXFIFODMA((mxc_uart_revb_regs_t *)uart, bytes, len, callback, config);
295 }
296 
MXC_UART_GetTXFIFOAvailable(mxc_uart_regs_t * uart)297 unsigned int MXC_UART_GetTXFIFOAvailable(mxc_uart_regs_t *uart)
298 {
299     return MXC_UART_RevB_GetTXFIFOAvailable((mxc_uart_revb_regs_t *)uart);
300 }
301 
MXC_UART_ClearRXFIFO(mxc_uart_regs_t * uart)302 int MXC_UART_ClearRXFIFO(mxc_uart_regs_t *uart)
303 {
304     return MXC_UART_RevB_ClearRXFIFO((mxc_uart_revb_regs_t *)uart);
305 }
306 
MXC_UART_ClearTXFIFO(mxc_uart_regs_t * uart)307 int MXC_UART_ClearTXFIFO(mxc_uart_regs_t *uart)
308 {
309     return MXC_UART_RevB_ClearTXFIFO((mxc_uart_revb_regs_t *)uart);
310 }
311 
MXC_UART_SetRXThreshold(mxc_uart_regs_t * uart,unsigned int numBytes)312 int MXC_UART_SetRXThreshold(mxc_uart_regs_t *uart, unsigned int numBytes)
313 {
314     return MXC_UART_RevB_SetRXThreshold((mxc_uart_revb_regs_t *)uart, numBytes);
315 }
316 
MXC_UART_GetRXThreshold(mxc_uart_regs_t * uart)317 unsigned int MXC_UART_GetRXThreshold(mxc_uart_regs_t *uart)
318 {
319     return MXC_UART_RevB_GetRXThreshold((mxc_uart_revb_regs_t *)uart);
320 }
321 
MXC_UART_SetTXThreshold(mxc_uart_regs_t * uart,unsigned int numBytes)322 int MXC_UART_SetTXThreshold(mxc_uart_regs_t *uart, unsigned int numBytes)
323 {
324     return E_NOT_SUPPORTED;
325 }
326 
MXC_UART_GetTXThreshold(mxc_uart_regs_t * uart)327 unsigned int MXC_UART_GetTXThreshold(mxc_uart_regs_t *uart)
328 {
329     return E_NOT_SUPPORTED;
330 }
331 
MXC_UART_GetFlags(mxc_uart_regs_t * uart)332 unsigned int MXC_UART_GetFlags(mxc_uart_regs_t *uart)
333 {
334     return MXC_UART_RevB_GetFlags((mxc_uart_revb_regs_t *)uart);
335 }
336 
MXC_UART_ClearFlags(mxc_uart_regs_t * uart,unsigned int flags)337 int MXC_UART_ClearFlags(mxc_uart_regs_t *uart, unsigned int flags)
338 {
339     return MXC_UART_RevB_ClearFlags((mxc_uart_revb_regs_t *)uart, flags);
340 }
341 
MXC_UART_EnableInt(mxc_uart_regs_t * uart,unsigned int intEn)342 int MXC_UART_EnableInt(mxc_uart_regs_t *uart, unsigned int intEn)
343 {
344     return MXC_UART_RevB_EnableInt((mxc_uart_revb_regs_t *)uart, intEn);
345 }
346 
MXC_UART_DisableInt(mxc_uart_regs_t * uart,unsigned int intDis)347 int MXC_UART_DisableInt(mxc_uart_regs_t *uart, unsigned int intDis)
348 {
349     return MXC_UART_RevB_DisableInt((mxc_uart_revb_regs_t *)uart, intDis);
350 }
351 
MXC_UART_GetStatus(mxc_uart_regs_t * uart)352 unsigned int MXC_UART_GetStatus(mxc_uart_regs_t *uart)
353 {
354     return MXC_UART_RevB_GetStatus((mxc_uart_revb_regs_t *)uart);
355 }
356 
MXC_UART_Transaction(mxc_uart_req_t * req)357 int MXC_UART_Transaction(mxc_uart_req_t *req)
358 {
359     return MXC_UART_RevB_Transaction((mxc_uart_revb_req_t *)req);
360 }
361 
MXC_UART_TransactionAsync(mxc_uart_req_t * req)362 int MXC_UART_TransactionAsync(mxc_uart_req_t *req)
363 {
364     return MXC_UART_RevB_TransactionAsync((mxc_uart_revb_req_t *)req);
365 }
366 
MXC_UART_TransactionDMA(mxc_uart_req_t * req)367 int MXC_UART_TransactionDMA(mxc_uart_req_t *req)
368 {
369     return MXC_UART_RevB_TransactionDMA((mxc_uart_revb_req_t *)req);
370 }
371 
MXC_UART_AbortAsync(mxc_uart_regs_t * uart)372 int MXC_UART_AbortAsync(mxc_uart_regs_t *uart)
373 {
374     return MXC_UART_RevB_AbortAsync((mxc_uart_revb_regs_t *)uart);
375 }
376 
MXC_UART_AsyncHandler(mxc_uart_regs_t * uart)377 int MXC_UART_AsyncHandler(mxc_uart_regs_t *uart)
378 {
379     return MXC_UART_RevB_AsyncHandler((mxc_uart_revb_regs_t *)uart);
380 }
381 
MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t * uart,bool enable)382 int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable)
383 {
384     return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable);
385 }
386 
MXC_UART_SetTXDMAChannel(mxc_uart_regs_t * uart,unsigned int channel)387 int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel)
388 {
389     return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel);
390 }
391 
MXC_UART_GetTXDMAChannel(mxc_uart_regs_t * uart)392 int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart)
393 {
394     return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart);
395 }
396 
MXC_UART_SetRXDMAChannel(mxc_uart_regs_t * uart,unsigned int channel)397 int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel)
398 {
399     return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel);
400 }
401 
MXC_UART_GetRXDMAChannel(mxc_uart_regs_t * uart)402 int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart)
403 {
404     return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart);
405 }
406