1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "tmr.h"
22 #include "tmr_reva.h"
23 #include "tmr_common.h"
24
MXC_TMR_Init(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg)25 int MXC_TMR_Init(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
26 {
27 #ifndef MSDK_NO_GPIO_CLK_INIT
28 int tmr_id = MXC_TMR_GET_IDX(tmr);
29
30 MXC_ASSERT(tmr_id >= 0);
31
32 //enable peripheral clock and configure gpio pins
33 switch (tmr_id) {
34 case 0:
35 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TIMER0);
36 while (MXC_GCR->rst0 & MXC_F_GCR_RST0_TIMER0) {}
37 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR0);
38 MXC_GPIO_Config(&gpio_cfg_tmr0);
39 break;
40 case 1:
41 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TIMER1);
42 while (MXC_GCR->rst0 & MXC_F_GCR_RST0_TIMER1) {}
43 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR1);
44 break;
45 case 2:
46 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TIMER2);
47 while (MXC_GCR->rst0 & MXC_F_GCR_RST0_TIMER2) {}
48 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR2);
49 break;
50 }
51 #endif
52
53 MXC_TMR_RevA_Init((mxc_tmr_reva_regs_t *)tmr, cfg);
54 return E_NO_ERROR;
55 }
56
MXC_TMR_Shutdown(mxc_tmr_regs_t * tmr)57 void MXC_TMR_Shutdown(mxc_tmr_regs_t *tmr)
58 {
59 int tmr_id = MXC_TMR_GET_IDX(tmr);
60 MXC_ASSERT(tmr_id >= 0);
61
62 MXC_TMR_RevA_Shutdown((mxc_tmr_reva_regs_t *)tmr);
63
64 // System settigns
65 //diasble peripheral clock
66 switch (tmr_id) {
67 case 0:
68 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR0);
69 break;
70
71 case 1:
72 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR1);
73 break;
74
75 case 2:
76 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR2);
77 break;
78 }
79 }
80
MXC_TMR_Start(mxc_tmr_regs_t * tmr)81 void MXC_TMR_Start(mxc_tmr_regs_t *tmr)
82 {
83 MXC_TMR_RevA_Start((mxc_tmr_reva_regs_t *)tmr);
84 }
85
MXC_TMR_Stop(mxc_tmr_regs_t * tmr)86 void MXC_TMR_Stop(mxc_tmr_regs_t *tmr)
87 {
88 MXC_TMR_RevA_Stop((mxc_tmr_reva_regs_t *)tmr);
89 }
90
MXC_TMR_SetPWM(mxc_tmr_regs_t * tmr,uint32_t pwm)91 int MXC_TMR_SetPWM(mxc_tmr_regs_t *tmr, uint32_t pwm)
92 {
93 return MXC_TMR_RevA_SetPWM((mxc_tmr_reva_regs_t *)tmr, pwm);
94 }
95
MXC_TMR_GetCompare(mxc_tmr_regs_t * tmr)96 uint32_t MXC_TMR_GetCompare(mxc_tmr_regs_t *tmr)
97 {
98 return MXC_TMR_RevA_GetCompare((mxc_tmr_reva_regs_t *)tmr);
99 }
100
MXC_TMR_GetCapture(mxc_tmr_regs_t * tmr)101 uint32_t MXC_TMR_GetCapture(mxc_tmr_regs_t *tmr)
102 {
103 return MXC_TMR_RevA_GetCapture((mxc_tmr_reva_regs_t *)tmr);
104 }
105
MXC_TMR_GetPeriod(mxc_tmr_regs_t * tmr,uint32_t prescalar,uint32_t frequency)106 uint32_t MXC_TMR_GetPeriod(mxc_tmr_regs_t *tmr, uint32_t prescalar, uint32_t frequency)
107 {
108 uint32_t retVal;
109
110 if (frequency == 0) {
111 return 0;
112 } else {
113 retVal = PeripheralClock / (prescalar * frequency);
114 return retVal;
115 }
116 return retVal;
117 }
118
MXC_TMR_GetCount(mxc_tmr_regs_t * tmr)119 uint32_t MXC_TMR_GetCount(mxc_tmr_regs_t *tmr)
120 {
121 return MXC_TMR_RevA_GetCount((mxc_tmr_reva_regs_t *)tmr);
122 }
123
MXC_TMR_ClearFlags(mxc_tmr_regs_t * tmr)124 void MXC_TMR_ClearFlags(mxc_tmr_regs_t *tmr)
125 {
126 MXC_TMR_RevA_ClearFlags((mxc_tmr_reva_regs_t *)tmr);
127 }
128
MXC_TMR_GetFlags(mxc_tmr_regs_t * tmr)129 uint32_t MXC_TMR_GetFlags(mxc_tmr_regs_t *tmr)
130 {
131 return MXC_TMR_RevA_GetFlags((mxc_tmr_reva_regs_t *)tmr);
132 }
133
MXC_TMR_SetCompare(mxc_tmr_regs_t * tmr,uint32_t cmp_cnt)134 void MXC_TMR_SetCompare(mxc_tmr_regs_t *tmr, uint32_t cmp_cnt)
135 {
136 MXC_TMR_RevA_SetCompare((mxc_tmr_reva_regs_t *)tmr, cmp_cnt);
137 }
138
MXC_TMR_SetCount(mxc_tmr_regs_t * tmr,uint32_t cnt)139 void MXC_TMR_SetCount(mxc_tmr_regs_t *tmr, uint32_t cnt)
140 {
141 MXC_TMR_RevA_SetCount((mxc_tmr_reva_regs_t *)tmr, cnt);
142 }
143
MXC_TMR_Delay(mxc_tmr_regs_t * tmr,uint32_t us)144 void MXC_TMR_Delay(mxc_tmr_regs_t *tmr, uint32_t us)
145 {
146 MXC_TMR_Common_Delay(tmr, us);
147 }
148
MXC_TMR_TO_Start(mxc_tmr_regs_t * tmr,uint32_t us)149 void MXC_TMR_TO_Start(mxc_tmr_regs_t *tmr, uint32_t us)
150 {
151 MXC_TMR_RevA_TO_Start((mxc_tmr_reva_regs_t *)tmr, us);
152 }
153
MXC_TMR_TO_Check(mxc_tmr_regs_t * tmr)154 int MXC_TMR_TO_Check(mxc_tmr_regs_t *tmr)
155 {
156 return MXC_TMR_Common_TO_Check(tmr);
157 }
158
MXC_TMR_TO_Stop(mxc_tmr_regs_t * tmr)159 void MXC_TMR_TO_Stop(mxc_tmr_regs_t *tmr)
160 {
161 MXC_TMR_Common_TO_Stop(tmr);
162 }
163
MXC_TMR_TO_Clear(mxc_tmr_regs_t * tmr)164 void MXC_TMR_TO_Clear(mxc_tmr_regs_t *tmr)
165 {
166 MXC_TMR_Common_TO_Clear(tmr);
167 }
168
MXC_TMR_TO_Elapsed(mxc_tmr_regs_t * tmr)169 unsigned int MXC_TMR_TO_Elapsed(mxc_tmr_regs_t *tmr)
170 {
171 return MXC_TMR_Common_TO_Elapsed(tmr);
172 }
173
MXC_TMR_TO_Remaining(mxc_tmr_regs_t * tmr)174 unsigned int MXC_TMR_TO_Remaining(mxc_tmr_regs_t *tmr)
175 {
176 return MXC_TMR_Common_TO_Remaining(tmr);
177 }
178
MXC_TMR_SW_Start(mxc_tmr_regs_t * tmr)179 void MXC_TMR_SW_Start(mxc_tmr_regs_t *tmr)
180 {
181 return MXC_TMR_Common_SW_Start(tmr);
182 }
183
MXC_TMR_SW_Stop(mxc_tmr_regs_t * tmr)184 unsigned int MXC_TMR_SW_Stop(mxc_tmr_regs_t *tmr)
185 {
186 return MXC_TMR_Common_SW_Stop(tmr);
187 }
188
MXC_TMR_GetTime(mxc_tmr_regs_t * tmr,uint32_t ticks,uint32_t * time,mxc_tmr_unit_t * units)189 int MXC_TMR_GetTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, mxc_tmr_unit_t *units)
190 {
191 return MXC_TMR_RevA_GetTime((mxc_tmr_reva_regs_t *)tmr, ticks, time, units);
192 }
193