1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include <string.h>
22 #include <stdio.h>
23 #include <stdlib.h>
24 #include "max32672.h"
25 #include "gcr_regs.h"
26 #include "mxc_sys.h"
27 #include "pwrseq_regs.h"
28
29 extern void (*const __isr_vector[])(void);
30
31 uint32_t SystemCoreClock = HIRC_FREQ;
32
33 /*
34 The libc implementation from GCC 11+ depends on _getpid and _kill in some places.
35 There is no concept of processes/PIDs in the baremetal PeriphDrivers, therefore
36 we implement stub functions that return an error code to resolve linker warnings.
37 */
_getpid(void)38 __weak int _getpid(void)
39 {
40 return E_NOT_SUPPORTED;
41 }
42
_kill(void)43 __weak int _kill(void)
44 {
45 return E_NOT_SUPPORTED;
46 }
47
SystemCoreClockUpdate(void)48 __weak void SystemCoreClockUpdate(void)
49 {
50 uint32_t base_freq, div, clk_src;
51
52 // Get the clock source and frequency
53 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL);
54 switch (clk_src) {
55 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_EXTCLK:
56 base_freq = EXTCLK2_FREQ;
57 break;
58 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERFO:
59 base_freq = ERFO_FREQ;
60 break;
61 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_INRO:
62 base_freq = INRO_FREQ;
63 break;
64 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO:
65 base_freq = IPO_FREQ;
66 break;
67 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IBRO:
68 base_freq = IBRO_FREQ;
69 break;
70 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO:
71 base_freq = ERTCO_FREQ;
72 break;
73 default:
74 // Codes 001 and 111 are reserved.
75 // This code should never execute, however, initialize to safe value.
76 base_freq = HIRC_FREQ;
77 break;
78 }
79 // Get the clock divider
80 if (clk_src == MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO) {
81 uint32_t ovr = (MXC_PWRSEQ->lpcn & MXC_F_PWRSEQ_LPCN_OVR);
82 switch (ovr) {
83 case MXC_S_PWRSEQ_LPCN_OVR_0_9V:
84 base_freq = base_freq >> 3;
85 break;
86 case MXC_S_PWRSEQ_LPCN_OVR_1_0V:
87 base_freq = base_freq >> 1;
88 break;
89 case MXC_S_PWRSEQ_LPCN_OVR_1_1V:
90 default:
91 /* Nothing to do here.
92 OVR = 1.1V means the clock runs full speed. */
93 break;
94 }
95
96 base_freq = base_freq >> ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_DIV) >>
97 MXC_F_GCR_CLKCTRL_IPO_DIV_POS);
98 }
99 div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS;
100
101 SystemCoreClock = base_freq >> div;
102 }
103
104 /* This function is called before C runtime initialization and can be
105 * implemented by the application for early initializations. If a value other
106 * than '0' is returned, the C runtime initialization will be skipped.
107 *
108 * You may over-ride this function in your program by defining a custom
109 * PreInit(), but care should be taken to reproduce the initialization steps
110 * or a non-functional system may result.
111 */
PreInit(void)112 __weak int PreInit(void)
113 {
114 /* Do nothing */
115 return 0;
116 }
117
118 /* This function can be implemented by the application to initialize the board */
Board_Init(void)119 __weak int Board_Init(void)
120 {
121 /* Do nothing */
122 return 0;
123 }
124
125 /* This function is called just before control is transferred to main().
126 *
127 * You may over-ride this function in your program by defining a custom
128 * SystemInit(), but care should be taken to reproduce the initialization
129 * steps or a non-functional system may result.
130 */
SystemInit(void)131 __weak void SystemInit(void)
132 {
133 /* Configure the interrupt controller to use the application vector table in */
134 /* the application space */
135 #if defined(__CC_ARM) || defined(__GNUC__)
136 /* IAR sets the VTOR pointer incorrectly and causes stack corruption */
137 SCB->VTOR = (uint32_t)__isr_vector;
138 #endif /* __CC_ARM || __GNUC__ */
139
140 /* Make sure interrupts are enabled. */
141 __enable_irq();
142
143 /* Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11 */
144 /* Grant full access, per "Table B3-24 CPACR bit assignments". */
145 /* DDI0403D "ARMv7-M Architecture Reference Manual" */
146 SCB->CPACR |= SCB_CPACR_CP10_Msk | SCB_CPACR_CP11_Msk;
147 __DSB();
148 __ISB();
149
150 /* Change system clock source to the main high-speed clock */
151 MXC_SYS_Clock_Select(MXC_SYS_CLOCK_IPO);
152 SystemCoreClockUpdate();
153
154 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO0);
155 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO1);
156
157 Board_Init();
158 }
159
