1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include <stdio.h>
22 #include <stddef.h>
23 #include <stdint.h>
24 #include "mxc_device.h"
25 #include "mxc_assert.h"
26 #include "mxc_lock.h"
27 #include "mxc_sys.h"
28 #include "mxc_delay.h"
29 #include "spimss_reva_regs.h"
30 #include "spimss_reva.h"
31
32 /* **** Functions **** */
33
34 /* ************************************************************************** */
MXC_SPIMSS_Init(mxc_spimss_regs_t * spi,unsigned mode,unsigned freq,const sys_map_t sys_cfg)35 int MXC_SPIMSS_Init(mxc_spimss_regs_t *spi, unsigned mode, unsigned freq, const sys_map_t sys_cfg)
36 {
37 int spi_num;
38
39 spi_num = MXC_SPIMSS_GET_IDX(spi);
40
41 MXC_ASSERT(spi_num >= 0);
42
43 if (mode > 3) {
44 return E_BAD_PARAM;
45 }
46
47 // Check if frequency is too high
48 if (freq > PeripheralClock) {
49 return E_BAD_PARAM;
50 }
51
52 // Configure GPIO for spimss
53 if (spi == MXC_SPIMSS) {
54 MXC_GCR->rst0 |= MXC_F_GCR_RST0_SPI1;
55 while (MXC_GCR->rst0 & MXC_F_GCR_RST0_SPI1) {}
56 MXC_GCR->pclk_dis0 &= ~(MXC_F_GCR_PCLK_DIS0_SPI1D);
57 if (sys_cfg == MAP_A) {
58 MXC_GPIO_Config(&gpio_cfg_spi1a); // SPI1A chosen
59 } else if (sys_cfg == MAP_B) {
60 MXC_GPIO_Config(&gpio_cfg_spi1b); // SPI1B chosen
61 } else {
62 return E_BAD_PARAM;
63 }
64 } else {
65 return E_NO_DEVICE;
66 }
67
68 return MXC_SPIMSS_RevA_Init((mxc_spimss_reva_regs_t *)spi, mode, freq);
69 }
70 /* ************************************************************************* */
MXC_SPIMSS_Shutdown(mxc_spimss_regs_t * spi)71 int MXC_SPIMSS_Shutdown(mxc_spimss_regs_t *spi)
72 {
73 int spi_num;
74 spi_num = MXC_SPIMSS_GET_IDX(spi);
75 MXC_ASSERT(spi_num >= 0);
76
77 MXC_SPIMSS_RevA_Shutdown((mxc_spimss_reva_regs_t *)spi);
78
79 if (spi == MXC_SPIMSS) {
80 MXC_GCR->pclk_dis0 |= (MXC_F_GCR_PCLK_DIS0_SPI1D);
81 }
82 return E_NO_ERROR;
83 }
84 /* ************************************************************************** */
MXC_SPIMSS_Handler(mxc_spimss_regs_t * spi)85 void MXC_SPIMSS_Handler(mxc_spimss_regs_t *spi) // From the IRQ
86 {
87 MXC_SPIMSS_RevA_Handler((mxc_spimss_reva_regs_t *)spi);
88 }
89
90 /* ************************************************************************** */
MXC_SPIMSS_MasterTrans(mxc_spimss_regs_t * spi,mxc_spimss_req_t * req)91 int MXC_SPIMSS_MasterTrans(mxc_spimss_regs_t *spi, mxc_spimss_req_t *req)
92 {
93 return MXC_SPIMSS_RevA_MasterTrans((mxc_spimss_reva_regs_t *)spi, (spimss_reva_req_t *)req);
94 }
95
96 /* ************************************************************************** */
MXC_SPIMSS_MasterTransDMA(mxc_spimss_regs_t * spi,mxc_spimss_req_t * req)97 int MXC_SPIMSS_MasterTransDMA(mxc_spimss_regs_t *spi, mxc_spimss_req_t *req)
98 {
99 return MXC_SPIMSS_RevA_MasterTransDMA((mxc_spimss_reva_regs_t *)spi, (spimss_reva_req_t *)req);
100 }
101
102 /* ************************************************************************** */
MXC_SPIMSS_SlaveTrans(mxc_spimss_regs_t * spi,mxc_spimss_req_t * req)103 int MXC_SPIMSS_SlaveTrans(mxc_spimss_regs_t *spi, mxc_spimss_req_t *req)
104 {
105 return MXC_SPIMSS_RevA_SlaveTrans((mxc_spimss_reva_regs_t *)spi, (spimss_reva_req_t *)req);
106 }
107
108 /* ************************************************************************** */
MXC_SPIMSS_MasterTransAsync(mxc_spimss_regs_t * spi,mxc_spimss_req_t * req)109 int MXC_SPIMSS_MasterTransAsync(mxc_spimss_regs_t *spi, mxc_spimss_req_t *req)
110 {
111 return MXC_SPIMSS_RevA_MasterTransAsync((mxc_spimss_reva_regs_t *)spi,
112 (spimss_reva_req_t *)req);
113 }
114
115 /* ************************************************************************** */
MXC_SPIMSS_SlaveTransAsync(mxc_spimss_regs_t * spi,mxc_spimss_req_t * req)116 int MXC_SPIMSS_SlaveTransAsync(mxc_spimss_regs_t *spi, mxc_spimss_req_t *req)
117 {
118 return MXC_SPIMSS_RevA_SlaveTransAsync((mxc_spimss_reva_regs_t *)spi, (spimss_reva_req_t *)req);
119 }
120
121 /* ************************************************************************* */
MXC_SPIMSS_AbortAsync(mxc_spimss_req_t * req)122 int MXC_SPIMSS_AbortAsync(mxc_spimss_req_t *req)
123 {
124 return MXC_SPIMSS_RevA_AbortAsync((spimss_reva_req_t *)req);
125 }
126
127 /* ************************************************************************* */
MXC_SPIMSS_SetAutoDMAHandlers(mxc_spimss_regs_t * spi,bool enable)128 int MXC_SPIMSS_SetAutoDMAHandlers(mxc_spimss_regs_t *spi, bool enable)
129 {
130 return MXC_SPIMSS_RevA_SetAutoDMAHandlers((mxc_spimss_reva_regs_t *)spi, enable);
131 }
132
133 /* ************************************************************************* */
MXC_SPIMSS_SetTXDMAChannel(mxc_spimss_regs_t * spi,unsigned int channel)134 int MXC_SPIMSS_SetTXDMAChannel(mxc_spimss_regs_t *spi, unsigned int channel)
135 {
136 return MXC_SPIMSS_RevA_SetTXDMAChannel((mxc_spimss_reva_regs_t *)spi, channel);
137 }
138
139 /* ************************************************************************* */
MXC_SPIMSS_GetTXDMAChannel(mxc_spimss_regs_t * spi)140 int MXC_SPIMSS_GetTXDMAChannel(mxc_spimss_regs_t *spi)
141 {
142 return MXC_SPIMSS_RevA_GetTXDMAChannel((mxc_spimss_reva_regs_t *)spi);
143 }
144
145 /* ************************************************************************* */
MXC_SPIMSS_SetRXDMAChannel(mxc_spimss_regs_t * spi,unsigned int channel)146 int MXC_SPIMSS_SetRXDMAChannel(mxc_spimss_regs_t *spi, unsigned int channel)
147 {
148 return MXC_SPIMSS_RevA_SetRXDMAChannel((mxc_spimss_reva_regs_t *)spi, channel);
149 }
150
151 /* ************************************************************************* */
MXC_SPIMSS_GetRXDMAChannel(mxc_spimss_regs_t * spi)152 int MXC_SPIMSS_GetRXDMAChannel(mxc_spimss_regs_t *spi)
153 {
154 return MXC_SPIMSS_RevA_GetRXDMAChannel((mxc_spimss_reva_regs_t *)spi);
155 }
156
