1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 /* **** Includes **** */
22 #include <string.h>
23 #include "mxc_device.h"
24 #include "mxc_assert.h"
25 #include "mxc_sys.h"
26 #include "mxc_errors.h"
27 #include "sdhc.h"
28 #include "sdhc_reva.h"
29
30 /* **** Definitions **** */
31
32 /* **** Globals **** */
33
34 /* ************************************************************************** */
MXC_SDHC_Set_Clock_Config(unsigned int clk_div)35 void MXC_SDHC_Set_Clock_Config(unsigned int clk_div)
36 {
37 MXC_SDHC_RevA_Set_Clock_Config((mxc_sdhc_reva_regs_t *)MXC_SDHC, clk_div);
38 }
39
40 /* ************************************************************************** */
MXC_SDHC_Get_Clock_Config(void)41 unsigned int MXC_SDHC_Get_Clock_Config(void)
42 {
43 return MXC_SDHC_RevA_Get_Clock_Config((mxc_sdhc_reva_regs_t *)MXC_SDHC);
44 }
45
46 /* ************************************************************************** */
MXC_SDHC_Init(const mxc_sdhc_cfg_t * cfg)47 int MXC_SDHC_Init(const mxc_sdhc_cfg_t *cfg)
48 {
49 mxc_gpio_regs_t *gpio = gpio_cfg_sdhc.port;
50
51 // Startup the IPO clock if it's not on already
52 if (!(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_EN)) {
53 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN;
54
55 if (MXC_SYS_Clock_Timeout(MXC_F_GCR_CLKCTRL_IPO_RDY) != E_NO_ERROR) {
56 return E_TIME_OUT;
57 }
58 }
59
60 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_SDHC);
61
62 gpio->ds0 |= gpio_cfg_sdhc.mask;
63
64 MXC_GPIO_Config(&gpio_cfg_sdhc);
65 return MXC_SDHC_RevA_Init((mxc_sdhc_reva_regs_t *)MXC_SDHC, cfg);
66 }
67
MXC_SDHC_Get_Input_Clock_Freq(void)68 unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
69 {
70 // Figure 4-1 of the preliminary AI85 UG (04/01/2022) shows the SDHC hardware block
71 // connected directly to the SYS_CLK node. This is most likely inaccurate, but the
72 // register description for MXC_GCR->pclkdiv marks the usual SDHC divider as reserved.
73 // We will follow figure 4-1 for now.
74
75 if (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIS1_SDHC) {
76 return SystemCoreClock >> 2; // Div by 4
77 } else {
78 return SystemCoreClock >> 1; // Div by 2
79 }
80
81 return SystemCoreClock;
82 }
83
84 /* ************************************************************************** */
MXC_SDHC_PowerUp(void)85 void MXC_SDHC_PowerUp(void)
86 {
87 MXC_SDHC_RevA_PowerUp((mxc_sdhc_reva_regs_t *)MXC_SDHC);
88 }
89
90 /* ************************************************************************** */
MXC_SDHC_PowerDown(void)91 void MXC_SDHC_PowerDown(void)
92 {
93 MXC_SDHC_RevA_PowerDown((mxc_sdhc_reva_regs_t *)MXC_SDHC);
94 }
95
96 /* ************************************************************************** */
MXC_SDHC_Shutdown(void)97 int MXC_SDHC_Shutdown(void)
98 {
99 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SDHC);
100 return MXC_SDHC_RevA_Shutdown((mxc_sdhc_reva_regs_t *)MXC_SDHC);
101 }
102
103 /* ************************************************************************** */
MXC_SDHC_SendCommand(mxc_sdhc_cmd_cfg_t * sd_cmd_cfg)104 int MXC_SDHC_SendCommand(mxc_sdhc_cmd_cfg_t *sd_cmd_cfg)
105 {
106 return MXC_SDHC_RevA_SendCommand((mxc_sdhc_reva_regs_t *)MXC_SDHC, sd_cmd_cfg);
107 }
108
109 /* ************************************************************************** */
MXC_SDHC_SendCommandAsync(mxc_sdhc_cmd_cfg_t * sd_cmd_cfg)110 int MXC_SDHC_SendCommandAsync(mxc_sdhc_cmd_cfg_t *sd_cmd_cfg)
111 {
112 return MXC_SDHC_RevA_SendCommandAsync((mxc_sdhc_reva_regs_t *)MXC_SDHC, sd_cmd_cfg);
113 }
114
115 /* ************************************************************************** */
MXC_SDHC_Handler(void)116 void MXC_SDHC_Handler(void)
117 {
118 MXC_SDHC_RevA_Handler((mxc_sdhc_reva_regs_t *)MXC_SDHC);
119 }
120
121 /* ************************************************************************** */
MXC_SDHC_ClearFlags(uint32_t mask)122 void MXC_SDHC_ClearFlags(uint32_t mask)
123 {
124 MXC_SDHC_RevA_ClearFlags((mxc_sdhc_reva_regs_t *)MXC_SDHC, mask);
125 }
126
127 /* ************************************************************************** */
MXC_SDHC_GetFlags(void)128 unsigned MXC_SDHC_GetFlags(void)
129 {
130 return MXC_SDHC_RevA_GetFlags((mxc_sdhc_reva_regs_t *)MXC_SDHC);
131 }
132
133 /* ************************************************************************** */
MXC_SDHC_Card_Inserted(void)134 int MXC_SDHC_Card_Inserted(void)
135 {
136 return MXC_SDHC_RevA_Card_Inserted((mxc_sdhc_reva_regs_t *)MXC_SDHC);
137 }
138
139 /* ************************************************************************** */
MXC_SDHC_Reset(void)140 void MXC_SDHC_Reset(void)
141 {
142 MXC_SDHC_RevA_Reset((mxc_sdhc_reva_regs_t *)MXC_SDHC);
143 }
144
145 /* ************************************************************************** */
MXC_SDHC_Reset_CMD_DAT(void)146 void MXC_SDHC_Reset_CMD_DAT(void)
147 {
148 MXC_SDHC_RevA_Reset_CMD_DAT((mxc_sdhc_reva_regs_t *)MXC_SDHC);
149 }
150
151 /* ************************************************************************** */
MXC_SDHC_Card_Busy(void)152 int MXC_SDHC_Card_Busy(void)
153 {
154 return MXC_SDHC_RevA_Card_Busy((mxc_sdhc_reva_regs_t *)MXC_SDHC);
155 }
156
157 /* ************************************************************************** */
MXC_SDHC_Get_Host_Cn_1(void)158 unsigned int MXC_SDHC_Get_Host_Cn_1(void)
159 {
160 return MXC_SDHC_RevA_Get_Host_Cn_1((mxc_sdhc_reva_regs_t *)MXC_SDHC);
161 }
162
163 /* ************************************************************************** */
MXC_SDHC_Get_Response32(void)164 uint32_t MXC_SDHC_Get_Response32(void)
165 {
166 return MXC_SDHC_RevA_Get_Response32((mxc_sdhc_reva_regs_t *)MXC_SDHC);
167 }
168
169 /* ************************************************************************** */
MXC_SDHC_Get_Response32_Auto(void)170 uint32_t MXC_SDHC_Get_Response32_Auto(void)
171 {
172 return MXC_SDHC_RevA_Get_Response32_Auto((mxc_sdhc_reva_regs_t *)MXC_SDHC);
173 }
174
175 /* ************************************************************************** */
MXC_SDHC_Get_Response128(unsigned char * response)176 void MXC_SDHC_Get_Response128(unsigned char *response)
177 {
178 MXC_SDHC_RevA_Get_Response128((mxc_sdhc_reva_regs_t *)MXC_SDHC, response);
179 }
180
