1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "gpio_regs.h"
22 #include "mcr_regs.h"
23 #include "mxc_delay.h"
24 #include "mxc_device.h"
25 #include "mxc_errors.h"
26 #include "mxc_sys.h"
27 #include "rtc.h"
28 #include "rtc_regs.h"
29 #include "rtc_reva.h"
30 #include "tmr.h"
31
32 /* ***** Functions ***** */
33
MXC_RTC_EnableInt(uint32_t mask)34 int MXC_RTC_EnableInt(uint32_t mask)
35 {
36 return MXC_RTC_RevA_EnableInt((mxc_rtc_reva_regs_t *)MXC_RTC, mask);
37 }
38
MXC_RTC_DisableInt(uint32_t mask)39 int MXC_RTC_DisableInt(uint32_t mask)
40 {
41 return MXC_RTC_RevA_DisableInt((mxc_rtc_reva_regs_t *)MXC_RTC, mask);
42 }
43
MXC_RTC_SetTimeofdayAlarm(uint32_t ras)44 int MXC_RTC_SetTimeofdayAlarm(uint32_t ras)
45 {
46 return MXC_RTC_RevA_SetTimeofdayAlarm((mxc_rtc_reva_regs_t *)MXC_RTC, ras);
47 }
48
MXC_RTC_SetSubsecondAlarm(uint32_t rssa)49 int MXC_RTC_SetSubsecondAlarm(uint32_t rssa)
50 {
51 return MXC_RTC_RevA_SetSubsecondAlarm((mxc_rtc_reva_regs_t *)MXC_RTC, rssa);
52 }
53
MXC_RTC_Start(void)54 int MXC_RTC_Start(void)
55 {
56 return MXC_RTC_RevA_Start((mxc_rtc_reva_regs_t *)MXC_RTC);
57 }
58
MXC_RTC_Stop(void)59 int MXC_RTC_Stop(void)
60 {
61 return MXC_RTC_RevA_Stop((mxc_rtc_reva_regs_t *)MXC_RTC);
62 }
63
MXC_RTC_Init(uint32_t sec,uint16_t ssec)64 int MXC_RTC_Init(uint32_t sec, uint16_t ssec)
65 {
66 // Enable clock
67 MXC_SYS_RTCClockEnable();
68
69 return MXC_RTC_RevA_Init((mxc_rtc_reva_regs_t *)MXC_RTC, sec, (ssec & MXC_F_RTC_SSEC_SSEC));
70 }
71
MXC_RTC_SquareWave(mxc_rtc_reva_sqwave_en_t sqe,mxc_rtc_freq_sel_t ft)72 int MXC_RTC_SquareWave(mxc_rtc_reva_sqwave_en_t sqe, mxc_rtc_freq_sel_t ft)
73 {
74 #if TARGET_NUM != 32675
75 MXC_GPIO_Config(&gpio_cfg_rtcsqw);
76
77 return MXC_RTC_RevA_SquareWave((mxc_rtc_reva_regs_t *)MXC_RTC, sqe, ft);
78 #else
79 return E_NOT_SUPPORTED;
80 #endif
81 }
82
MXC_RTC_SquareWaveStart(mxc_rtc_freq_sel_t fq)83 int MXC_RTC_SquareWaveStart(mxc_rtc_freq_sel_t fq)
84 {
85 #if TARGET_NUM != 32675
86 MXC_GPIO_Config(&gpio_cfg_rtcsqw);
87 return MXC_RTC_RevA_SquareWave((mxc_rtc_reva_regs_t *)MXC_RTC, MXC_RTC_REVA_SQUARE_WAVE_ENABLED,
88 fq);
89 #else
90 return E_NOT_SUPPORTED;
91 #endif
92 }
93
MXC_RTC_SquareWaveStop(void)94 int MXC_RTC_SquareWaveStop(void)
95 {
96 #if TARGET_NUM != 32675
97 return MXC_RTC_RevA_SquareWave((mxc_rtc_reva_regs_t *)MXC_RTC,
98 MXC_RTC_REVA_SQUARE_WAVE_DISABLED, 0);
99 #else
100 return E_NOT_SUPPORTED;
101 #endif
102 }
103
MXC_RTC_Trim(int8_t trm)104 int MXC_RTC_Trim(int8_t trm)
105 {
106 return MXC_RTC_RevA_Trim((mxc_rtc_reva_regs_t *)MXC_RTC, trm);
107 }
108
MXC_RTC_GetFlags(void)109 int MXC_RTC_GetFlags(void)
110 {
111 return MXC_RTC_RevA_GetFlags((mxc_rtc_reva_regs_t *)MXC_RTC);
112 }
113
MXC_RTC_ClearFlags(int flags)114 int MXC_RTC_ClearFlags(int flags)
115 {
116 return MXC_RTC_RevA_ClearFlags((mxc_rtc_reva_regs_t *)MXC_RTC, flags);
117 }
118
MXC_RTC_GetSubSecond(void)119 int MXC_RTC_GetSubSecond(void)
120 {
121 return MXC_RTC_RevA_GetSubSecond((mxc_rtc_reva_regs_t *)MXC_RTC);
122 }
123
MXC_RTC_GetSecond(void)124 int MXC_RTC_GetSecond(void)
125 {
126 return MXC_RTC_RevA_GetSecond((mxc_rtc_reva_regs_t *)MXC_RTC);
127 }
128
MXC_RTC_GetSubSeconds(uint32_t * ssec)129 int MXC_RTC_GetSubSeconds(uint32_t *ssec)
130 {
131 MXC_RTC->ctrl &= ~MXC_F_RTC_CTRL_RDY; // Ensure valid data is in SSEC register
132 while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) {}
133
134 return MXC_RTC_RevA_GetSubSeconds((mxc_rtc_reva_regs_t *)MXC_RTC, ssec);
135 }
136
MXC_RTC_GetSeconds(uint32_t * sec)137 int MXC_RTC_GetSeconds(uint32_t *sec)
138 {
139 MXC_RTC->ctrl &= ~MXC_F_RTC_CTRL_RDY; // Ensure valid data is in SEC register
140 while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) {}
141
142 return MXC_RTC_RevA_GetSeconds((mxc_rtc_reva_regs_t *)MXC_RTC, sec);
143 }
144
MXC_RTC_GetTime(uint32_t * sec,uint32_t * subsec)145 int MXC_RTC_GetTime(uint32_t *sec, uint32_t *subsec)
146 {
147 return MXC_RTC_RevA_GetTime((mxc_rtc_reva_regs_t *)MXC_RTC, sec, subsec);
148 }
149
MXC_RTC_GetBusyFlag(void)150 int MXC_RTC_GetBusyFlag(void)
151 {
152 return MXC_RTC_RevA_GetBusyFlag((mxc_rtc_reva_regs_t *)MXC_RTC);
153 }
154
MXC_RTC_TrimCrystal(mxc_tmr_regs_t * tmr)155 int MXC_RTC_TrimCrystal(mxc_tmr_regs_t *tmr)
156 {
157 if (MXC_TMR_GET_IDX(tmr) < 0 ||
158 MXC_TMR_GET_IDX(tmr) > 4) { // Timer must support ERFO as clock source
159 return E_BAD_PARAM;
160 }
161
162 mxc_tmr_cfg_t
163 tmr_cfg; // Configure timer to trigger each interrupt NUM_PERIOD number of times within a second
164 tmr_cfg.pres = MXC_TMR_PRES_1;
165 tmr_cfg.mode = MXC_TMR_MODE_CONTINUOUS;
166 tmr_cfg.bitMode = MXC_TMR_BIT_MODE_32;
167 tmr_cfg.clock = MXC_TMR_32M_CLK;
168 tmr_cfg.cmp_cnt = ERFO_FREQ / MXC_RTC_REVA_TRIM_PERIODS;
169 tmr_cfg.pol = 0;
170 MXC_TMR_Init(tmr, &tmr_cfg, false);
171
172 return MXC_RTC_RevA_TrimCrystal((mxc_rtc_reva_regs_t *)MXC_RTC, tmr);
173 }
174