1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "mxc_device.h"
22 #include "rtc_regs.h"
23 #include "rtc.h"
24 #include "mxc_sys.h"
25 #include "mxc_delay.h"
26 #include "gpio_regs.h"
27 #include "mxc_errors.h"
28 #include "mcr_regs.h"
29 #include "rtc_reva.h"
30
31 /********************************************/
32 /* Maxim Function Mapping */
33 /********************************************/
34
MXC_RTC_EnableInt(uint32_t mask)35 int MXC_RTC_EnableInt(uint32_t mask)
36 {
37 return MXC_RTC_RevA_EnableInt((mxc_rtc_reva_regs_t *)MXC_RTC, mask);
38 }
39
MXC_RTC_DisableInt(uint32_t mask)40 int MXC_RTC_DisableInt(uint32_t mask)
41 {
42 return MXC_RTC_RevA_DisableInt((mxc_rtc_reva_regs_t *)MXC_RTC, mask);
43 }
44
MXC_RTC_SetTimeofdayAlarm(uint32_t ras)45 int MXC_RTC_SetTimeofdayAlarm(uint32_t ras)
46 {
47 return MXC_RTC_RevA_SetTimeofdayAlarm((mxc_rtc_reva_regs_t *)MXC_RTC, ras);
48 }
49
MXC_RTC_SetSubsecondAlarm(uint32_t rssa)50 int MXC_RTC_SetSubsecondAlarm(uint32_t rssa)
51 {
52 return MXC_RTC_RevA_SetSubsecondAlarm((mxc_rtc_reva_regs_t *)MXC_RTC, rssa);
53 }
54
MXC_RTC_Start(void)55 int MXC_RTC_Start(void)
56 {
57 return MXC_RTC_RevA_Start((mxc_rtc_reva_regs_t *)MXC_RTC);
58 }
59
MXC_RTC_Stop(void)60 int MXC_RTC_Stop(void)
61 {
62 return MXC_RTC_RevA_Stop((mxc_rtc_reva_regs_t *)MXC_RTC);
63 }
64
MXC_RTC_Init(uint32_t sec,uint16_t ssec)65 int MXC_RTC_Init(uint32_t sec, uint16_t ssec)
66 {
67 MXC_MCR->clkctrl &= ~MXC_F_MCR_CLKCTRL_ERTCO_PD;
68 MXC_MCR->clkctrl |= MXC_F_MCR_CLKCTRL_ERTCO_EN;
69
70 return MXC_RTC_RevA_Init((mxc_rtc_reva_regs_t *)MXC_RTC, sec, (ssec & MXC_F_RTC_SSEC_SSEC));
71 }
72
MXC_RTC_SquareWave(mxc_rtc_reva_sqwave_en_t sqe,mxc_rtc_freq_sel_t ft)73 int MXC_RTC_SquareWave(mxc_rtc_reva_sqwave_en_t sqe, mxc_rtc_freq_sel_t ft)
74 {
75 // MXC_GPIO_Config(&gpio_cfg_rtcsqw); //FIXME: uncomment once added
76
77 return MXC_RTC_RevA_SquareWave((mxc_rtc_reva_regs_t *)MXC_RTC, sqe, ft);
78 }
79
MXC_RTC_Trim(int8_t trm)80 int MXC_RTC_Trim(int8_t trm)
81 {
82 return MXC_RTC_RevA_Trim((mxc_rtc_reva_regs_t *)MXC_RTC, trm);
83 }
84
MXC_RTC_GetFlags(void)85 int MXC_RTC_GetFlags(void)
86 {
87 return MXC_RTC_RevA_GetFlags((mxc_rtc_reva_regs_t *)MXC_RTC);
88 }
89
MXC_RTC_ClearFlags(int flags)90 int MXC_RTC_ClearFlags(int flags)
91 {
92 return MXC_RTC_RevA_ClearFlags((mxc_rtc_reva_regs_t *)MXC_RTC, flags);
93 }
94
MXC_RTC_GetSubSecond(void)95 int MXC_RTC_GetSubSecond(void)
96 {
97 return MXC_RTC_RevA_GetSubSecond((mxc_rtc_reva_regs_t *)MXC_RTC);
98 }
99
MXC_RTC_GetSecond(void)100 int MXC_RTC_GetSecond(void)
101 {
102 return MXC_RTC_RevA_GetSecond((mxc_rtc_reva_regs_t *)MXC_RTC);
103 }
104
MXC_RTC_GetSubSeconds(uint32_t * ssec)105 int MXC_RTC_GetSubSeconds(uint32_t *ssec)
106 {
107 MXC_RTC->ctrl &= ~MXC_F_RTC_CTRL_RDY; // Ensure valid data is in SSEC register
108 while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) {}
109
110 return MXC_RTC_RevA_GetSubSeconds((mxc_rtc_reva_regs_t *)MXC_RTC, ssec);
111 }
112
MXC_RTC_GetSeconds(uint32_t * sec)113 int MXC_RTC_GetSeconds(uint32_t *sec)
114 {
115 MXC_RTC->ctrl &= ~MXC_F_RTC_CTRL_RDY; // Ensure valid data is in SEC register
116 while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) {}
117
118 return MXC_RTC_RevA_GetSeconds((mxc_rtc_reva_regs_t *)MXC_RTC, sec);
119 }
120
MXC_RTC_GetTime(uint32_t * sec,uint32_t * subsec)121 int MXC_RTC_GetTime(uint32_t *sec, uint32_t *subsec)
122 {
123 return MXC_RTC_RevA_GetTime((mxc_rtc_reva_regs_t *)MXC_RTC, sec, subsec);
124 }
125
MXC_RTC_TrimCrystal(mxc_tmr_regs_t * tmr)126 int MXC_RTC_TrimCrystal(mxc_tmr_regs_t *tmr)
127 {
128 if (MXC_TMR_GET_IDX(tmr) < 0 ||
129 MXC_TMR_GET_IDX(tmr) > 2) { // Timer must support ERFO as clock source
130 return E_BAD_PARAM;
131 }
132
133 if (MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO) != E_NO_ERROR) {
134 return E_TIME_OUT;
135 }
136
137 mxc_tmr_cfg_t
138 tmr_cfg; // Configure timer to trigger each interrupt NUM_PERIOD number of times within a second
139 tmr_cfg.pres = MXC_TMR_PRES_1;
140 tmr_cfg.mode = MXC_TMR_MODE_CONTINUOUS;
141 tmr_cfg.bitMode = MXC_TMR_BIT_MODE_32;
142 tmr_cfg.clock = MXC_TMR_32M_CLK;
143 tmr_cfg.cmp_cnt = ERFO_FREQ / MXC_RTC_REVA_TRIM_PERIODS;
144 tmr_cfg.pol = 0;
145 MXC_TMR_Init(tmr, &tmr_cfg, false, MAP_A);
146
147 return MXC_RTC_RevA_TrimCrystal((mxc_rtc_reva_regs_t *)MXC_RTC, tmr);
148 }
149
