1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 /* **** Includes **** */
22 #include <string.h>
23 #include "owm_reva.h"
24
25 /* **** Definitions **** */
26 #define MXC_OWM_CLK_FREQ 1000000 //1-Wire requires 1MHz clock
27
28 /* **** Globals **** */
29
30 /* **** Functions **** */
31
MXC_OWM_Init(const mxc_owm_cfg_t * cfg,sys_map_t map)32 int MXC_OWM_Init(const mxc_owm_cfg_t *cfg, sys_map_t map)
33 {
34 int err = 0;
35 uint32_t mxc_owm_clk, clk_div = 0;
36
37 if (cfg == NULL) {
38 return E_NULL_PTR;
39 }
40
41 #ifndef MSDK_NO_GPIO_CLK_INIT
42 // Set system level configurations
43 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_OWIRE);
44
45 const mxc_gpio_cfg_t *gpio;
46 switch (map) {
47 case MAP_A:
48 gpio = &gpio_cfg_owma;
49 break;
50 case MAP_B:
51 gpio = &gpio_cfg_owmb;
52 break;
53 case MAP_C:
54 gpio = &gpio_cfg_owmc;
55 break;
56 default:
57 gpio = &gpio_cfg_owma;
58 break;
59 }
60
61 if ((err = MXC_GPIO_Config(gpio)) != E_NO_ERROR) {
62 return err;
63 }
64 #else
65 (void)map;
66 #endif
67
68 // Configure clk divisor to get 1MHz OWM clk
69 mxc_owm_clk = PeripheralClock;
70
71 if (mxc_owm_clk == 0) {
72 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
73 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXFC); // SPIXFC
74 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXIP); // SPIX
75 return E_UNINITIALIZED;
76 }
77
78 // Return error if clk doesn't divide evenly to 1MHz
79 if (mxc_owm_clk % MXC_OWM_CLK_FREQ) {
80 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
81 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXFC); // SPIXFC
82 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXIP); // SPIX
83 return E_NOT_SUPPORTED;
84 }
85
86 clk_div = (mxc_owm_clk / (MXC_OWM_CLK_FREQ));
87
88 // Can not support lower frequencies
89 if (clk_div == 0) {
90 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
91 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXFC); // SPIXFC
92 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXIP); // SPIX
93 return E_NOT_SUPPORTED;
94 }
95
96 err = MXC_OWM_RevA_Init((mxc_owm_reva_regs_t *)MXC_OWM, cfg);
97
98 return err;
99 }
100
MXC_OWM_Shutdown(void)101 void MXC_OWM_Shutdown(void)
102 {
103 // Disable and clear interrupts
104 MXC_OWM_RevA_Shutdown((mxc_owm_reva_regs_t *)MXC_OWM);
105
106 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
107 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXFC); // SPIXFC
108 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXIP); // SPIX
109 }
110
MXC_OWM_Reset(void)111 int MXC_OWM_Reset(void)
112 {
113 return MXC_OWM_RevA_Reset((mxc_owm_reva_regs_t *)MXC_OWM);
114 }
115
MXC_OWM_GetPresenceDetect(void)116 int MXC_OWM_GetPresenceDetect(void)
117 {
118 return (!!(MXC_OWM->ctrl_stat & MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT));
119 }
120
MXC_OWM_TouchByte(uint8_t data)121 int MXC_OWM_TouchByte(uint8_t data)
122 {
123 return MXC_OWM_RevA_TouchByte((mxc_owm_reva_regs_t *)MXC_OWM, data);
124 }
125
MXC_OWM_WriteByte(uint8_t data)126 int MXC_OWM_WriteByte(uint8_t data)
127 {
128 return MXC_OWM_RevA_WriteByte(data);
129 }
130
MXC_OWM_ReadByte(void)131 int MXC_OWM_ReadByte(void)
132 {
133 return MXC_OWM_RevA_ReadByte();
134 }
135
MXC_OWM_TouchBit(uint8_t bit)136 int MXC_OWM_TouchBit(uint8_t bit)
137 {
138 return MXC_OWM_RevA_TouchBit((mxc_owm_reva_regs_t *)MXC_OWM, bit);
139 }
140
MXC_OWM_WriteBit(uint8_t bit)141 int MXC_OWM_WriteBit(uint8_t bit)
142 {
143 return MXC_OWM_RevA_WriteBit(bit);
144 }
145
MXC_OWM_ReadBit(void)146 int MXC_OWM_ReadBit(void)
147 {
148 return MXC_OWM_RevA_ReadBit();
149 }
150
MXC_OWM_Write(uint8_t * data,int len)151 int MXC_OWM_Write(uint8_t *data, int len)
152 {
153 return MXC_OWM_RevA_Write((mxc_owm_reva_regs_t *)MXC_OWM, data, len);
154 }
155
MXC_OWM_Read(uint8_t * data,int len)156 int MXC_OWM_Read(uint8_t *data, int len)
157 {
158 return MXC_OWM_RevA_Read((mxc_owm_reva_regs_t *)MXC_OWM, data, len);
159 }
160
MXC_OWM_ReadROM(uint8_t * ROMCode)161 int MXC_OWM_ReadROM(uint8_t *ROMCode)
162 {
163 return MXC_OWM_RevA_ReadROM(ROMCode);
164 }
165
MXC_OWM_MatchROM(uint8_t * ROMCode)166 int MXC_OWM_MatchROM(uint8_t *ROMCode)
167 {
168 return MXC_OWM_RevA_MatchROM(ROMCode);
169 }
170
MXC_OWM_ODMatchROM(uint8_t * ROMCode)171 int MXC_OWM_ODMatchROM(uint8_t *ROMCode)
172 {
173 return MXC_OWM_RevA_ODMatchROM((mxc_owm_reva_regs_t *)MXC_OWM, ROMCode);
174 }
175
MXC_OWM_SkipROM(void)176 int MXC_OWM_SkipROM(void)
177 {
178 return MXC_OWM_RevA_SkipROM();
179 }
180
MXC_OWM_ODSkipROM(void)181 int MXC_OWM_ODSkipROM(void)
182 {
183 return MXC_OWM_RevA_ODSkipROM((mxc_owm_reva_regs_t *)MXC_OWM);
184 }
185
MXC_OWM_Resume(void)186 int MXC_OWM_Resume(void)
187 {
188 return MXC_OWM_RevA_Resume();
189 }
190
MXC_OWM_SearchROM(int newSearch,uint8_t * ROMCode)191 int MXC_OWM_SearchROM(int newSearch, uint8_t *ROMCode)
192 {
193 return MXC_OWM_RevA_SearchROM((mxc_owm_reva_regs_t *)MXC_OWM, newSearch, ROMCode);
194 }
195
MXC_OWM_ClearFlags(uint32_t mask)196 void MXC_OWM_ClearFlags(uint32_t mask)
197 {
198 MXC_OWM_RevA_ClearFlags((mxc_owm_reva_regs_t *)MXC_OWM, mask);
199 }
200
MXC_OWM_GetFlags(void)201 unsigned MXC_OWM_GetFlags(void)
202 {
203 return MXC_OWM_RevA_GetFlags((mxc_owm_reva_regs_t *)MXC_OWM);
204 }
205
MXC_OWM_SetExtPullup(int enable)206 void MXC_OWM_SetExtPullup(int enable)
207 {
208 MXC_OWM_RevA_SetExtPullup((mxc_owm_reva_regs_t *)MXC_OWM, enable);
209 }
210
MXC_OWM_SetOverdrive(int enable)211 void MXC_OWM_SetOverdrive(int enable)
212 {
213 MXC_OWM_RevA_SetOverdrive((mxc_owm_reva_regs_t *)MXC_OWM, enable);
214 }
215
MXC_OWM_EnableInt(int flags)216 void MXC_OWM_EnableInt(int flags)
217 {
218 MXC_OWM_RevA_EnableInt((mxc_owm_reva_regs_t *)MXC_OWM, flags);
219 }
220
MXC_OWM_DisableInt(int flags)221 void MXC_OWM_DisableInt(int flags)
222 {
223 MXC_OWM_RevA_DisableInt((mxc_owm_reva_regs_t *)MXC_OWM, flags);
224 }
225
MXC_OWM_SetForcePresenceDetect(int enable)226 int MXC_OWM_SetForcePresenceDetect(int enable)
227 {
228 return MXC_OWM_RevA_SetForcePresenceDetect((mxc_owm_reva_regs_t *)MXC_OWM, enable);
229 }
230
MXC_OWM_SetInternalPullup(int enable)231 int MXC_OWM_SetInternalPullup(int enable)
232 {
233 return MXC_OWM_RevA_SetInternalPullup((mxc_owm_reva_regs_t *)MXC_OWM, enable);
234 }
235
MXC_OWM_SetExternalPullup(mxc_owm_ext_pu_t ext_pu_mode)236 int MXC_OWM_SetExternalPullup(mxc_owm_ext_pu_t ext_pu_mode)
237 {
238 return MXC_OWM_RevA_SetExternalPullup((mxc_owm_reva_regs_t *)MXC_OWM, ext_pu_mode);
239 }
240
MXC_OWM_SystemClockUpdated(void)241 int MXC_OWM_SystemClockUpdated(void)
242 {
243 return MXC_OWM_RevA_SystemClockUpdated((mxc_owm_reva_regs_t *)MXC_OWM);
244 }
245
MXC_OWM_SetSearchROMAccelerator(int enable)246 int MXC_OWM_SetSearchROMAccelerator(int enable)
247 {
248 return MXC_OWM_RevA_SetSearchROMAccelerator((mxc_owm_reva_regs_t *)MXC_OWM, enable);
249 }
250
MXC_OWM_BitBang_Init(int initialState)251 int MXC_OWM_BitBang_Init(int initialState)
252 {
253 return MXC_OWM_RevA_BitBang_Init((mxc_owm_reva_regs_t *)MXC_OWM, initialState);
254 }
255
MXC_OWM_BitBang_Read(void)256 int MXC_OWM_BitBang_Read(void)
257 {
258 return MXC_OWM_RevA_BitBang_Read((mxc_owm_reva_regs_t *)MXC_OWM);
259 }
260
MXC_OWM_BitBang_Write(int state)261 int MXC_OWM_BitBang_Write(int state)
262 {
263 return MXC_OWM_RevA_BitBang_Write((mxc_owm_reva_regs_t *)MXC_OWM, state);
264 }
265
MXC_OWM_BitBang_Disable(void)266 int MXC_OWM_BitBang_Disable(void)
267 {
268 return MXC_OWM_RevA_BitBang_Disable((mxc_owm_reva_regs_t *)MXC_OWM);
269 }
270