1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 /* **** Includes **** */
22 #include <string.h>
23 #include "owm_reva.h"
24 
25 /* **** Definitions **** */
26 #define MXC_OWM_CLK_FREQ 1000000 //1-Wire requires 1MHz clock
27 
28 /* **** Globals **** */
29 
30 /* **** Functions **** */
31 
MXC_OWM_Init(const mxc_owm_cfg_t * cfg)32 int MXC_OWM_Init(const mxc_owm_cfg_t *cfg)
33 {
34     int err = 0;
35     uint32_t mxc_owm_clk, clk_div = 0;
36 
37     if (cfg == NULL) {
38         return E_NULL_PTR;
39     }
40 
41 #ifndef MSDK_NO_GPIO_CLK_INIT
42     // Set system level configurations
43     mxc_gpio_regs_t *gpio = gpio_cfg_owm.port;
44 
45     MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_OWIRE);
46     gpio->vssel |= gpio_cfg_owm.mask; // 1-Wire pins need to be at 3.3V.
47 
48     if ((err = MXC_GPIO_Config(&gpio_cfg_owm)) != E_NO_ERROR) {
49         return err;
50     }
51 #endif
52 
53     // Configure clk divisor to get 1MHz OWM clk
54     mxc_owm_clk = PeripheralClock;
55 
56     if (mxc_owm_clk == 0) {
57         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
58         return E_UNINITIALIZED;
59     }
60 
61     // Return error if clk doesn't divide evenly to 1MHz
62     if (mxc_owm_clk % MXC_OWM_CLK_FREQ) {
63         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
64         return E_NOT_SUPPORTED;
65     }
66 
67     clk_div = (mxc_owm_clk / (MXC_OWM_CLK_FREQ));
68 
69     // Can not support lower frequencies
70     if (clk_div == 0) {
71         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
72         return E_NOT_SUPPORTED;
73     }
74 
75     err = MXC_OWM_RevA_Init((mxc_owm_reva_regs_t *)MXC_OWM, cfg);
76     if (err == E_BAD_PARAM) {
77         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
78     }
79 
80     return err;
81 }
82 
MXC_OWM_Shutdown(void)83 void MXC_OWM_Shutdown(void)
84 {
85     MXC_OWM_RevA_Shutdown((mxc_owm_reva_regs_t *)MXC_OWM);
86     MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
87 }
88 
MXC_OWM_Reset(void)89 int MXC_OWM_Reset(void)
90 {
91     return MXC_OWM_RevA_Reset((mxc_owm_reva_regs_t *)MXC_OWM);
92 }
93 
MXC_OWM_GetPresenceDetect(void)94 int MXC_OWM_GetPresenceDetect(void)
95 {
96     return (!!(MXC_OWM->ctrl_stat & MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT));
97 }
98 
MXC_OWM_TouchByte(uint8_t data)99 int MXC_OWM_TouchByte(uint8_t data)
100 {
101     return MXC_OWM_RevA_TouchByte((mxc_owm_reva_regs_t *)MXC_OWM, data);
102 }
103 
MXC_OWM_WriteByte(uint8_t data)104 int MXC_OWM_WriteByte(uint8_t data)
105 {
106     return MXC_OWM_RevA_WriteByte(data);
107 }
108 
MXC_OWM_ReadByte(void)109 int MXC_OWM_ReadByte(void)
110 {
111     return MXC_OWM_RevA_ReadByte();
112 }
113 
MXC_OWM_TouchBit(uint8_t bit)114 int MXC_OWM_TouchBit(uint8_t bit)
115 {
116     return MXC_OWM_RevA_TouchBit((mxc_owm_reva_regs_t *)MXC_OWM, bit);
117 }
118 
MXC_OWM_WriteBit(uint8_t bit)119 int MXC_OWM_WriteBit(uint8_t bit)
120 {
121     return MXC_OWM_RevA_WriteBit(bit);
122 }
123 
MXC_OWM_ReadBit(void)124 int MXC_OWM_ReadBit(void)
125 {
126     return MXC_OWM_RevA_ReadBit();
127 }
128 
MXC_OWM_Write(uint8_t * data,int len)129 int MXC_OWM_Write(uint8_t *data, int len)
130 {
131     return MXC_OWM_RevA_Write((mxc_owm_reva_regs_t *)MXC_OWM, data, len);
132 }
133 
MXC_OWM_Read(uint8_t * data,int len)134 int MXC_OWM_Read(uint8_t *data, int len)
135 {
136     return MXC_OWM_RevA_Read((mxc_owm_reva_regs_t *)MXC_OWM, data, len);
137 }
138 
MXC_OWM_ReadROM(uint8_t * ROMCode)139 int MXC_OWM_ReadROM(uint8_t *ROMCode)
140 {
141     return MXC_OWM_RevA_ReadROM(ROMCode);
142 }
143 
MXC_OWM_MatchROM(uint8_t * ROMCode)144 int MXC_OWM_MatchROM(uint8_t *ROMCode)
145 {
146     return MXC_OWM_RevA_MatchROM(ROMCode);
147 }
148 
MXC_OWM_ODMatchROM(uint8_t * ROMCode)149 int MXC_OWM_ODMatchROM(uint8_t *ROMCode)
150 {
151     return MXC_OWM_RevA_ODMatchROM((mxc_owm_reva_regs_t *)MXC_OWM, ROMCode);
152 }
153 
MXC_OWM_SkipROM(void)154 int MXC_OWM_SkipROM(void)
155 {
156     return MXC_OWM_RevA_SkipROM();
157 }
158 
MXC_OWM_ODSkipROM(void)159 int MXC_OWM_ODSkipROM(void)
160 {
161     return MXC_OWM_RevA_ODSkipROM((mxc_owm_reva_regs_t *)MXC_OWM);
162 }
163 
MXC_OWM_Resume(void)164 int MXC_OWM_Resume(void)
165 {
166     return MXC_OWM_RevA_Resume();
167 }
168 
MXC_OWM_SearchROM(int newSearch,uint8_t * ROMCode)169 int MXC_OWM_SearchROM(int newSearch, uint8_t *ROMCode)
170 {
171     return MXC_OWM_RevA_SearchROM((mxc_owm_reva_regs_t *)MXC_OWM, newSearch, ROMCode);
172 }
173 
MXC_OWM_ClearFlags(uint32_t mask)174 void MXC_OWM_ClearFlags(uint32_t mask)
175 {
176     MXC_OWM_RevA_ClearFlags((mxc_owm_reva_regs_t *)MXC_OWM, mask);
177 }
178 
MXC_OWM_GetFlags(void)179 unsigned MXC_OWM_GetFlags(void)
180 {
181     return MXC_OWM_RevA_GetFlags((mxc_owm_reva_regs_t *)MXC_OWM);
182 }
183 
MXC_OWM_SetExtPullup(int enable)184 void MXC_OWM_SetExtPullup(int enable)
185 {
186     MXC_OWM_RevA_SetExtPullup((mxc_owm_reva_regs_t *)MXC_OWM, enable);
187 }
188 
MXC_OWM_SetOverdrive(int enable)189 void MXC_OWM_SetOverdrive(int enable)
190 {
191     MXC_OWM_RevA_SetOverdrive((mxc_owm_reva_regs_t *)MXC_OWM, enable);
192 }
193 
MXC_OWM_EnableInt(int flags)194 void MXC_OWM_EnableInt(int flags)
195 {
196     MXC_OWM_RevA_EnableInt((mxc_owm_reva_regs_t *)MXC_OWM, flags);
197 }
198 
MXC_OWM_DisableInt(int flags)199 void MXC_OWM_DisableInt(int flags)
200 {
201     MXC_OWM_RevA_DisableInt((mxc_owm_reva_regs_t *)MXC_OWM, flags);
202 }
203 
MXC_OWM_SetForcePresenceDetect(int enable)204 int MXC_OWM_SetForcePresenceDetect(int enable)
205 {
206     return MXC_OWM_RevA_SetForcePresenceDetect((mxc_owm_reva_regs_t *)MXC_OWM, enable);
207 }
208 
MXC_OWM_SetInternalPullup(int enable)209 int MXC_OWM_SetInternalPullup(int enable)
210 {
211     return MXC_OWM_RevA_SetInternalPullup((mxc_owm_reva_regs_t *)MXC_OWM, enable);
212 }
213 
MXC_OWM_SetExternalPullup(mxc_owm_ext_pu_t ext_pu_mode)214 int MXC_OWM_SetExternalPullup(mxc_owm_ext_pu_t ext_pu_mode)
215 {
216     return MXC_OWM_RevA_SetExternalPullup((mxc_owm_reva_regs_t *)MXC_OWM, ext_pu_mode);
217 }
218 
MXC_OWM_SystemClockUpdated(void)219 int MXC_OWM_SystemClockUpdated(void)
220 {
221     return MXC_OWM_RevA_SystemClockUpdated((mxc_owm_reva_regs_t *)MXC_OWM);
222 }
223 
MXC_OWM_SetSearchROMAccelerator(int enable)224 int MXC_OWM_SetSearchROMAccelerator(int enable)
225 {
226     return MXC_OWM_RevA_SetSearchROMAccelerator((mxc_owm_reva_regs_t *)MXC_OWM, enable);
227 }
228 
MXC_OWM_BitBang_Init(int initialState)229 int MXC_OWM_BitBang_Init(int initialState)
230 {
231     return MXC_OWM_RevA_BitBang_Init((mxc_owm_reva_regs_t *)MXC_OWM, initialState);
232 }
233 
MXC_OWM_BitBang_Read(void)234 int MXC_OWM_BitBang_Read(void)
235 {
236     return MXC_OWM_RevA_BitBang_Read((mxc_owm_reva_regs_t *)MXC_OWM);
237 }
238 
MXC_OWM_BitBang_Write(int state)239 int MXC_OWM_BitBang_Write(int state)
240 {
241     return MXC_OWM_RevA_BitBang_Write((mxc_owm_reva_regs_t *)MXC_OWM, state);
242 }
243 
MXC_OWM_BitBang_Disable(void)244 int MXC_OWM_BitBang_Disable(void)
245 {
246     return MXC_OWM_RevA_BitBang_Disable((mxc_owm_reva_regs_t *)MXC_OWM);
247 }
248