1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 #include <stdio.h>
22 #include <stddef.h>
23 #include <stdint.h>
24 #include "mxc_device.h"
25 #include "mxc_assert.h"
26 #include "mxc_lock.h"
27 #include "mxc_sys.h"
28 #include "mxc_pins.h"
29 #include "mxc_delay.h"
30 #include "i2c_regs.h"
31 #include "dma_regs.h"
32 #include "i2c.h"
33 #include "i2c_reva.h"
34 
35 /* **** Variable Declaration **** */
36 uint32_t interruptCheck = MXC_F_I2C_INT_FL0_RD_ADDR_MATCH | MXC_F_I2C_INT_FL0_WR_ADDR_MATCH |
37                           MXC_F_I2C_INT_FL0_ADDR_MATCH | MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER;
38 
39 /* **** Function Prototypes **** */
40 
41 /* ************************************************************************* */
42 /* Control/Configuration functions                                           */
43 /* ************************************************************************* */
MXC_I2C_Init(mxc_i2c_regs_t * i2c,int masterMode,unsigned int slaveAddr)44 int MXC_I2C_Init(mxc_i2c_regs_t *i2c, int masterMode, unsigned int slaveAddr)
45 {
46     if (i2c == NULL) {
47         return E_NULL_PTR;
48     }
49 
50 #ifndef MSDK_NO_GPIO_CLK_INIT
51     MXC_I2C_Shutdown(i2c); // Clear everything out
52 
53     if ((i2c == MXC_I2C0_BUS0) || (i2c == MXC_I2C0_BUS1)) {
54         MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C0);
55         MXC_GPIO_Config(&gpio_cfg_i2c0);
56     } else if ((i2c == MXC_I2C1_BUS0) || (i2c == MXC_I2C1_BUS1)) {
57         MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C1);
58         MXC_GPIO_Config(&gpio_cfg_i2c1);
59     } else if ((i2c == MXC_I2C2_BUS0) || (i2c == MXC_I2C2_BUS1)) {
60         MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C2);
61         MXC_GPIO_Config(&gpio_cfg_i2c2);
62     } else {
63         return E_NO_DEVICE;
64     }
65 #endif // MSDK_NO_GPIO_CLK_INIT
66 
67     return MXC_I2C_RevA_Init((mxc_i2c_reva_regs_t *)i2c, masterMode, slaveAddr);
68 }
69 
MXC_I2C_SetSlaveAddr(mxc_i2c_regs_t * i2c,unsigned int slaveAddr,int idx)70 int MXC_I2C_SetSlaveAddr(mxc_i2c_regs_t *i2c, unsigned int slaveAddr, int idx)
71 {
72     if (idx != 0) {
73         // MAX32665 only supports one slave address
74         return E_NOT_SUPPORTED;
75     }
76 
77     return MXC_I2C_RevA_SetSlaveAddr((mxc_i2c_reva_regs_t *)i2c, slaveAddr, idx);
78 }
79 
MXC_I2C_Shutdown(mxc_i2c_regs_t * i2c)80 int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
81 {
82     // Configure GPIO for I2C
83     if ((i2c == MXC_I2C0_BUS0) || (i2c == MXC_I2C0_BUS1)) {
84         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C0);
85     } else if ((i2c == MXC_I2C1_BUS0) || (i2c == MXC_I2C1_BUS1)) {
86         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C1);
87     } else if ((i2c == MXC_I2C2_BUS0) || (i2c == MXC_I2C2_BUS1)) {
88         MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C2);
89     } else {
90         return E_NO_DEVICE;
91     }
92 
93     int i2cNum = MXC_I2C_GET_IDX(i2c);
94 
95     // Reconcile this with MXC_SYS_I2C_Init when we figure out what to do abotu system level things
96     switch (i2cNum) {
97     case 0:
98         MXC_GCR->rstr0 |= MXC_F_GCR_RSTR0_I2C0;
99         break;
100 
101     case 1:
102         MXC_GCR->rstr1 |= MXC_F_GCR_RSTR1_I2C1;
103         break;
104 
105     case 2:
106         MXC_GCR->rstr1 |= MXC_F_GCR_RSTR1_I2C2;
107         break;
108 
109     default:
110         return E_BAD_PARAM;
111     }
112 
113     return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
114 }
115 
MXC_I2C_SetFrequency(mxc_i2c_regs_t * i2c,unsigned int hz)116 int MXC_I2C_SetFrequency(mxc_i2c_regs_t *i2c, unsigned int hz)
117 {
118     return MXC_I2C_RevA_SetFrequency((mxc_i2c_reva_regs_t *)i2c, hz);
119 }
120 
MXC_I2C_GetFrequency(mxc_i2c_regs_t * i2c)121 unsigned int MXC_I2C_GetFrequency(mxc_i2c_regs_t *i2c)
122 {
123     return MXC_I2C_RevA_GetFrequency((mxc_i2c_reva_regs_t *)i2c);
124 }
125 
MXC_I2C_ReadyForSleep(mxc_i2c_regs_t * i2c)126 int MXC_I2C_ReadyForSleep(mxc_i2c_regs_t *i2c)
127 {
128     return MXC_I2C_RevA_ReadyForSleep((mxc_i2c_reva_regs_t *)i2c);
129 }
130 
MXC_I2C_SetClockStretching(mxc_i2c_regs_t * i2c,int enable)131 int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable)
132 {
133     return MXC_I2C_RevA_SetClockStretching((mxc_i2c_reva_regs_t *)i2c, enable);
134 }
135 
MXC_I2C_GetClockStretching(mxc_i2c_regs_t * i2c)136 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
137 {
138     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
139 }
140 
MXC_I2C_DMA_Init(mxc_i2c_regs_t * i2c,mxc_dma_regs_t * dma,bool use_dma_tx,bool use_dma_rx)141 int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
142 {
143     return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
144                                  use_dma_rx);
145 }
146 
MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t * i2c)147 int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
148 {
149     return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
150 }
151 
MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t * i2c)152 int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
153 {
154     return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
155 }
156 
MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t * i2c,uint8_t * txData,uint8_t * rxData)157 int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
158 {
159     int i2cNum;
160     int txReqSel = -1;
161     int rxReqSel = -1;
162 
163     if (i2c == NULL) {
164         return E_NULL_PTR;
165     }
166 
167     i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
168 
169     if (txData != NULL) {
170         switch (i2cNum) {
171         case 0:
172             txReqSel = MXC_DMA_REQUEST_I2C0TX;
173             break;
174 
175         case 1:
176             txReqSel = MXC_DMA_REQUEST_I2C1TX;
177             break;
178 
179         case 2:
180             txReqSel = MXC_DMA_REQUEST_I2C2TX;
181             break;
182 
183         default:
184             return E_BAD_PARAM;
185         }
186     }
187 
188     if (rxData != NULL) {
189         switch (i2cNum) {
190         case 0:
191             rxReqSel = MXC_DMA_REQUEST_I2C0RX;
192             break;
193 
194         case 1:
195             rxReqSel = MXC_DMA_REQUEST_I2C1RX;
196             break;
197 
198         case 2:
199             rxReqSel = MXC_DMA_REQUEST_I2C2RX;
200             break;
201 
202         default:
203             return E_BAD_PARAM;
204         }
205     }
206 
207     return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
208                                              (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
209 }
210 
211 /* ************************************************************************* */
212 /* Low-level functions                                                       */
213 /* ************************************************************************* */
MXC_I2C_Start(mxc_i2c_regs_t * i2c)214 int MXC_I2C_Start(mxc_i2c_regs_t *i2c)
215 {
216     return MXC_I2C_RevA_Start((mxc_i2c_reva_regs_t *)i2c);
217 }
218 
MXC_I2C_Stop(mxc_i2c_regs_t * i2c)219 int MXC_I2C_Stop(mxc_i2c_regs_t *i2c)
220 {
221     return MXC_I2C_RevA_Stop((mxc_i2c_reva_regs_t *)i2c);
222 }
223 
MXC_I2C_WriteByte(mxc_i2c_regs_t * i2c,unsigned char byte)224 int MXC_I2C_WriteByte(mxc_i2c_regs_t *i2c, unsigned char byte)
225 {
226     return MXC_I2C_RevA_WriteByte((mxc_i2c_reva_regs_t *)i2c, byte);
227 }
228 
MXC_I2C_ReadByte(mxc_i2c_regs_t * i2c,unsigned char * byte,int ack)229 int MXC_I2C_ReadByte(mxc_i2c_regs_t *i2c, unsigned char *byte, int ack)
230 {
231     return MXC_I2C_RevA_ReadByte((mxc_i2c_reva_regs_t *)i2c, byte, ack);
232 }
233 
MXC_I2C_ReadByteInteractive(mxc_i2c_regs_t * i2c,unsigned char * byte,mxc_i2c_getAck_t getAck)234 int MXC_I2C_ReadByteInteractive(mxc_i2c_regs_t *i2c, unsigned char *byte, mxc_i2c_getAck_t getAck)
235 {
236     return MXC_I2C_RevA_ReadByteInteractive((mxc_i2c_reva_regs_t *)i2c, byte,
237                                             (mxc_i2c_reva_getAck_t)getAck);
238 }
239 
MXC_I2C_Write(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int * len)240 int MXC_I2C_Write(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len)
241 {
242     return MXC_I2C_RevA_Write((mxc_i2c_reva_regs_t *)i2c, bytes, len);
243 }
244 
MXC_I2C_Read(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int * len,int ack)245 int MXC_I2C_Read(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len, int ack)
246 {
247     return MXC_I2C_RevA_Read((mxc_i2c_reva_regs_t *)i2c, bytes, len, ack);
248 }
249 
MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t * i2c,volatile unsigned char * bytes,unsigned int len)250 int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
251 {
252     return MXC_I2C_RevA_ReadRXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
253 }
254 
MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int len,mxc_i2c_dma_complete_cb_t callback,mxc_dma_regs_t * dma)255 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
256                           mxc_i2c_dma_complete_cb_t callback, mxc_dma_regs_t *dma)
257 {
258     // The callback parameter was previously unused but keeping it for backwards-compatibility.
259     return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, dma);
260 }
261 
MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t * i2c)262 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
263 {
264     return MXC_I2C_RevA_GetRXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
265 }
266 
MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t * i2c,volatile unsigned char * bytes,unsigned int len)267 int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
268 {
269     return MXC_I2C_RevA_WriteTXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
270 }
271 
MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int len,mxc_i2c_dma_complete_cb_t callback,mxc_dma_regs_t * dma)272 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
273                            mxc_i2c_dma_complete_cb_t callback, mxc_dma_regs_t *dma)
274 {
275     // The callback parameter was previously unused but keeping it for backwards-compatibility.
276     return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, dma);
277 }
278 
MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t * i2c)279 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
280 {
281     return MXC_I2C_RevA_GetTXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
282 }
283 
MXC_I2C_ClearRXFIFO(mxc_i2c_regs_t * i2c)284 void MXC_I2C_ClearRXFIFO(mxc_i2c_regs_t *i2c)
285 {
286     MXC_I2C_RevA_ClearRXFIFO((mxc_i2c_reva_regs_t *)i2c);
287 }
288 
MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t * i2c)289 void MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t *i2c)
290 {
291     MXC_I2C_RevA_ClearTXFIFO((mxc_i2c_reva_regs_t *)i2c);
292 }
293 
MXC_I2C_GetFlags(mxc_i2c_regs_t * i2c,unsigned int * flags0,unsigned int * flags1)294 int MXC_I2C_GetFlags(mxc_i2c_regs_t *i2c, unsigned int *flags0, unsigned int *flags1)
295 {
296     return MXC_I2C_RevA_GetFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
297 }
298 
MXC_I2C_ClearFlags(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)299 void MXC_I2C_ClearFlags(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
300 {
301     MXC_I2C_RevA_ClearFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
302 }
303 
MXC_I2C_EnableInt(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)304 void MXC_I2C_EnableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
305 {
306     MXC_I2C_RevA_EnableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
307 }
308 
MXC_I2C_DisableInt(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)309 void MXC_I2C_DisableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
310 {
311     MXC_I2C_RevA_DisableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
312 }
313 
MXC_I2C_EnablePreload(mxc_i2c_regs_t * i2c)314 void MXC_I2C_EnablePreload(mxc_i2c_regs_t *i2c)
315 {
316     MXC_I2C_RevA_EnablePreload((mxc_i2c_reva_regs_t *)i2c);
317 }
318 
MXC_I2C_DisablePreload(mxc_i2c_regs_t * i2c)319 void MXC_I2C_DisablePreload(mxc_i2c_regs_t *i2c)
320 {
321     MXC_I2C_RevA_DisablePreload((mxc_i2c_reva_regs_t *)i2c);
322 }
323 
MXC_I2C_EnableGeneralCall(mxc_i2c_regs_t * i2c)324 void MXC_I2C_EnableGeneralCall(mxc_i2c_regs_t *i2c)
325 {
326     MXC_I2C_RevA_EnableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
327 }
328 
MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t * i2c)329 void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c)
330 {
331     MXC_I2C_RevA_DisableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
332 }
333 
MXC_I2C_SetTimeout(mxc_i2c_regs_t * i2c,unsigned int timeout)334 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout)
335 {
336     MXC_I2C_RevA_SetTimeout((mxc_i2c_reva_regs_t *)i2c, timeout);
337 }
338 
MXC_I2C_GetTimeout(mxc_i2c_regs_t * i2c)339 unsigned int MXC_I2C_GetTimeout(mxc_i2c_regs_t *i2c)
340 {
341     return MXC_I2C_RevA_GetTimeout((mxc_i2c_reva_regs_t *)i2c);
342 }
343 
MXC_I2C_Recover(mxc_i2c_regs_t * i2c,unsigned int retries)344 int MXC_I2C_Recover(mxc_i2c_regs_t *i2c, unsigned int retries)
345 {
346     return MXC_I2C_RevA_Recover((mxc_i2c_reva_regs_t *)i2c, retries);
347 }
348 
349 /* ************************************************************************* */
350 /* Transaction level functions                                               */
351 /* ************************************************************************* */
352 
MXC_I2C_MasterTransaction(mxc_i2c_req_t * req)353 int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req)
354 {
355     return MXC_I2C_RevA_MasterTransaction((mxc_i2c_reva_req_t *)req);
356 }
357 
MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t * req)358 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req)
359 {
360     return MXC_I2C_RevA_MasterTransactionAsync((mxc_i2c_reva_req_t *)req);
361 }
362 
MXC_I2C_MasterTransactionDMA(mxc_i2c_req_t * req,mxc_dma_regs_t * dma)363 int MXC_I2C_MasterTransactionDMA(mxc_i2c_req_t *req, mxc_dma_regs_t *dma)
364 {
365     if (MXC_DMA_GET_IDX(dma) == -1) {
366         return E_BAD_PARAM;
367     }
368 
369     return MXC_I2C_RevA_MasterTransactionDMA((mxc_i2c_reva_req_t *)req, dma);
370 }
371 
MXC_I2C_SlaveTransaction(mxc_i2c_regs_t * i2c,mxc_i2c_slave_handler_t callback)372 int MXC_I2C_SlaveTransaction(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
373 {
374     return MXC_I2C_RevA_SlaveTransaction((mxc_i2c_reva_regs_t *)i2c,
375                                          (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
376 }
377 
MXC_I2C_SlaveTransactionAsync(mxc_i2c_regs_t * i2c,mxc_i2c_slave_handler_t callback)378 int MXC_I2C_SlaveTransactionAsync(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
379 {
380     return MXC_I2C_RevA_SlaveTransactionAsync(
381         (mxc_i2c_reva_regs_t *)i2c, (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
382 }
383 
MXC_I2C_SetRXThreshold(mxc_i2c_regs_t * i2c,unsigned int numBytes)384 int MXC_I2C_SetRXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
385 {
386     return MXC_I2C_RevA_SetRXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
387 }
388 
MXC_I2C_GetRXThreshold(mxc_i2c_regs_t * i2c)389 unsigned int MXC_I2C_GetRXThreshold(mxc_i2c_regs_t *i2c)
390 {
391     return MXC_I2C_RevA_GetRXThreshold((mxc_i2c_reva_regs_t *)i2c);
392 }
393 
MXC_I2C_SetTXThreshold(mxc_i2c_regs_t * i2c,unsigned int numBytes)394 int MXC_I2C_SetTXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
395 {
396     return MXC_I2C_RevA_SetTXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
397 }
398 
MXC_I2C_GetTXThreshold(mxc_i2c_regs_t * i2c)399 unsigned int MXC_I2C_GetTXThreshold(mxc_i2c_regs_t *i2c)
400 {
401     return MXC_I2C_RevA_GetTXThreshold((mxc_i2c_reva_regs_t *)i2c);
402 }
403 
MXC_I2C_AsyncStop(mxc_i2c_regs_t * i2c)404 void MXC_I2C_AsyncStop(mxc_i2c_regs_t *i2c)
405 {
406     MXC_I2C_RevA_AsyncStop((mxc_i2c_reva_regs_t *)i2c);
407 }
408 
MXC_I2C_AbortAsync(mxc_i2c_regs_t * i2c)409 void MXC_I2C_AbortAsync(mxc_i2c_regs_t *i2c)
410 {
411     MXC_I2C_RevA_AbortAsync((mxc_i2c_reva_regs_t *)i2c);
412 }
413 
MXC_I2C_AsyncHandler(mxc_i2c_regs_t * i2c)414 void MXC_I2C_AsyncHandler(mxc_i2c_regs_t *i2c)
415 {
416     MXC_I2C_RevA_AsyncHandler((mxc_i2c_reva_regs_t *)i2c, interruptCheck);
417 }
418 
MXC_I2C_DMACallback(int ch,int error)419 void MXC_I2C_DMACallback(int ch, int error)
420 {
421     MXC_I2C_RevA_DMACallback(ch, error);
422 }
423