1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 /* **** Includes **** */
22 #include <stddef.h>
23 #include "mxc_device.h"
24 #include "mxc_assert.h"
25 #include "gpio.h"
26 #include "gpio_reva.h"
27 #include "gpio_common.h"
28 #include "mxc_sys.h"
29
30 /* **** Definitions **** */
31
32 /* **** Functions **** */
33
MXC_GPIO_Init(uint32_t portmask)34 int MXC_GPIO_Init(uint32_t portmask)
35 {
36 if (portmask & MXC_GPIO_PORT_0) {
37 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO0);
38 }
39
40 if (portmask & MXC_GPIO_PORT_1) {
41 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO1);
42 }
43
44 return MXC_GPIO_Common_Init(portmask);
45 }
46
MXC_GPIO_Shutdown(uint32_t portmask)47 int MXC_GPIO_Shutdown(uint32_t portmask)
48 {
49 if (portmask & MXC_GPIO_PORT_0) {
50 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_GPIO0);
51 }
52
53 if (portmask & MXC_GPIO_PORT_1) {
54 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_GPIO1);
55 }
56
57 return E_NO_ERROR;
58 }
59
MXC_GPIO_Reset(uint32_t portmask)60 int MXC_GPIO_Reset(uint32_t portmask)
61 {
62 if (portmask & MXC_GPIO_PORT_0) {
63 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_GPIO0);
64 }
65
66 if (portmask & MXC_GPIO_PORT_1) {
67 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_GPIO1);
68 }
69
70 return E_NO_ERROR;
71 }
72
MXC_GPIO_Config(const mxc_gpio_cfg_t * cfg)73 int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
74 {
75 int error;
76 mxc_gpio_regs_t *gpio = cfg->port;
77
78 // Configure alternate function
79 error = MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)gpio, cfg->func, cfg->mask);
80 if (error != E_NO_ERROR) {
81 return error;
82 }
83
84 // Configure the pad
85 switch (cfg->pad) {
86 case MXC_GPIO_PAD_NONE:
87 gpio->padctrl0 &= ~cfg->mask;
88 break;
89
90 case MXC_GPIO_PAD_PULL_UP:
91 gpio->padctrl0 |= cfg->mask;
92 gpio->ps |= cfg->mask;
93 break;
94
95 case MXC_GPIO_PAD_PULL_DOWN:
96 gpio->padctrl0 |= cfg->mask;
97 gpio->ps &= ~cfg->mask;
98 break;
99
100 default:
101 return E_BAD_PARAM;
102 }
103
104 // Configure the drive strength
105 if (cfg->func == MXC_GPIO_FUNC_IN) {
106 return E_NO_ERROR;
107 } else {
108 return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
109 }
110 }
111
MXC_GPIO_InGet(mxc_gpio_regs_t * port,uint32_t mask)112 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
113 {
114 return MXC_GPIO_RevA_InGet((mxc_gpio_reva_regs_t *)port, mask);
115 }
116
MXC_GPIO_OutSet(mxc_gpio_regs_t * port,uint32_t mask)117 void MXC_GPIO_OutSet(mxc_gpio_regs_t *port, uint32_t mask)
118 {
119 MXC_GPIO_RevA_OutSet((mxc_gpio_reva_regs_t *)port, mask);
120 }
121
MXC_GPIO_OutClr(mxc_gpio_regs_t * port,uint32_t mask)122 void MXC_GPIO_OutClr(mxc_gpio_regs_t *port, uint32_t mask)
123 {
124 MXC_GPIO_RevA_OutClr((mxc_gpio_reva_regs_t *)port, mask);
125 }
126
MXC_GPIO_OutGet(mxc_gpio_regs_t * port,uint32_t mask)127 uint32_t MXC_GPIO_OutGet(mxc_gpio_regs_t *port, uint32_t mask)
128 {
129 return MXC_GPIO_RevA_OutGet((mxc_gpio_reva_regs_t *)port, mask);
130 }
131
MXC_GPIO_OutPut(mxc_gpio_regs_t * port,uint32_t mask,uint32_t val)132 void MXC_GPIO_OutPut(mxc_gpio_regs_t *port, uint32_t mask, uint32_t val)
133 {
134 MXC_GPIO_RevA_OutPut((mxc_gpio_reva_regs_t *)port, mask, val);
135 }
136
MXC_GPIO_OutToggle(mxc_gpio_regs_t * port,uint32_t mask)137 void MXC_GPIO_OutToggle(mxc_gpio_regs_t *port, uint32_t mask)
138 {
139 MXC_GPIO_RevA_OutToggle((mxc_gpio_reva_regs_t *)port, mask);
140 }
141
MXC_GPIO_IntConfig(const mxc_gpio_cfg_t * cfg,mxc_gpio_int_pol_t pol)142 int MXC_GPIO_IntConfig(const mxc_gpio_cfg_t *cfg, mxc_gpio_int_pol_t pol)
143 {
144 return MXC_GPIO_RevA_IntConfig(cfg, pol);
145 }
146
MXC_GPIO_EnableInt(mxc_gpio_regs_t * port,uint32_t mask)147 void MXC_GPIO_EnableInt(mxc_gpio_regs_t *port, uint32_t mask)
148 {
149 MXC_GPIO_RevA_EnableInt((mxc_gpio_reva_regs_t *)port, mask);
150 }
151
MXC_GPIO_DisableInt(mxc_gpio_regs_t * port,uint32_t mask)152 void MXC_GPIO_DisableInt(mxc_gpio_regs_t *port, uint32_t mask)
153 {
154 MXC_GPIO_RevA_DisableInt((mxc_gpio_reva_regs_t *)port, mask);
155 }
156
MXC_GPIO_RegisterCallback(const mxc_gpio_cfg_t * cfg,mxc_gpio_callback_fn func,void * cbdata)157 void MXC_GPIO_RegisterCallback(const mxc_gpio_cfg_t *cfg, mxc_gpio_callback_fn func, void *cbdata)
158 {
159 MXC_GPIO_Common_RegisterCallback(cfg, func, cbdata);
160 }
161
MXC_GPIO_Handler(unsigned int port)162 void MXC_GPIO_Handler(unsigned int port)
163 {
164 MXC_GPIO_Common_Handler(port);
165 }
166
MXC_GPIO_ClearFlags(mxc_gpio_regs_t * port,uint32_t flags)167 void MXC_GPIO_ClearFlags(mxc_gpio_regs_t *port, uint32_t flags)
168 {
169 MXC_GPIO_RevA_ClearFlags((mxc_gpio_reva_regs_t *)port, flags);
170 }
171
MXC_GPIO_GetFlags(mxc_gpio_regs_t * port)172 uint32_t MXC_GPIO_GetFlags(mxc_gpio_regs_t *port)
173 {
174 return MXC_GPIO_RevA_GetFlags((mxc_gpio_reva_regs_t *)port);
175 }
176
MXC_GPIO_SetVSSEL(mxc_gpio_regs_t * port,mxc_gpio_vssel_t vssel,uint32_t mask)177 int MXC_GPIO_SetVSSEL(mxc_gpio_regs_t *port, mxc_gpio_vssel_t vssel, uint32_t mask)
178 {
179 return E_NOT_SUPPORTED;
180 }
181
MXC_GPIO_SetWakeEn(mxc_gpio_regs_t * port,uint32_t mask)182 void MXC_GPIO_SetWakeEn(mxc_gpio_regs_t *port, uint32_t mask)
183 {
184 MXC_GPIO_RevA_SetWakeEn((mxc_gpio_reva_regs_t *)port, mask);
185 }
186
MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t * port,uint32_t mask)187 void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask)
188 {
189 MXC_GPIO_RevA_ClearWakeEn((mxc_gpio_reva_regs_t *)port, mask);
190 }
191
MXC_GPIO_GetWakeEn(mxc_gpio_regs_t * port)192 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
193 {
194 return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
195 }
196
MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t * port,mxc_gpio_drvstr_t drvstr,uint32_t mask)197 int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
198 {
199 return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
200 }
201