1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 /* **** Includes **** */
22 #include <stddef.h>
23 #include "mxc_sys.h"
24 #include "mxc_device.h"
25 #include "mxc_assert.h"
26 #include "gpio.h"
27 #include "gpio_reva.h"
28 #include "gpio_common.h"
29
30 /* **** Definitions **** */
31
32 /* **** Globals **** */
33
34 /* **** Functions **** */
MXC_GPIO_Init(uint32_t portmask)35 int MXC_GPIO_Init(uint32_t portmask)
36 {
37 int retval = MXC_GPIO_Common_Init(portmask);
38
39 if (portmask & 0x1) {
40 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO0);
41 }
42
43 return MXC_GPIO_Common_Init(portmask) + retval;
44 }
45
MXC_GPIO_Shutdown(uint32_t portmask)46 int MXC_GPIO_Shutdown(uint32_t portmask)
47 {
48 if (portmask & 0x1) {
49 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_GPIO0);
50 }
51
52 return E_NO_ERROR;
53 }
54
MXC_GPIO_Reset(uint32_t portmask)55 int MXC_GPIO_Reset(uint32_t portmask)
56 {
57 if (portmask & 0x1) {
58 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_GPIO0);
59 }
60
61 return E_NO_ERROR;
62 }
63
MXC_GPIO_Config(const mxc_gpio_cfg_t * cfg)64 int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
65 {
66 int port, error;
67 mxc_gpio_regs_t *gpio = cfg->port;
68
69 port = MXC_GPIO_GET_IDX(cfg->port);
70 MXC_GPIO_Init(1 << port);
71
72 // Configure the vssel
73 error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
74 if (error != E_NO_ERROR) {
75 return error;
76 }
77
78 // Configure alternate function
79 error = MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)gpio, cfg->func, cfg->mask);
80
81 if (error != E_NO_ERROR) {
82 return error;
83 }
84
85 // Configure the pad
86 switch (cfg->pad) {
87 case MXC_GPIO_PAD_NONE:
88 gpio->padctrl0 &= ~cfg->mask;
89 break;
90
91 case MXC_GPIO_PAD_PULL_UP:
92 gpio->padctrl0 |= cfg->mask;
93 gpio->ps |= cfg->mask;
94 break;
95
96 case MXC_GPIO_PAD_PULL_DOWN:
97 gpio->padctrl0 |= cfg->mask;
98 gpio->ps &= ~cfg->mask;
99 break;
100
101 default:
102 return E_BAD_PARAM;
103 }
104
105 // Configure the drive strength
106 if (cfg->func == MXC_GPIO_FUNC_IN) {
107 return E_NO_ERROR;
108 } else {
109 return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
110 }
111 }
112
113 /* ************************************************************************** */
MXC_GPIO_InGet(mxc_gpio_regs_t * port,uint32_t mask)114 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
115 {
116 return MXC_GPIO_RevA_InGet((mxc_gpio_reva_regs_t *)port, mask);
117 }
118
119 /* ************************************************************************** */
MXC_GPIO_OutSet(mxc_gpio_regs_t * port,uint32_t mask)120 void MXC_GPIO_OutSet(mxc_gpio_regs_t *port, uint32_t mask)
121 {
122 MXC_GPIO_RevA_OutSet((mxc_gpio_reva_regs_t *)port, mask);
123 }
124
125 /* ************************************************************************** */
MXC_GPIO_OutClr(mxc_gpio_regs_t * port,uint32_t mask)126 void MXC_GPIO_OutClr(mxc_gpio_regs_t *port, uint32_t mask)
127 {
128 MXC_GPIO_RevA_OutClr((mxc_gpio_reva_regs_t *)port, mask);
129 }
130
131 /* ************************************************************************** */
MXC_GPIO_OutGet(mxc_gpio_regs_t * port,uint32_t mask)132 uint32_t MXC_GPIO_OutGet(mxc_gpio_regs_t *port, uint32_t mask)
133 {
134 return MXC_GPIO_RevA_OutGet((mxc_gpio_reva_regs_t *)port, mask);
135 }
136
137 /* ************************************************************************** */
MXC_GPIO_OutPut(mxc_gpio_regs_t * port,uint32_t mask,uint32_t val)138 void MXC_GPIO_OutPut(mxc_gpio_regs_t *port, uint32_t mask, uint32_t val)
139 {
140 MXC_GPIO_RevA_OutPut((mxc_gpio_reva_regs_t *)port, mask, val);
141 }
142
143 /* ************************************************************************** */
MXC_GPIO_OutToggle(mxc_gpio_regs_t * port,uint32_t mask)144 void MXC_GPIO_OutToggle(mxc_gpio_regs_t *port, uint32_t mask)
145 {
146 MXC_GPIO_RevA_OutToggle((mxc_gpio_reva_regs_t *)port, mask);
147 }
148
149 /* ************************************************************************** */
MXC_GPIO_IntConfig(const mxc_gpio_cfg_t * cfg,mxc_gpio_int_pol_t pol)150 int MXC_GPIO_IntConfig(const mxc_gpio_cfg_t *cfg, mxc_gpio_int_pol_t pol)
151 {
152 return MXC_GPIO_RevA_IntConfig(cfg, pol);
153 }
154
155 /* ************************************************************************** */
MXC_GPIO_EnableInt(mxc_gpio_regs_t * port,uint32_t mask)156 void MXC_GPIO_EnableInt(mxc_gpio_regs_t *port, uint32_t mask)
157 {
158 MXC_GPIO_RevA_EnableInt((mxc_gpio_reva_regs_t *)port, mask);
159 }
160
161 /* ************************************************************************** */
MXC_GPIO_DisableInt(mxc_gpio_regs_t * port,uint32_t mask)162 void MXC_GPIO_DisableInt(mxc_gpio_regs_t *port, uint32_t mask)
163 {
164 MXC_GPIO_RevA_DisableInt((mxc_gpio_reva_regs_t *)port, mask);
165 }
166
167 /* ************************************************************************** */
MXC_GPIO_RegisterCallback(const mxc_gpio_cfg_t * cfg,mxc_gpio_callback_fn func,void * cbdata)168 void MXC_GPIO_RegisterCallback(const mxc_gpio_cfg_t *cfg, mxc_gpio_callback_fn func, void *cbdata)
169 {
170 MXC_GPIO_Common_RegisterCallback(cfg, func, cbdata);
171 }
172
173 /* ************************************************************************** */
MXC_GPIO_Handler(unsigned int port)174 void MXC_GPIO_Handler(unsigned int port)
175 {
176 MXC_GPIO_Common_Handler(port);
177 }
178
179 /* ************************************************************************** */
MXC_GPIO_ClearFlags(mxc_gpio_regs_t * port,uint32_t flags)180 void MXC_GPIO_ClearFlags(mxc_gpio_regs_t *port, uint32_t flags)
181 {
182 MXC_GPIO_RevA_ClearFlags((mxc_gpio_reva_regs_t *)port, flags);
183 }
184
185 /* ************************************************************************** */
MXC_GPIO_GetFlags(mxc_gpio_regs_t * port)186 uint32_t MXC_GPIO_GetFlags(mxc_gpio_regs_t *port)
187 {
188 return MXC_GPIO_RevA_GetFlags((mxc_gpio_reva_regs_t *)port);
189 }
190
191 /* ************************************************************************** */
MXC_GPIO_SetVSSEL(mxc_gpio_regs_t * port,mxc_gpio_vssel_t vssel,uint32_t mask)192 int MXC_GPIO_SetVSSEL(mxc_gpio_regs_t *port, mxc_gpio_vssel_t vssel, uint32_t mask)
193 {
194 return MXC_GPIO_RevA_SetVSSEL((mxc_gpio_reva_regs_t *)port, vssel, mask);
195 }
196
197 /* ************************************************************************** */
MXC_GPIO_SetWakeEn(mxc_gpio_regs_t * port,uint32_t mask)198 void MXC_GPIO_SetWakeEn(mxc_gpio_regs_t *port, uint32_t mask)
199 {
200 MXC_GPIO_RevA_SetWakeEn((mxc_gpio_reva_regs_t *)port, mask);
201 }
202
203 /* ************************************************************************** */
MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t * port,uint32_t mask)204 void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask)
205 {
206 MXC_GPIO_RevA_ClearWakeEn((mxc_gpio_reva_regs_t *)port, mask);
207 }
208
209 /* ************************************************************************** */
MXC_GPIO_GetWakeEn(mxc_gpio_regs_t * port)210 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
211 {
212 return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
213 }
214
215 /* ************************************************************************** */
MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t * port,mxc_gpio_drvstr_t drvstr,uint32_t mask)216 int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
217 {
218 return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
219 }
220