1 /*
2 * Copyright (c) 2009-2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /*
20 * This file is derivative of CMSIS V5.6.0 startup_ARMv81MML.c
21 * Git SHA: b5f0603d6a584d1724d952fd8b0737458b90d62b
22 */
23
24 #include "stm32h5xx.h"
25 /*----------------------------------------------------------------------------
26 Exception / Interrupt Handler Function Prototype
27 *----------------------------------------------------------------------------*/
28 typedef void( *pFunc )( void );
29
30 /*----------------------------------------------------------------------------
31 External References
32 *----------------------------------------------------------------------------*/
33 extern uint32_t __INITIAL_SP;
34 extern uint32_t __STACK_LIMIT;
35
36 extern __NO_RETURN void __PROGRAM_START(void);
37
38
39 /*----------------------------------------------------------------------------
40 Internal References
41 *----------------------------------------------------------------------------*/
42 __NO_RETURN void Reset_Handler (void);
43
44 /*----------------------------------------------------------------------------
45 Exception / Interrupt Handler
46 *----------------------------------------------------------------------------*/
47 #define DEFAULT_IRQ_HANDLER(handler_name) \
48 void handler_name(void); \
49 __WEAK void handler_name(void) { \
50 while(1); \
51 }
52
53 /* Exceptions */
54 DEFAULT_IRQ_HANDLER(NMI_Handler)
55 DEFAULT_IRQ_HANDLER(HardFault_Handler)
56 DEFAULT_IRQ_HANDLER(MemManage_Handler)
57 DEFAULT_IRQ_HANDLER(BusFault_Handler)
58 DEFAULT_IRQ_HANDLER(UsageFault_Handler)
59 DEFAULT_IRQ_HANDLER(SecureFault_Handler)
60 DEFAULT_IRQ_HANDLER(SVC_Handler)
61 DEFAULT_IRQ_HANDLER(DebugMon_Handler)
62 DEFAULT_IRQ_HANDLER(PendSV_Handler)
63 DEFAULT_IRQ_HANDLER(SysTick_Handler)
64
65 DEFAULT_IRQ_HANDLER(WWDG_IRQHandler)
66 DEFAULT_IRQ_HANDLER(PVD_AVD_IRQHandler)
67 DEFAULT_IRQ_HANDLER(RTC_IRQHandler)
68 #if defined(STM32H573xx) || defined (STM32H563xx)
69 DEFAULT_IRQ_HANDLER(RTC_S_IRQHandler)
70 #endif
71 DEFAULT_IRQ_HANDLER(TAMP_IRQHandler)
72 DEFAULT_IRQ_HANDLER(RAMCFG_IRQHandler)
73 DEFAULT_IRQ_HANDLER(FLASH_IRQHandler)
74 #if defined(STM32H573xx) || defined (STM32H563xx)
75 DEFAULT_IRQ_HANDLER(FLASH_S_IRQHandler)
76 #endif
77 DEFAULT_IRQ_HANDLER(GTZC_IRQHandler)
78 DEFAULT_IRQ_HANDLER(RCC_IRQHandler)
79 #if defined(STM32H573xx) || defined (STM32H563xx)
80 DEFAULT_IRQ_HANDLER(RCC_S_IRQHandler)
81 #endif
82 DEFAULT_IRQ_HANDLER(EXTI0_IRQHandler)
83 DEFAULT_IRQ_HANDLER(EXTI1_IRQHandler)
84 DEFAULT_IRQ_HANDLER(EXTI2_IRQHandler)
85 DEFAULT_IRQ_HANDLER(EXTI3_IRQHandler)
86 DEFAULT_IRQ_HANDLER(EXTI4_IRQHandler)
87 DEFAULT_IRQ_HANDLER(EXTI5_IRQHandler)
88 DEFAULT_IRQ_HANDLER(EXTI6_IRQHandler)
89 DEFAULT_IRQ_HANDLER(EXTI7_IRQHandler)
90 DEFAULT_IRQ_HANDLER(EXTI8_IRQHandler)
91 DEFAULT_IRQ_HANDLER(EXTI9_IRQHandler)
92 DEFAULT_IRQ_HANDLER(EXTI10_IRQHandler)
93 DEFAULT_IRQ_HANDLER(EXTI11_IRQHandler)
94 DEFAULT_IRQ_HANDLER(EXTI12_IRQHandler)
95 DEFAULT_IRQ_HANDLER(EXTI13_IRQHandler)
96 DEFAULT_IRQ_HANDLER(EXTI14_IRQHandler)
97 DEFAULT_IRQ_HANDLER(EXTI15_IRQHandler)
98 DEFAULT_IRQ_HANDLER(GPDMA1_Channel0_IRQHandler)
99 DEFAULT_IRQ_HANDLER(GPDMA1_Channel1_IRQHandler)
100 DEFAULT_IRQ_HANDLER(GPDMA1_Channel2_IRQHandler)
101 DEFAULT_IRQ_HANDLER(GPDMA1_Channel3_IRQHandler)
102 DEFAULT_IRQ_HANDLER(GPDMA1_Channel4_IRQHandler)
103 DEFAULT_IRQ_HANDLER(GPDMA1_Channel5_IRQHandler)
104 DEFAULT_IRQ_HANDLER(GPDMA1_Channel6_IRQHandler)
105 DEFAULT_IRQ_HANDLER(GPDMA1_Channel7_IRQHandler)
106 DEFAULT_IRQ_HANDLER(IWDG_IRQHandler)
107 #ifdef STM32H573xx
108 DEFAULT_IRQ_HANDLER(SAES_IRQHandler)
109 #endif
110 DEFAULT_IRQ_HANDLER(ADC1_IRQHandler)
111 DEFAULT_IRQ_HANDLER(DAC1_IRQHandler)
112 DEFAULT_IRQ_HANDLER(FDCAN1_IT0_IRQHandler)
113 DEFAULT_IRQ_HANDLER(FDCAN1_IT1_IRQHandler)
114 DEFAULT_IRQ_HANDLER(TIM1_BRK_IRQHandler)
115 DEFAULT_IRQ_HANDLER(TIM1_UP_IRQHandler)
116 DEFAULT_IRQ_HANDLER(TIM1_TRG_COM_IRQHandler)
117 DEFAULT_IRQ_HANDLER(TIM1_CC_IRQHandler)
118 DEFAULT_IRQ_HANDLER(TIM2_IRQHandler)
119 DEFAULT_IRQ_HANDLER(TIM3_IRQHandler)
120 #if defined(STM32H573xx) || defined (STM32H563xx)
121 DEFAULT_IRQ_HANDLER(TIM4_IRQHandler)
122 DEFAULT_IRQ_HANDLER(TIM5_IRQHandler)
123 #endif
124 DEFAULT_IRQ_HANDLER(TIM6_IRQHandler)
125 DEFAULT_IRQ_HANDLER(TIM7_IRQHandler)
126 DEFAULT_IRQ_HANDLER(I2C1_EV_IRQHandler)
127 DEFAULT_IRQ_HANDLER(I2C1_ER_IRQHandler)
128 DEFAULT_IRQ_HANDLER(I2C2_EV_IRQHandler)
129 DEFAULT_IRQ_HANDLER(I2C2_ER_IRQHandler)
130 DEFAULT_IRQ_HANDLER(SPI1_IRQHandler)
131 DEFAULT_IRQ_HANDLER(SPI2_IRQHandler)
132 DEFAULT_IRQ_HANDLER(SPI3_IRQHandler)
133 DEFAULT_IRQ_HANDLER(USART1_IRQHandler)
134 DEFAULT_IRQ_HANDLER(USART2_IRQHandler)
135 DEFAULT_IRQ_HANDLER(USART3_IRQHandler)
136 #if defined(STM32H573xx) || defined (STM32H563xx)
137 DEFAULT_IRQ_HANDLER(UART4_IRQHandler)
138 DEFAULT_IRQ_HANDLER(UART5_IRQHandler)
139 #endif
140 DEFAULT_IRQ_HANDLER(LPUART1_IRQHandler)
141 DEFAULT_IRQ_HANDLER(LPTIM1_IRQHandler)
142 #if defined(STM32H573xx) || defined (STM32H563xx)
143 DEFAULT_IRQ_HANDLER(TIM8_BRK_IRQHandler)
144 DEFAULT_IRQ_HANDLER(TIM8_UP_IRQHandler)
145 DEFAULT_IRQ_HANDLER(TIM8_TRG_COM_IRQHandler)
146 DEFAULT_IRQ_HANDLER(TIM8_CC_IRQHandler)
147 DEFAULT_IRQ_HANDLER(ADC2_IRQHandler)
148 #endif
149 DEFAULT_IRQ_HANDLER(LPTIM2_IRQHandler)
150 #if defined(STM32H573xx) || defined (STM32H563xx)
151 DEFAULT_IRQ_HANDLER(TIM15_IRQHandler)
152 DEFAULT_IRQ_HANDLER(TIM16_IRQHandler)
153 DEFAULT_IRQ_HANDLER(TIM17_IRQHandler)
154 #endif
155 DEFAULT_IRQ_HANDLER(OTG_FS_IRQHandler)
156 DEFAULT_IRQ_HANDLER(CRS_IRQHandler)
157 #if defined(STM32H573xx) || defined (STM32H563xx)
158 DEFAULT_IRQ_HANDLER(UCPD1_IRQHandler)
159 DEFAULT_IRQ_HANDLER(FMC_IRQHandler)
160 DEFAULT_IRQ_HANDLER(OCTOSPI1_IRQHandler)
161 DEFAULT_IRQ_HANDLER(SDMMC1_IRQHandler)
162 DEFAULT_IRQ_HANDLER(I2C3_EV_IRQHandler)
163 DEFAULT_IRQ_HANDLER(I2C3_ER_IRQHandler)
164 DEFAULT_IRQ_HANDLER(SPI4_IRQHandler)
165 DEFAULT_IRQ_HANDLER(SPI5_IRQHandler)
166 DEFAULT_IRQ_HANDLER(SPI6_IRQHandler)
167 DEFAULT_IRQ_HANDLER(USART6_IRQHandler)
168 DEFAULT_IRQ_HANDLER(USART10_IRQHandler)
169 DEFAULT_IRQ_HANDLER(USART11_IRQHandler)
170 DEFAULT_IRQ_HANDLER(SAI1_IRQHandler)
171 DEFAULT_IRQ_HANDLER(SAI2_IRQHandler)
172 #endif
173 DEFAULT_IRQ_HANDLER(GPDMA2_Channel0_IRQHandler)
174 DEFAULT_IRQ_HANDLER(GPDMA2_Channel1_IRQHandler)
175 DEFAULT_IRQ_HANDLER(GPDMA2_Channel2_IRQHandler)
176 DEFAULT_IRQ_HANDLER(GPDMA2_Channel3_IRQHandler)
177 DEFAULT_IRQ_HANDLER(GPDMA2_Channel4_IRQHandler)
178 DEFAULT_IRQ_HANDLER(GPDMA2_Channel5_IRQHandler)
179 DEFAULT_IRQ_HANDLER(GPDMA2_Channel6_IRQHandler)
180 DEFAULT_IRQ_HANDLER(GPDMA2_Channel7_IRQHandler)
181 #if defined(STM32H573xx) || defined (STM32H563xx)
182 DEFAULT_IRQ_HANDLER(UART7_IRQHandler)
183 DEFAULT_IRQ_HANDLER(UART8_IRQHandler)
184 DEFAULT_IRQ_HANDLER(UART9_IRQHandler)
185 DEFAULT_IRQ_HANDLER(UART12_IRQHandler)
186 DEFAULT_IRQ_HANDLER(SDMMC2_IRQHandler)
187 #else
188 DEFAULT_IRQ_HANDLER(COMP1_IRQHandler)
189 DEFAULT_IRQ_HANDLER(I3C2_EV_IRQHandler)
190 DEFAULT_IRQ_HANDLER(I3C2_ER_IRQHandler)
191 #endif
192 DEFAULT_IRQ_HANDLER(FPU_IRQHandler)
193 DEFAULT_IRQ_HANDLER(ICACHE_IRQHandler)
194 #if defined(STM32H573xx) || defined (STM32H563xx)
195 DEFAULT_IRQ_HANDLER(DCACHE_IRQHandler)
196 DEFAULT_IRQ_HANDLER(ETH_IRQHandler)
197 DEFAULT_IRQ_HANDLER(ETH_WKUP_IRQHandler)
198 DEFAULT_IRQ_HANDLER(DCMI_PSSI_IRQHandler)
199 DEFAULT_IRQ_HANDLER(FDCAN2_IT0_IRQHandler)
200 DEFAULT_IRQ_HANDLER(FDCAN2_IT1_IRQHandler)
201 DEFAULT_IRQ_HANDLER(CORDIC_IRQHandler)
202 DEFAULT_IRQ_HANDLER(FMAC_IRQHandler)
203 #endif
204 DEFAULT_IRQ_HANDLER(DTS_IRQHandler)
205 DEFAULT_IRQ_HANDLER(RNG_IRQHandler)
206 #ifdef STM32H573xx
207 DEFAULT_IRQ_HANDLER(OTFDEC1_IRQHandler)
208 DEFAULT_IRQ_HANDLER(AES_IRQHandler)
209 #endif
210 DEFAULT_IRQ_HANDLER(HASH_IRQHandler)
211 #ifdef STM32H573xx
212 DEFAULT_IRQ_HANDLER(PKA_IRQHandler)
213 #endif
214 #if defined(STM32H573xx) || defined (STM32H563xx)
215 DEFAULT_IRQ_HANDLER(CEC_IRQHandler)
216 DEFAULT_IRQ_HANDLER(TIM12_IRQHandler)
217 DEFAULT_IRQ_HANDLER(TIM13_IRQHandler)
218 DEFAULT_IRQ_HANDLER(TIM14_IRQHandler)
219 #endif
220 DEFAULT_IRQ_HANDLER(I3C1_EV_IRQHandler)
221 DEFAULT_IRQ_HANDLER(I3C1_ER_IRQHandler)
222 #if defined(STM32H573xx) || defined (STM32H563xx)
223 DEFAULT_IRQ_HANDLER(I2C4_EV_IRQHandler)
224 DEFAULT_IRQ_HANDLER(I2C4_ER_IRQHandler)
225 DEFAULT_IRQ_HANDLER(LPTIM3_IRQHandler)
226 DEFAULT_IRQ_HANDLER(LPTIM4_IRQHandler)
227 DEFAULT_IRQ_HANDLER(LPTIM5_IRQHandler)
228 DEFAULT_IRQ_HANDLER(LPTIM6_IRQHandler)
229 #endif
230
231 /*----------------------------------------------------------------------------
232 Exception / Interrupt Vector table
233 *----------------------------------------------------------------------------*/
234
235 #if defined ( __GNUC__ )
236 #pragma GCC diagnostic push
237 #pragma GCC diagnostic ignored "-Wpedantic"
238 #endif
239
240 extern const pFunc __VECTOR_TABLE[];
241 const pFunc __VECTOR_TABLE[] __VECTOR_TABLE_ATTRIBUTE = {
242 (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */
243 Reset_Handler, /* Reset Handler */
244 NMI_Handler, /* -14: NMI Handler */
245 HardFault_Handler, /* -13: Hard Fault Handler */
246 MemManage_Handler, /* -12: MPU Fault Handler */
247 BusFault_Handler, /* -11: Bus Fault Handler */
248 UsageFault_Handler, /* -10: Usage Fault Handler */
249 SecureFault_Handler, /* -9: Secure Fault Handler */
250 0, /* Reserved */
251 0, /* Reserved */
252 0, /* Reserved */
253 SVC_Handler, /* -5: SVCall Handler */
254 DebugMon_Handler, /* -4: Debug Monitor Handler */
255 0, /* Reserved */
256 PendSV_Handler, /* -2: PendSV Handler */
257 SysTick_Handler, /* -1: SysTick Handler */
258 WWDG_IRQHandler, /* 0: Window WatchDog */
259 PVD_AVD_IRQHandler, /* 1: PVD/AVD through EXTI Line detection Interrupt */
260 RTC_IRQHandler, /* 2: RTC non-secure interrupt */
261 #if defined(STM32H573xx) || defined (STM32H563xx)
262 RTC_S_IRQHandler, /* 3: RTC secure interrupt */
263 #else
264 0, /* 3: Reserved */
265 #endif
266 TAMP_IRQHandler, /* 4: Tamper non-secure interrupt */
267 RAMCFG_IRQHandler, /* 5: RAMCFG global */
268 FLASH_IRQHandler, /* 6: FLASH non-secure global interrupt */
269 #if defined(STM32H573xx) || defined (STM32H563xx)
270 FLASH_S_IRQHandler, /* 7: FLASH secure global interrupt */
271 #else
272 0, /* 7: Reserved */
273 #endif
274 GTZC_IRQHandler, /* 8: Global TrustZone Controller interrupt */
275 RCC_IRQHandler, /* 9: RCC non-secure global interrupt */
276 #if defined(STM32H573xx) || defined (STM32H563xx)
277 RCC_S_IRQHandler, /* 10: RCC secure global interrupt */
278 #else
279 0, /* 10: Reserved */
280 #endif
281 EXTI0_IRQHandler, /* 11: EXTI Line0 interrupt */
282 EXTI1_IRQHandler, /* 12: EXTI Line1 interrupt */
283 EXTI2_IRQHandler, /* 13: EXTI Line2 interrupt */
284 EXTI3_IRQHandler, /* 14: EXTI Line3 interrupt */
285 EXTI4_IRQHandler, /* 15: EXTI Line4 interrupt */
286 EXTI5_IRQHandler, /* 16: EXTI Line5 interrupt */
287 EXTI6_IRQHandler, /* 17: EXTI Line6 interrupt */
288 EXTI7_IRQHandler, /* 18: EXTI Line7 interrupt */
289 EXTI8_IRQHandler, /* 19: EXTI Line8 interrupt */
290 EXTI9_IRQHandler, /* 20: EXTI Line9 interrupt */
291 EXTI10_IRQHandler, /* 21: EXTI Line10 interrupt */
292 EXTI11_IRQHandler, /* 22: EXTI Line11 interrupt */
293 EXTI12_IRQHandler, /* 23: EXTI Line12 interrupt */
294 EXTI13_IRQHandler, /* 24: EXTI Line13 interrupt */
295 EXTI14_IRQHandler, /* 25: EXTI Line14 interrupt */
296 EXTI15_IRQHandler, /* 26: EXTI Line15 interrupt */
297 GPDMA1_Channel0_IRQHandler, /* 27: GPDMA1 Channel 0 global interrupt */
298 GPDMA1_Channel1_IRQHandler, /* 28: GPDMA1 Channel 1 global interrupt */
299 GPDMA1_Channel2_IRQHandler, /* 29: GPDMA1 Channel 2 global interrupt */
300 GPDMA1_Channel3_IRQHandler, /* 30: GPDMA1 Channel 3 global interrupt */
301 GPDMA1_Channel4_IRQHandler, /* 31: GPDMA1 Channel 4 global interrupt */
302 GPDMA1_Channel5_IRQHandler, /* 32: GPDMA1 Channel 5 global interrupt */
303 GPDMA1_Channel6_IRQHandler, /* 33: GPDMA1 Channel 6 global interrupt */
304 GPDMA1_Channel7_IRQHandler, /* 34: GPDMA1 Channel 7 global interrupt */
305 IWDG_IRQHandler, /* 35: IWDG global interrupt */
306 #ifdef STM32H573xx
307 SAES_IRQHandler, /* 36: SAES global interrupt */
308 #else
309 0, /* 36: Reserved */
310 #endif
311 ADC1_IRQHandler, /* 37: ADC1 global interrupt */
312 DAC1_IRQHandler, /* 38: DAC1 global interrupt */
313 FDCAN1_IT0_IRQHandler, /* 39: FDCAN1 Interrupt 0 */
314 FDCAN1_IT1_IRQHandler, /* 40: FDCAN1 Interrupt 1 */
315 TIM1_BRK_IRQHandler, /* 41: TIM1 Break interrupt */
316 TIM1_UP_IRQHandler, /* 42: TIM1 Update interrupt */
317 TIM1_TRG_COM_IRQHandler, /* 43: TIM1 Trigger and Commutation interrupt */
318 TIM1_CC_IRQHandler, /* 44: TIM1 Capture Compare interrupt */
319 TIM2_IRQHandler, /* 45: TIM2 global interrupt */
320 TIM3_IRQHandler, /* 46: TIM3 global interrupt */
321 #if defined(STM32H573xx) || defined (STM32H563xx)
322 TIM4_IRQHandler, /* 47: TIM4 global interrupt */
323 TIM5_IRQHandler, /* 48: TIM5 global interrupt */
324 #else
325 0, /* 47: Reserved */
326 0, /* 48: Reserved */
327 #endif
328 TIM6_IRQHandler, /* 49: TIM6 global interrupt */
329 TIM7_IRQHandler, /* 50: TIM7 global interrupt */
330 I2C1_EV_IRQHandler, /* 51: I2C1 event interrupt */
331 I2C1_ER_IRQHandler, /* 52: I2C1 error interrupt */
332 I2C2_EV_IRQHandler, /* 53: I2C2 event interrupt */
333 I2C2_ER_IRQHandler, /* 54: I2C2 error interrupt */
334 SPI1_IRQHandler, /* 55: SPI1 global interrupt */
335 SPI2_IRQHandler, /* 56: SPI2 global interrupt */
336 SPI3_IRQHandler, /* 57: SPI3 global interrupt */
337 USART1_IRQHandler, /* 58: USART1 global interrupt */
338 USART2_IRQHandler, /* 59: USART2 global interrupt */
339 USART3_IRQHandler, /* 60: USART3 global interrupt */
340 #if defined(STM32H573xx) || defined (STM32H563xx)
341 UART4_IRQHandler, /* 61: UART4 global interrupt */
342 UART5_IRQHandler, /* 62: UART5 global interrupt */
343 #else
344 0, /* 61: Reserved */
345 0, /* 62: Reserved */
346 #endif
347 LPUART1_IRQHandler, /* 63: LPUART1 global interrupt */
348 LPTIM1_IRQHandler, /* 64: LPTIM1 global interrupt */
349 #if defined(STM32H573xx) || defined (STM32H563xx)
350 TIM8_BRK_IRQHandler, /* 65: TIM8 Break interrupt */
351 TIM8_UP_IRQHandler, /* 66: TIM8 Update interrupt */
352 TIM8_TRG_COM_IRQHandler, /* 67: TIM8 Trigger and Commutation interrupt */
353 TIM8_CC_IRQHandler, /* 68: TIM8 Capture Compare interrupt */
354 ADC2_IRQHandler, /* 69: ADC2 global interrupt */
355 #else
356 0, /* 65: Reserved */
357 0, /* 66: Reserved */
358 0, /* 67: Reserved */
359 0, /* 68: Reserved */
360 0, /* 69: Reserved */
361 #endif
362 LPTIM2_IRQHandler, /* 70: LPTIM2 global interrupt */
363 #if defined(STM32H573xx) || defined (STM32H563xx)
364 TIM15_IRQHandler, /* 71: TIM15 global interrupt */
365 TIM16_IRQHandler, /* 72: TIM16 global interrupt */
366 TIM17_IRQHandler, /* 73: TIM17 global interrupt */
367 #else
368 0, /* 71: Reserved */
369 0, /* 72: Reserved */
370 0, /* 73: Reserved */
371 #endif
372 OTG_FS_IRQHandler, /* 74: USB OTG FS global interrupt */
373 CRS_IRQHandler, /* 75: CRS global interrupt */
374 #if defined(STM32H573xx) || defined (STM32H563xx)
375 UCPD1_IRQHandler, /* 76: UCPD1 global interrupt */
376 FMC_IRQHandler, /* 77: FMC global interrupt */
377 OCTOSPI1_IRQHandler, /* 78: OctoSPI1 global interrupt */
378 SDMMC1_IRQHandler, /* 79: SDMMC1 global interrupt */
379 I2C3_EV_IRQHandler, /* 80: I2C3 event interrupt */
380 I2C3_ER_IRQHandler, /* 81: I2C3 error interrupt */
381 SPI4_IRQHandler, /* 82: SPI4 global interrupt */
382 SPI5_IRQHandler, /* 83: SPI5 global interrupt */
383 SPI6_IRQHandler, /* 84: SPI6 global interrupt */
384 USART6_IRQHandler, /* 85: USART6 global interrupt */
385 USART10_IRQHandler, /* 86: USART10 global interrupt */
386 USART11_IRQHandler, /* 87: USART11 global interrupt */
387 SAI1_IRQHandler, /* 88: Serial Audio Interface 1 global interrupt */
388 SAI2_IRQHandler, /* 89: Serial Audio Interface 2 global interrupt */
389 #else
390 0, /* 76: Reserved */
391 0, /* 77: Reserved */
392 0, /* 78: Reserved */
393 0, /* 79: Reserved */
394 0, /* 80: Reserved */
395 0, /* 81: Reserved */
396 0, /* 82: Reserved */
397 0, /* 83: Reserved */
398 0, /* 84: Reserved */
399 0, /* 85: Reserved */
400 0, /* 86: Reserved */
401 0, /* 87: Reserved */
402 0, /* 88: Reserved */
403 0, /* 89: Reserved */
404 #endif
405 GPDMA2_Channel0_IRQHandler, /* 90: GPDMA2 Channel 0 global interrupt */
406 GPDMA2_Channel1_IRQHandler, /* 91: GPDMA2 Channel 1 global interrupt */
407 GPDMA2_Channel2_IRQHandler, /* 92: GPDMA2 Channel 2 global interrupt */
408 GPDMA2_Channel3_IRQHandler, /* 93: GPDMA2 Channel 3 global interrupt */
409 GPDMA2_Channel4_IRQHandler, /* 94: GPDMA2 Channel 4 global interrupt */
410 GPDMA2_Channel5_IRQHandler, /* 95: GPDMA2 Channel 5 global interrupt */
411 GPDMA2_Channel6_IRQHandler, /* 96: GPDMA2 Channel 6 global interrupt */
412 GPDMA2_Channel7_IRQHandler, /* 97: GPDMA2 Channel 7 global interrupt */
413 #if defined(STM32H573xx) || defined (STM32H563xx)
414 UART7_IRQHandler, /* 98: UART7 global interrupt */
415 UART8_IRQHandler, /* 99: UART8 global interrupt */
416 UART9_IRQHandler, /* 100: UART9 global interrupt */
417 UART12_IRQHandler, /* 101: UART12 global interrupt */
418 SDMMC2_IRQHandler, /* 102: SDMMC2 global interrupt */
419 #else
420 COMP1_IRQHandler, /* 98: COMP1 global interrupt */
421 0, /* 99: Reserved */
422 I3C2_EV_IRQHandler, /* 100: I2C3 event interrupt */
423 I3C2_ER_IRQHandler, /* 101: I2C3 error interrupt */
424 0, /* 102: Reserved */
425 #endif
426 FPU_IRQHandler, /* 103: FPU global interrupt */
427 ICACHE_IRQHandler, /* 104: Instruction cache global interrupt */
428 #if defined(STM32H573xx) || defined (STM32H563xx)
429 DCACHE_IRQHandler, /* 105: Data cache global interrupt */
430 ETH_IRQHandler, /* 106: Ethernet global interrupt */
431 ETH_WKUP_IRQHandler, /* 107: Ethernet Wakeup global interrupt */
432 DCMI_PSSI_IRQHandler, /* 108: DCMI PSSI global interrupt */
433 FDCAN2_IT0_IRQHandler, /* 109: FDCAN2 Interrupt 0 */
434 FDCAN2_IT1_IRQHandler, /* 110: FDCAN2 Interrupt 1 */
435 CORDIC_IRQHandler, /* 111: CORDIC global interrupt */
436 FMAC_IRQHandler, /* 112: FMAC global interrupt */
437 #else
438 0, /* 105: Reserved */
439 0, /* 106: Reserved */
440 0, /* 107: Reserved */
441 0, /* 108: Reserved */
442 0, /* 109: Reserved */
443 0, /* 110: Reserved */
444 0, /* 111: Reserved */
445 0, /* 112: Reserved */
446 #endif
447 DTS_IRQHandler, /* 113: DTS global interrupt */
448 RNG_IRQHandler, /* 114: RNG global interrupt */
449 #ifdef STM32H573xx
450 OTFDEC1_IRQHandler, /* 115: OTFDEC1 global interrupt */
451 AES_IRQHandler, /* 116: AES global interrupt */
452 #else
453 0, /* 115: Reserved */
454 0, /* 116: Reserved */
455 #endif
456 HASH_IRQHandler, /* 117: HASH global interrupt */
457 #ifdef STM32H573xx
458 PKA_IRQHandler, /* 118: PKA global interrupt */
459 #else
460 0, /* 118: Reserved */
461 #endif
462 #if defined(STM32H573xx) || defined (STM32H563xx)
463 CEC_IRQHandler, /* 119: CEC global interrupt */
464 TIM12_IRQHandler, /* 120: TIM12 global interrupt */
465 TIM13_IRQHandler, /* 121: TIM13 global interrupt */
466 TIM14_IRQHandler, /* 122: TIM14 global interrupt */
467 #else
468 0, /* 119: Reserved */
469 0, /* 120: Reserved */
470 0, /* 121: Reserved */
471 0, /* 122: Reserved */
472 #endif
473 I3C1_EV_IRQHandler, /* 123: I3C1 event interrupt */
474 I3C1_ER_IRQHandler, /* 124: I3C1 error interrupt */
475 #if defined(STM32H573xx) || defined (STM32H563xx)
476 I2C4_EV_IRQHandler, /* 125: I2C4 event interrupt */
477 I2C4_ER_IRQHandler, /* 126: I2C4 error interrupt */
478 LPTIM3_IRQHandler, /* 127: LPTIM3 global interrupt */
479 LPTIM4_IRQHandler, /* 128: LPTIM4 global interrupt */
480 LPTIM5_IRQHandler, /* 129: LPTIM5 global interrupt */
481 LPTIM6_IRQHandler, /* 130: LPTIM6 global interrupt */
482 #else
483 0, /* 125: Reserved */
484 0, /* 126: Reserved */
485 0, /* 127: Reserved */
486 0, /* 128: Reserved */
487 0, /* 129: Reserved */
488 0, /* 130: Reserved */
489 #endif
490 };
491
492 #if defined ( __GNUC__ )
493 #pragma GCC diagnostic pop
494 #endif
495
496 /*----------------------------------------------------------------------------
497 Reset Handler called on controller reset
498 *----------------------------------------------------------------------------*/
Reset_Handler(void)499 void Reset_Handler(void)
500 {
501 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
502 __IO uint32_t tmp;
503
504 #endif
505 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
506 /* disable IRQ is removed */
507 /*__disable_irq();*/
508 /* Tamp IRQ prio is set to highest , and IRQ is enabled */
509 NVIC_SetPriority(TAMP_IRQn, 0);
510 NVIC_EnableIRQ(TAMP_IRQn);
511 #endif
512 __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
513 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
514 SCB->VTOR = (uint32_t) &__VECTOR_TABLE[0];
515 /* Lock Secure Vector Table */
516 /* Enable SBS interface clock */
517 RCC->APB3ENR |= RCC_APB3ENR_SBSEN;
518 /* Delay after an RCC peripheral clock enabling */
519 tmp = RCC->APB3ENR;
520 (void)tmp;
521 SBS->CSLCKR |= SBS_CSLCKR_LOCKSVTAIRCR;
522 #endif
523 /* CMSIS System Initialization */
524 SystemInit();
525 __PROGRAM_START(); /* Enter PreMain (C library entry point) */
526 }
527
