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/hal_atmel-2.7.6/asf/common/components/wifi/winc1500/socket/include/
D	socket.h	13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 84 command value. Used with the setsockopt function. 90 Maximum allowed size for a socket data buffer. Used with @ref send socket 96 …The AF_INET is the address family used for IPv4. An IPv4 transport address is specified with the @… 137 Used with the @ref setsockopt function 143 Used with the @ref setsockopt function 150 Used with the @ref setsockopt function. 156 Used with the @ref setsockopt function. 163 Used with the @ref setsockopt function. [all …]
/hal_atmel-2.7.6/asf/common/components/wifi/winc1500/spi_flash/source/
D	spi_flash.c	13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 91 * @note Compatible with MX25L6465E 125 * @note Compatible with MX25L6465E 156 * @note Compatible with MX25L6465E 186 * @note Compatible with MX25L6465E 224 * @note Compatible with MX25L6465E and should be working with other types 262 * @note Compatible with MX25L6465E and should be working with other types 296 * @note Compatible with MX25L6465E and should be working with other types 326 * @note Compatible with MX25L6465E and should be working with other types [all …]
/hal_atmel-2.7.6/asf/sam/include/sam3x/component/
D	tc.h	9 /* Redistribution and use in source and binary forms, with or without / 91 #define TC_CMR_BURST_XC0 (0x1u << 4) /< \brief (TC_CMR) XC0 is ANDed with the selected clock. / 92 #define TC_CMR_BURST_XC1 (0x2u << 4) /*< \brief (TC_CMR) XC1 is ANDed with the selected clock. / 93 #define TC_CMR_BURST_XC2 (0x3u << 4) /*< \brief (TC_CMR) XC2 is ANDed with the selected clock. / 94 #define TC_CMR_LDBSTOP (0x1u << 6) /*< \brief (TC_CMR) Counter Clock Stopped with RB Loading / 95 #define TC_CMR_LDBDIS (0x1u << 7) /*< \brief (TC_CMR) Counter Clock Disable with RB Loading / 117 #define TC_CMR_CPCSTOP (0x1u << 6) /*< \brief (TC_CMR) Counter Clock Stopped with RC Compare / 118 #define TC_CMR_CPCDIS (0x1u << 7) /*< \brief (TC_CMR) Counter Clock Disable with RC Compare / 136 #define TC_CMR_WAVSEL_UP_RC (0x2u << 13) /< \brief (TC_CMR) UP mode with automatic trigger on R… 137 #define TC_CMR_WAVSEL_UPDOWN_RC (0x3u << 13) /< \brief (TC_CMR) UPDOWN mode with automatic trig… [all …]
/hal_atmel-2.7.6/asf/sam/include/sam4s/component/
D	tc.h	9 /* Redistribution and use in source and binary forms, with or without / 92 #define TC_CMR_BURST_XC0 (0x1u << 4) /< \brief (TC_CMR) XC0 is ANDed with the selected clock. / 93 #define TC_CMR_BURST_XC1 (0x2u << 4) /*< \brief (TC_CMR) XC1 is ANDed with the selected clock. / 94 #define TC_CMR_BURST_XC2 (0x3u << 4) /*< \brief (TC_CMR) XC2 is ANDed with the selected clock. / 95 #define TC_CMR_LDBSTOP (0x1u << 6) /*< \brief (TC_CMR) Counter Clock Stopped with RB Loading / 96 #define TC_CMR_LDBDIS (0x1u << 7) /*< \brief (TC_CMR) Counter Clock Disable with RB Loading / 121 #define TC_CMR_CPCSTOP (0x1u << 6) /*< \brief (TC_CMR) Counter Clock Stopped with RC Compare / 122 #define TC_CMR_CPCDIS (0x1u << 7) /*< \brief (TC_CMR) Counter Clock Disable with RC Compare / 143 #define TC_CMR_WAVSEL_UP_RC (0x2u << 13) /< \brief (TC_CMR) UP mode with automatic trigger on R… 144 #define TC_CMR_WAVSEL_UPDOWN_RC (0x3u << 13) /< \brief (TC_CMR) UPDOWN mode with automatic trig… [all …]
/hal_atmel-2.7.6/asf/common/components/wifi/winc1500/driver/include/
D	m2m_ota.h	13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 204 …Calling this API does not guarantee OTA WINC image update, It depends on the connection with the d… 293 …t guarantee cortus application image update, It depends on the connection with the download server… 310 …If the API response is success, system restart is required (re-initialize the driver with hardware… 332 …If the API response is success, system restart is required (re-initialize the driver with hardware… 354 If no download is in progress, the API will respond with failure. 378 … the API succeeds, system restart is required (re-initializing the driver with hardware reset) upd… 401 … the API succeeds, system restart is required (re-initializing the driver with hardware reset) upd…
D	m2m_types.h	13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 212 an AP secured with WPA-Enterprise. 219 an AP secured with WPA-Enterprise. 449 /!< Indicate that the WINC board has failed to authenticate with the AP. 452 /!< Indicate that the WINC board has failed to associate with the AP. 622 Response to M2M_WIFI_REQ_CURRENT_RSSI with the RSSI value. 629 /!< Connect with default AP response. 722 /!< Request scan with list of hidden SSID plus the broadcast scan. 742 /*!< Connect with AP command. [all …]
D	m2m_wifi.h	13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 672 …t" function call. Every function call of "nm_wifi_init" should be matched with a call to nm_wifi_d… 715 * Asynchronous API that notifies the WINC with the Certificate Revocation List to be used for TLS. 724 Asynchronous API that notifies the WINC with the Certificate Revocation List. 922 …The function triggers the WINC to activate the Wi-Fi AP (HOTSPOT) mode with the passed configurati… 1070 with [M2M_WIFI_RESP_CONN_INFO](@ref M2M_WIFI_RESP_CONN_INFO). 1159 …This function override the already assigned MAC address of the WINC board with a user provided one… 1175 * with the event @ref M2M_WIFI_REQ_WPS. 1400 * The WINC supports AP mode operation with the following limitations: [all …]
D	m2m_ate_mode.h	13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 189 …cates that DPD values will be set dynamically from a lookup table pre-set with the DPD coefficents. 272 …@brief Available channels for TX and RX in the 2.4GHz spectrum starting at 2412MHz with a 5MHz ba… 416 …/!< Flag set to enable or disable reception with destination address as a filter. Using the follo… 420 …/*!< Flag set to enable or disable reception with source address as a filter.Using the following f… 459 This function is used to download and start the ATE firmware with an initialization value 550 …Type of \ref tstrM2mAteTx, with the values required to enable TX test case. Application must use \… 594 …Type of \ref tstrM2mAteRx, with the values required to enable RX test case. Application must use \…
/hal_atmel-2.7.6/asf/common/components/wifi/winc1500/bsp/include/
D	nm_bsp.h	13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 148 * enable WINC and Host Driver to communicate with each other. 158 …* calls will return with failure. This function should also be called after the WINC has been … 185 …* be matched with a call to nm_bsp_deinit. Failure to do so may result in the WINC consuming h… 209 …* WINC firmware after the BSP is initialized and before the start of any communication with WI… 257 …* WINC board utilize SPI interface to communicate with the host. This function register the SP…
/hal_atmel-2.7.6/asf/sam/include/sam4e/component/
D	tc.h	9 /* Redistribution and use in source and binary forms, with or without / 107 #define TC_CMR_BURST_XC0 (0x1u << 4) /< \brief (TC_CMR) XC0 is ANDed with the selected clock. / 108 #define TC_CMR_BURST_XC1 (0x2u << 4) /*< \brief (TC_CMR) XC1 is ANDed with the selected clock. / 109 #define TC_CMR_BURST_XC2 (0x3u << 4) /*< \brief (TC_CMR) XC2 is ANDed with the selected clock. / 110 #define TC_CMR_LDBSTOP (0x1u << 6) /*< \brief (TC_CMR) Counter Clock Stopped with RB Loading / 111 #define TC_CMR_LDBDIS (0x1u << 7) /*< \brief (TC_CMR) Counter Clock Disable with RB Loading / 140 #define TC_CMR_CPCSTOP (0x1u << 6) /*< \brief (TC_CMR) Counter Clock Stopped with RC Compare / 141 #define TC_CMR_CPCDIS (0x1u << 7) /*< \brief (TC_CMR) Counter Clock Disable with RC Compare / 159 #define TC_CMR_WAVSEL_UP_RC (0x2u << 13) /< \brief (TC_CMR) UP mode with automatic trigger on R… 160 #define TC_CMR_WAVSEL_UPDOWN_RC (0x3u << 13) /< \brief (TC_CMR) UPDOWN mode with automatic trig… [all …]
/hal_atmel-2.7.6/asf/common/components/wifi/winc1500/spi_flash/include/
D	spi_flash.h	`13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 44 * @brief This file describe SPI flash APIs, how to use it and limitations with each one. 132 * @brief Returns with \ref uint32 value which is total flash size\n 147 …* Pointer to data buffer which will fill in with data in case of successful operat… 182 * by reading data again and compare it with the original.`
D	spi_flash_map.h	`13 * Redistribution and use in source and binary forms, with or without 21 * and/or other materials provided with the distribution. 103 * \| 28 K \| 8 K \| HTTP Files \| Files used with Provisioning Mode \| 111 * *Keys for Comments with each MACRO:`
/hal_atmel-2.7.6/asf/sam/include/sam4l/component/
D	tc.h	14 * you may not use this file except in compliance with the License. 84 uint32_t LDBSTOP:1; /!< bit: 6 Counter Clock Stopped with RB Loading / 85 uint32_t LDBDIS:1; /!< bit: 7 Counter Clock Disable with RB Loading / 99 uint32_t CPCSTOP:1; /!< bit: 6 Counter Clock Stopped with RC Compare / 100 uint32_t CPCDIS:1; /!< bit: 7 Counter Clock Disable with RC Compare / 152 …URST_CLK_AND_XC0_Val _U_(0x1) /< \brief (TC_CMR_CAPTURE) XC0 is ANDed with the selected clock.… 153 …URST_CLK_AND_XC1_Val _U_(0x2) /< \brief (TC_CMR_CAPTURE) XC1 is ANDed with the selected clock.… 154 …URST_CLK_AND_XC2_Val _U_(0x3) /< \brief (TC_CMR_CAPTURE) XC2 is ANDed with the selected clock.… 159 …URE_LDBSTOP_Pos 6 /< \brief (TC_CMR_CAPTURE) Counter Clock Stopped with RB Loading / 165 …URE_LDBDIS_Pos 7 /< \brief (TC_CMR_CAPTURE) Counter Clock Disable with RB Loading / [all …]
/hal_atmel-2.7.6/asf/sam0/include/samd20/component/
D	sercom.h	15 * not use this file except in compliance with the License. 74 …MODE_USART_EXT_CLK_Val _U_(0x0) /*< \brief (SERCOM_I2CM_CTRLA) USART mode with external clock / 75 …MODE_USART_INT_CLK_Val _U_(0x1) /*< \brief (SERCOM_I2CM_CTRLA) USART mode with internal clock / 76 …CTRLA_MODE_SPI_SLAVE_Val _U_(0x2) /*< \brief (SERCOM_I2CM_CTRLA) SPI mode with external clock / 77 …TRLA_MODE_SPI_MASTER_Val _U_(0x3) /*< \brief (SERCOM_I2CM_CTRLA) SPI mode with internal clock / 78 …CTRLA_MODE_I2C_SLAVE_Val _U_(0x4) /*< \brief (SERCOM_I2CM_CTRLA) I2C mode with external clock / 79 …TRLA_MODE_I2C_MASTER_Val _U_(0x5) /*< \brief (SERCOM_I2CM_CTRLA) I2C mode with internal clock / 131 …MODE_USART_EXT_CLK_Val _U_(0x0) /*< \brief (SERCOM_I2CS_CTRLA) USART mode with external clock / 132 …MODE_USART_INT_CLK_Val _U_(0x1) /*< \brief (SERCOM_I2CS_CTRLA) USART mode with internal clock / 133 …CTRLA_MODE_SPI_SLAVE_Val _U_(0x2) /*< \brief (SERCOM_I2CS_CTRLA) SPI mode with external clock / [all …]
/hal_atmel-2.7.6/asf/sam/include/sam4l/
D	component-version.h	`6 * Redistribution and use in source and binary forms, with or without 14 * the documentation and/or other materials provided with the 44 // The last four digits of the COMPONENT_VERSION is the minor version with leading zeros. 45 // The rest of the COMPONENT_VERSION is the major version, with leading zeros. The COMPONENT_VERSION`
/hal_atmel-2.7.6/asf/sam/include/sam3x/
D	component-version.h	`6 * Redistribution and use in source and binary forms, with or without 14 * the documentation and/or other materials provided with the 44 // The last four digits of the COMPONENT_VERSION is the minor version with leading zeros. 45 // The rest of the COMPONENT_VERSION is the major version, with leading zeros. The COMPONENT_VERSION`
/hal_atmel-2.7.6/asf/sam/include/sam4e/
D	component-version.h	`6 * Redistribution and use in source and binary forms, with or without 14 * the documentation and/or other materials provided with the 44 // The last four digits of the COMPONENT_VERSION is the minor version with leading zeros. 45 // The rest of the COMPONENT_VERSION is the major version, with leading zeros. The COMPONENT_VERSION`
/hal_atmel-2.7.6/asf/sam/include/sam4s/
D	component-version.h	`6 * Redistribution and use in source and binary forms, with or without 14 * the documentation and/or other materials provided with the 44 // The last four digits of the COMPONENT_VERSION is the minor version with leading zeros. 45 // The rest of the COMPONENT_VERSION is the major version, with leading zeros. The COMPONENT_VERSION`
/hal_atmel-2.7.6/asf/sam/include/same70/component/
D	tc.h	15 * you may not use this file except in compliance with the License. 86 … uint32_t LDBSTOP:1; /*< bit: 6 Counter Clock Stopped with RB Loading / 87 … uint32_t LDBDIS:1; /*< bit: 7 Counter Clock Disable with RB Loading / 131 …_U_(0x1) /< (TC_CMR) XC0 is ANDed with the selected clock.… 132 …_U_(0x2) /< (TC_CMR) XC1 is ANDed with the selected clock.… 133 …_U_(0x3) /< (TC_CMR) XC2 is ANDed with the selected clock.… 135 …(TC_CMR_BURST_XC0_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC0 is ANDed with the selected clock.… 136 …(TC_CMR_BURST_XC1_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC1 is ANDed with the selected clock.… 137 …(TC_CMR_BURST_XC2_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC2 is ANDed with the selected clock.… 138 … /**< (TC_CMR) Counter Clock Stopped with RB Loading Position… [all …]
/hal_atmel-2.7.6/asf/sam/include/same70b/component/deprecated/
D	tc.h	`48 …S_Msk") (_U_(0x1) << TC_CMR_LDBDIS_Pos) /*< (TC_CMR) Counter Clock Disable with RB Loading Mask / 49 …eprecated macro TC_CMR_LDBDIS_Pos") 7 /< (TC_CMR) Counter Clock Disable with RB Loading Position… 51 …_Msk") (_U_(0x1) << TC_CMR_LDBSTOP_Pos) /< (TC_CMR) Counter Clock Stopped with RB Loading Mask / 52 …precated macro TC_CMR_LDBSTOP_Pos") 6 /*< (TC_CMR) Counter Clock Stopped with RB Loading Position…`
/hal_atmel-2.7.6/asf/sam/include/samv71b/component/
D	tc.h	15 * you may not use this file except in compliance with the License. 92 … uint32_t LDBSTOP:1; /*< bit: 6 Counter Clock Stopped with RB Loading / 93 … uint32_t LDBDIS:1; /*< bit: 7 Counter Clock Disable with RB Loading / 106 … uint32_t CPCSTOP:1; /*< bit: 6 Counter Clock Stopped with RC Compare / 107 … uint32_t CPCDIS:1; /*< bit: 7 Counter Clock Disable with RC Loading / 155 …_U_(0x1) /< (TC_CMR) XC0 is ANDed with the selected clock.… 156 …_U_(0x2) /< (TC_CMR) XC1 is ANDed with the selected clock.… 157 …_U_(0x3) /< (TC_CMR) XC2 is ANDed with the selected clock.… 159 …(TC_CMR_BURST_XC0_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC0 is ANDed with the selected clock.… 160 …(TC_CMR_BURST_XC1_Val << TC_CMR_BURST_Pos) /**< (TC_CMR) XC1 is ANDed with the selected clock.… [all …]
/hal_atmel-2.7.6/asf/sam/include/same70b/component/
D	tc.h	15 * you may not use this file except in compliance with the License. 92 … uint32_t LDBSTOP:1; /*< bit: 6 Counter Clock Stopped with RB Loading / 93 … uint32_t LDBDIS:1; /*< bit: 7 Counter Clock Disable with RB Loading / 106 … uint32_t CPCSTOP:1; /*< bit: 6 Counter Clock Stopped with RC Compare / 107 … uint32_t CPCDIS:1; /*< bit: 7 Counter Clock Disable with RC Loading / 155 …_U_(0x1) /< (TC_CMR) XC0 is ANDed with the selected clock.… 156 …_U_(0x2) /< (TC_CMR) XC1 is ANDed with the selected clock.… 157 …_U_(0x3) /< (TC_CMR) XC2 is ANDed with the selected clock.… 159 …(TC_CMR_BURST_XC0_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC0 is ANDed with the selected clock.… 160 …(TC_CMR_BURST_XC1_Val << TC_CMR_BURST_Pos) /**< (TC_CMR) XC1 is ANDed with the selected clock.… [all …]
/hal_atmel-2.7.6/asf/sam0/include/samd21/component/
D	sercom.h	14 * you may not use this file except in compliance with the License. 77 …MODE_USART_EXT_CLK_Val __U(0x0) /*< \brief (SERCOM_I2CM_CTRLA) USART mode with external clock / 78 …MODE_USART_INT_CLK_Val __U(0x1) /*< \brief (SERCOM_I2CM_CTRLA) USART mode with internal clock / 79 …CTRLA_MODE_SPI_SLAVE_Val __U(0x2) /*< \brief (SERCOM_I2CM_CTRLA) SPI mode with external clock / 80 …TRLA_MODE_SPI_MASTER_Val __U(0x3) /*< \brief (SERCOM_I2CM_CTRLA) SPI mode with internal clock / 81 …CTRLA_MODE_I2C_SLAVE_Val __U(0x4) /*< \brief (SERCOM_I2CM_CTRLA) I2C mode with external clock / 82 …TRLA_MODE_I2C_MASTER_Val __U(0x5) /*< \brief (SERCOM_I2CM_CTRLA) I2C mode with internal clock / 148 …MODE_USART_EXT_CLK_Val __U(0x0) /*< \brief (SERCOM_I2CS_CTRLA) USART mode with external clock / 149 …MODE_USART_INT_CLK_Val __U(0x1) /*< \brief (SERCOM_I2CS_CTRLA) USART mode with internal clock / 150 …CTRLA_MODE_SPI_SLAVE_Val __U(0x2) /*< \brief (SERCOM_I2CS_CTRLA) SPI mode with external clock / [all …]
/hal_atmel-2.7.6/asf/sam0/include/samr21/component/
D	sercom.h	14 * you may not use this file except in compliance with the License. 77 …_MODE_USART_EXT_CLK_Val _U(0x0) /*< \brief (SERCOM_I2CM_CTRLA) USART mode with external clock / 78 …_MODE_USART_INT_CLK_Val _U(0x1) /*< \brief (SERCOM_I2CM_CTRLA) USART mode with internal clock / 79 …_CTRLA_MODE_SPI_SLAVE_Val _U(0x2) /*< \brief (SERCOM_I2CM_CTRLA) SPI mode with external clock / 80 …CTRLA_MODE_SPI_MASTER_Val _U(0x3) /*< \brief (SERCOM_I2CM_CTRLA) SPI mode with internal clock / 81 …_CTRLA_MODE_I2C_SLAVE_Val _U(0x4) /*< \brief (SERCOM_I2CM_CTRLA) I2C mode with external clock / 82 …CTRLA_MODE_I2C_MASTER_Val _U(0x5) /*< \brief (SERCOM_I2CM_CTRLA) I2C mode with internal clock / 148 …_MODE_USART_EXT_CLK_Val _U(0x0) /*< \brief (SERCOM_I2CS_CTRLA) USART mode with external clock / 149 …_MODE_USART_INT_CLK_Val _U(0x1) /*< \brief (SERCOM_I2CS_CTRLA) USART mode with internal clock / 150 …_CTRLA_MODE_SPI_SLAVE_Val _U(0x2) /*< \brief (SERCOM_I2CS_CTRLA) SPI mode with external clock / [all …]
/hal_atmel-2.7.6/asf/sam/include/samv71/component/
D	tc.h	15 * you may not use this file except in compliance with the License. 86 … uint32_t LDBSTOP:1; /*< bit: 6 Counter Clock Stopped with RB Loading / 87 … uint32_t LDBDIS:1; /*< bit: 7 Counter Clock Disable with RB Loading / 131 …_U_(0x1) /< (TC_CMR) XC0 is ANDed with the selected clock.… 132 …_U_(0x2) /< (TC_CMR) XC1 is ANDed with the selected clock.… 133 …_U_(0x3) /< (TC_CMR) XC2 is ANDed with the selected clock.… 135 …(TC_CMR_BURST_XC0_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC0 is ANDed with the selected clock.… 136 …(TC_CMR_BURST_XC1_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC1 is ANDed with the selected clock.… 137 …(TC_CMR_BURST_XC2_Val << TC_CMR_BURST_Pos) /< (TC_CMR) XC2 is ANDed with the selected clock.… 138 … /**< (TC_CMR) Counter Clock Stopped with RB Loading Position… [all …]

12 3 4 5 6 7 8 9 10 >>...62

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0