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/Zephyr-latest/drivers/pcie/host/
Dmsi.c44 msi_vector_t *vectors, in arch_pcie_msi_vectors_allocate() argument
48 ARG_UNUSED(vectors); in arch_pcie_msi_vectors_allocate()
82 msi_vector_t *vectors, in map_msix_table_entries() argument
104 vectors[i].msix_vector = (struct msix_vector *) in map_msix_table_entries()
111 static void set_msix(msi_vector_t *vectors, in set_msix() argument
118 vectors[i].msix = msix; in set_msix()
141 msi_vector_t *vectors, in pcie_msi_vectors_allocate() argument
151 set_msix(vectors, n_vector, !msi); in pcie_msi_vectors_allocate()
156 vectors, n_vector)) { in pcie_msi_vectors_allocate()
171 vectors[req_vectors].bdf = bdf; in pcie_msi_vectors_allocate()
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Dpcie_ecam.c319 msi_vector_t *vectors, uint8_t n_vector) in pcie_ecam_msi_device_setup() argument
331 bdf = vectors[0].bdf; in pcie_ecam_msi_device_setup()
333 /* We do not support allocating vectors for multiple BDFs for now, in pcie_ecam_msi_device_setup()
334 * This would need tracking vectors already allocated for a BDF and in pcie_ecam_msi_device_setup()
336 * sure more vectors for each BDF will be allocated later. in pcie_ecam_msi_device_setup()
340 if (vectors[i].bdf != bdf) { in pcie_ecam_msi_device_setup()
354 vectors[i].arch.irq = its_alloc_intid(cfg->msi_parent); in pcie_ecam_msi_device_setup()
355 vectors[i].arch.address = its_get_msi_addr(cfg->msi_parent); in pcie_ecam_msi_device_setup()
356 vectors[i].arch.eventid = i; in pcie_ecam_msi_device_setup()
357 vectors[i].arch.priority = priority; in pcie_ecam_msi_device_setup()
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/Zephyr-latest/arch/x86/
Dgen_idt.py25 2. A bitfield indicating which vectors in the IDT are free for
46 # These exception vectors push an error code onto the stack.
113 # Priority levels are represented as groups of 16 vectors within the IDT
138 vectors = [None for i in range(max_vec)]
140 # Pass 1: sanity check and set up hard-coded interrupt vectors
148 error("Vector %d specified, but size of IDT is only %d vectors" %
151 if vectors[vec] is not None:
154 vectors[vec] = (handler, tss, dpl)
157 # Pass 2: set up priority-based interrupt vectors
165 if vectors[vi] is None:
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/Zephyr-latest/arch/x86/include/
Dkernel_arch_data.h10 * Exception/interrupt vector definitions: vectors 20 to 31 are reserved
11 * for Intel; vectors 32 to 255 are user defined interrupt vectors.
37 #define IV_IRQS 32 /* start of vectors available for IRQs */
38 #define IV_NR_VECTORS 256 /* total number of vectors */
/Zephyr-latest/boards/seagate/faze/support/
Dopenocd.cfg17 # This ensures that the interrupt vectors (0x0000-0x0200) are re-mapped to
25 # 0x0 Boot Loader Mode. Interrupt vectors are re-mapped to
27 # 0x1 User RAM Mode. Interrupt vectors are re-mapped to
29 # 0x2 User Flash Mode. Interrupt vectors are not re-mapped
/Zephyr-latest/tests/arch/arm64/arm64_gicv3_its/src/
Dmain.c35 unsigned int vectors[ITS_TEST_NUM_DEVS][ITS_TEST_NUM_ITES]; variable
50 vectors[devn][event_id] = its_alloc_intid(dev); in ZTEST()
51 zassert_true(vectors[devn][event_id] >= 8192, ""); in ZTEST()
52 zassert_true(vectors[devn][event_id] < CONFIG_NUM_IRQS, ""); in ZTEST()
55 vectors[devn][event_id]) == 0, ""); in ZTEST()
70 unsigned int irqn = vectors[devn][event_id]; in ZTEST()
84 unsigned int irqn = vectors[0][0]; in ZTEST()
107 unsigned int irqn = vectors[0][0]; in ZTEST()
156 unsigned int irqn = vectors[devn][event_id]; in ZTEST()
/Zephyr-latest/boards/nxp/lpcxpresso11u68/support/
Dopenocd.cfg20 # This ensures that the interrupt vectors (0x0000-0x0200) are re-mapped to
28 # 0x0 Boot Loader Mode. Interrupt vectors are re-mapped to
30 # 0x1 User RAM Mode. Interrupt vectors are re-mapped to
32 # 0x2 User Flash Mode. Interrupt vectors are not re-mapped
/Zephyr-latest/arch/x86/core/
Dpcie.c219 msi_vector_t *vectors, in arch_pcie_msi_vectors_allocate() argument
225 if (vectors == NULL || n_vector == 0) { in arch_pcie_msi_vectors_allocate()
244 vectors[i].arch.irte = irte; in arch_pcie_msi_vectors_allocate()
245 vectors[i].arch.remap = true; in arch_pcie_msi_vectors_allocate()
257 irq = pcie_get_irq(vectors->bdf); in arch_pcie_msi_vectors_allocate()
271 vectors[i].arch.irq = irq; in arch_pcie_msi_vectors_allocate()
272 vectors[i].arch.vector = vector; in arch_pcie_msi_vectors_allocate()
275 vtd_set_irte_vector(vtd, vectors[i].arch.irte, in arch_pcie_msi_vectors_allocate()
276 vectors[i].arch.vector); in arch_pcie_msi_vectors_allocate()
277 vtd_set_irte_irq(vtd, vectors[i].arch.irte, in arch_pcie_msi_vectors_allocate()
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/Zephyr-latest/tests/drivers/virtualization/ivshmem/plain/src/
Divshmem.c19 uint16_t vectors; in ZTEST() local
39 vectors = ivshmem_get_vectors(ivshmem); in ZTEST()
40 zassert_equal(vectors, 0, "ivshmem-plain cannot have vectors"); in ZTEST()
/Zephyr-latest/include/zephyr/drivers/pcie/
Dmsi.h68 * @param priority the MSI vectors base interrupt priority
69 * @param vectors an array for storing allocated MSI vectors
70 * @param n_vector the size of the MSI vectors array
72 * @return the number of allocated MSI vectors.
76 msi_vector_t *vectors,
128 * @param vectors an array of allocated vector(s)
134 msi_vector_t *vectors,
/Zephyr-latest/samples/drivers/ipm/ipm_ivshmem/
DREADME.rst29 #. Run ivshmem-server. For the ivshmem-server, both number of vectors and
31 For Zephyr, the number of vectors and shared memory size of ivshmem are
33 vectors == 2 for the project configuration in this sample. Here is an example:
37 # n = number of vectors
103 Notification vectors: 2
119 Notification vectors: 2
131 Notification vectors: 2
/Zephyr-latest/soc/wch/ch32v00x/
Dvector.S15 SECTION_FUNC(vectors, ivt)
22 SECTION_FUNC(vectors, __start)
/Zephyr-latest/samples/drivers/virtualization/ivshmem/doorbell/
DREADME.rst78 #. Run ivshmem-server. For the ivshmem-server, both number of vectors and
80 For Zephyr, the number of vectors and shared memory size of ivshmem are
83 - (Arm64) Use vectors == 2 for the project configuration in this sample.
88 # n = number of vectors
97 # n = number of vectors, l = shared memory size
101 - (Optional) If vectors != 2, you need to change ivshmem driver
157 int <peer> all: notify all vectors of a peer
158 int all: notify all vectors of all peers (excepting us)
170 received (in any of the ivshmem-vectors). Example of output for arm64:
/Zephyr-latest/soc/openisa/rv32m1/
Dvector.S18 * in this SoC; the only difference is the location of the vectors section
30 * text and vectors sections, so the limits are satisfied.
32 SECTION_FUNC(vectors, ivt)
75 SECTION_FUNC(vectors, __start)
/Zephyr-latest/arch/xtensa/core/
Dgen_vectors.py11 # correctly load the exception vectors and literals as long as their
19 # could be played to load vectors at fixed addresses on hardware that
27 # + The six register window exception vectors are defined with offsets
31 # + The "kernel", "user" and "double exception" vectors are emitted in
36 # + XEA2 interrupt vectors are in sections named
39 # exist) are technically implemented as standard interrupt vectors
/Zephyr-latest/arch/x86/core/ia32/
Dirq_manage.c31 * section. The genIdt tool can then populate any unused vectors with
65 * Instead of creating a large sparse table mapping all possible IDT vectors
92 * Vectors 0 to 31 are reserved for CPU exceptions and do NOT fall under
94 * Each interrupt priority level contains 16 vectors.
128 * algorithm as the 'gen_idt.py' tool for allocating interrupt vectors. in priority_to_free_vector()
135 * is a 32-bit quantity and thus represents the vectors for a pair of in priority_to_free_vector()
147 __ASSERT(fsb != 0U, "No remaning vectors for priority level %d", in priority_to_free_vector()
212 /* 0 indicates not used, vectors for interrupts start at 32 */ in arch_irq_connect_dynamic()
/Zephyr-latest/lib/acpi/
DKconfig44 int "Interrupt vectors per device"
47 Maximum interrupt vectors per device.
/Zephyr-latest/doc/services/virtualization/
Divshmem.rst34 Because the doorbell version uses MSI-X vectors to support notification vectors,
36 vectors that will be needed.
/Zephyr-latest/soc/intel/intel_adsp/common/include/
Dadsp-vectors.h9 /* This is the base address of all the vectors defined in SRAM */
15 /* The addresses of the vectors in SRAM.
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/f1/include/soc/
Dmemory.h21 /* Base address of all interrupt vectors in IRAM. */
29 /* Addresses of the interrupt vectors. */
/Zephyr-latest/samples/drivers/virtualization/ivshmem/doorbell/src/
Divshmem.c46 /* number of MSI vectors allocated */
47 uint16_t vectors; member
162 shmem_ctx.vectors = ivshmem_get_vectors(shmem_ctx.dev); in setup_ivshmem()
163 if (shmem_ctx.vectors == 0) { in setup_ivshmem()
164 printf("ivshmem-doorbell must have vectors\n"); in setup_ivshmem()
177 for (i = 0; i < shmem_ctx.vectors; i++) { in setup_ivshmem()
/Zephyr-latest/drivers/virtualization/
DKconfig36 int "How many notification vectors should be pre-allocated?"
42 with each other. These are know to be the notification vectors in
Dvirt_ivshmem_shell.c70 uint16_t vectors; in cmd_ivshmem_shmem() local
78 vectors = ivshmem_get_vectors(ivshmem); in cmd_ivshmem_shmem()
84 "\tNotification vectors: %u\n", in cmd_ivshmem_shmem()
85 mem, size, id, vectors); in cmd_ivshmem_shmem()
/Zephyr-latest/arch/riscv/core/
Dvector_table.ld7 KEEP(*(.vectors.*))
/Zephyr-latest/include/zephyr/linker/
Disr-local-drop-unused.ld6 KEEP(*(.vectors))

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