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/hal_atmel-3.7.0/asf/sam/include/samv71b/component/
Dmlb.h160 /* -------- MLB_MSS : (MLB Offset: 0x20) (R/W 32) MediaLB System Status Register -------- */
165 …nt32_t RSTSYSCMD:1; /**< bit: 0 Reset System Command Detected in the System Qu…
166 …LKSYSCMD:1; /**< bit: 1 Network Lock System Command Detected in the System Qu…
167 …KSYSCMD:1; /**< bit: 2 Network Unlock System Command Detected in the System Qu…
168 …CSSYSCMD:1; /**< bit: 3 Channel Scan System Command Detected in the System Qu…
169 …2_t SWSYSCMD:1; /**< bit: 4 Software System Command Detected in the System Qu…
178 … (0x20) /**< (MLB_MSS) MediaLB System Status Register O…
180 … /**< (MLB_MSS) Reset System Command Detected in the System Qu…
181 …<< MLB_MSS_RSTSYSCMD_Pos) /**< (MLB_MSS) Reset System Command Detected in the System Qu…
183 … /**< (MLB_MSS) Network Lock System Command Detected in the System Qu…
[all …]
/hal_atmel-3.7.0/asf/sam/include/samv71/component/
Dmlb.h160 /* -------- MLB_MSS : (MLB Offset: 0x20) (R/W 32) MediaLB System Status Register -------- */
165 …nt32_t RSTSYSCMD:1; /**< bit: 0 Reset System Command Detected in the System Qu…
166 …LKSYSCMD:1; /**< bit: 1 Network Lock System Command Detected in the System Qu…
167 …KSYSCMD:1; /**< bit: 2 Network Unlock System Command Detected in the System Qu…
168 …CSSYSCMD:1; /**< bit: 3 Channel Scan System Command Detected in the System Qu…
169 …2_t SWSYSCMD:1; /**< bit: 4 Software System Command Detected in the System Qu…
178 … (0x20) /**< (MLB_MSS) MediaLB System Status Register O…
180 … /**< (MLB_MSS) Reset System Command Detected in the System Qu…
181 …<< MLB_MSS_RSTSYSCMD_Pos) /**< (MLB_MSS) Reset System Command Detected in the System Qu…
183 … /**< (MLB_MSS) Network Lock System Command Detected in the System Qu…
[all …]
/hal_atmel-3.7.0/include/dt-bindings/pinctrl/
Dsam4sXa-pinctrl.h138 SAM_PINMUX(a, 7, s, system)
154 SAM_PINMUX(a, 8, s, system)
462 SAM_PINMUX(b, 4, s, system)
478 SAM_PINMUX(b, 5, s, system)
482 SAM_PINMUX(b, 5, s, system)
494 SAM_PINMUX(b, 6, s, system)
498 SAM_PINMUX(b, 6, s, system)
506 SAM_PINMUX(b, 7, s, system)
510 SAM_PINMUX(b, 7, s, system)
518 SAM_PINMUX(b, 8, s, system)
[all …]
Dsam4sXb-pinctrl.h131 SAM_PINMUX(a, 7, s, system)
147 SAM_PINMUX(a, 8, s, system)
659 SAM_PINMUX(b, 4, s, system)
675 SAM_PINMUX(b, 5, s, system)
679 SAM_PINMUX(b, 5, s, system)
691 SAM_PINMUX(b, 6, s, system)
695 SAM_PINMUX(b, 6, s, system)
703 SAM_PINMUX(b, 7, s, system)
707 SAM_PINMUX(b, 7, s, system)
715 SAM_PINMUX(b, 8, s, system)
[all …]
Dsamv70j-pinctrl.h106 SAM_PINMUX(a, 7, s, system)
122 SAM_PINMUX(a, 8, s, system)
474 SAM_PINMUX(b, 4, s, system)
498 SAM_PINMUX(b, 5, s, system)
502 SAM_PINMUX(b, 5, s, system)
514 SAM_PINMUX(b, 6, s, system)
518 SAM_PINMUX(b, 6, s, system)
526 SAM_PINMUX(b, 7, s, system)
530 SAM_PINMUX(b, 7, s, system)
538 SAM_PINMUX(b, 8, s, system)
[all …]
Dsams70j-pinctrl.h106 SAM_PINMUX(a, 7, s, system)
122 SAM_PINMUX(a, 8, s, system)
462 SAM_PINMUX(b, 4, s, system)
482 SAM_PINMUX(b, 5, s, system)
486 SAM_PINMUX(b, 5, s, system)
498 SAM_PINMUX(b, 6, s, system)
502 SAM_PINMUX(b, 6, s, system)
510 SAM_PINMUX(b, 7, s, system)
514 SAM_PINMUX(b, 7, s, system)
522 SAM_PINMUX(b, 8, s, system)
[all …]
Dsam4sXc-pinctrl.h139 SAM_PINMUX(a, 7, s, system)
155 SAM_PINMUX(a, 8, s, system)
695 SAM_PINMUX(b, 4, s, system)
711 SAM_PINMUX(b, 5, s, system)
715 SAM_PINMUX(b, 5, s, system)
727 SAM_PINMUX(b, 6, s, system)
731 SAM_PINMUX(b, 6, s, system)
739 SAM_PINMUX(b, 7, s, system)
743 SAM_PINMUX(b, 7, s, system)
751 SAM_PINMUX(b, 8, s, system)
[all …]
Dsame70j-pinctrl.h106 SAM_PINMUX(a, 7, s, system)
122 SAM_PINMUX(a, 8, s, system)
474 SAM_PINMUX(b, 4, s, system)
494 SAM_PINMUX(b, 5, s, system)
498 SAM_PINMUX(b, 5, s, system)
510 SAM_PINMUX(b, 6, s, system)
514 SAM_PINMUX(b, 6, s, system)
522 SAM_PINMUX(b, 7, s, system)
526 SAM_PINMUX(b, 7, s, system)
534 SAM_PINMUX(b, 8, s, system)
[all …]
Dsamv71j-pinctrl.h106 SAM_PINMUX(a, 7, s, system)
122 SAM_PINMUX(a, 8, s, system)
478 SAM_PINMUX(b, 4, s, system)
502 SAM_PINMUX(b, 5, s, system)
506 SAM_PINMUX(b, 5, s, system)
518 SAM_PINMUX(b, 6, s, system)
522 SAM_PINMUX(b, 6, s, system)
530 SAM_PINMUX(b, 7, s, system)
534 SAM_PINMUX(b, 7, s, system)
542 SAM_PINMUX(b, 8, s, system)
[all …]
Dsam4eXc-pinctrl.h123 SAM_PINMUX(a, 7, s, system)
135 SAM_PINMUX(a, 8, s, system)
631 SAM_PINMUX(b, 4, s, system)
647 SAM_PINMUX(b, 5, s, system)
651 SAM_PINMUX(b, 5, s, system)
663 SAM_PINMUX(b, 6, s, system)
667 SAM_PINMUX(b, 6, s, system)
675 SAM_PINMUX(b, 7, s, system)
679 SAM_PINMUX(b, 7, s, system)
687 SAM_PINMUX(b, 8, s, system)
[all …]
Dsams70n-pinctrl.h155 SAM_PINMUX(a, 7, s, system)
171 SAM_PINMUX(a, 8, s, system)
723 SAM_PINMUX(b, 4, s, system)
743 SAM_PINMUX(b, 5, s, system)
747 SAM_PINMUX(b, 5, s, system)
759 SAM_PINMUX(b, 6, s, system)
763 SAM_PINMUX(b, 6, s, system)
771 SAM_PINMUX(b, 7, s, system)
775 SAM_PINMUX(b, 7, s, system)
783 SAM_PINMUX(b, 8, s, system)
[all …]
Dsam4eXe-pinctrl.h131 SAM_PINMUX(a, 7, s, system)
143 SAM_PINMUX(a, 8, s, system)
667 SAM_PINMUX(b, 4, s, system)
683 SAM_PINMUX(b, 5, s, system)
687 SAM_PINMUX(b, 5, s, system)
699 SAM_PINMUX(b, 6, s, system)
703 SAM_PINMUX(b, 6, s, system)
711 SAM_PINMUX(b, 7, s, system)
715 SAM_PINMUX(b, 7, s, system)
723 SAM_PINMUX(b, 8, s, system)
[all …]
Dsamv70n-pinctrl.h155 SAM_PINMUX(a, 7, s, system)
171 SAM_PINMUX(a, 8, s, system)
735 SAM_PINMUX(b, 4, s, system)
759 SAM_PINMUX(b, 5, s, system)
763 SAM_PINMUX(b, 5, s, system)
775 SAM_PINMUX(b, 6, s, system)
779 SAM_PINMUX(b, 6, s, system)
787 SAM_PINMUX(b, 7, s, system)
791 SAM_PINMUX(b, 7, s, system)
799 SAM_PINMUX(b, 8, s, system)
[all …]
Dsamv71n-pinctrl.h155 SAM_PINMUX(a, 7, s, system)
171 SAM_PINMUX(a, 8, s, system)
739 SAM_PINMUX(b, 4, s, system)
763 SAM_PINMUX(b, 5, s, system)
767 SAM_PINMUX(b, 5, s, system)
779 SAM_PINMUX(b, 6, s, system)
783 SAM_PINMUX(b, 6, s, system)
791 SAM_PINMUX(b, 7, s, system)
795 SAM_PINMUX(b, 7, s, system)
803 SAM_PINMUX(b, 8, s, system)
[all …]
Dsame70n-pinctrl.h155 SAM_PINMUX(a, 7, s, system)
171 SAM_PINMUX(a, 8, s, system)
735 SAM_PINMUX(b, 4, s, system)
755 SAM_PINMUX(b, 5, s, system)
759 SAM_PINMUX(b, 5, s, system)
771 SAM_PINMUX(b, 6, s, system)
775 SAM_PINMUX(b, 6, s, system)
783 SAM_PINMUX(b, 7, s, system)
787 SAM_PINMUX(b, 7, s, system)
795 SAM_PINMUX(b, 8, s, system)
[all …]
/hal_atmel-3.7.0/pinconfigs/
Dsam-4s-4sa-4sd.yml85 system:
94 system:
315 system:
324 system:
329 system:
334 system:
339 system:
343 system:
347 system:
351 system:
[all …]
Dsam-4e.yml78 system:
86 system:
303 system:
312 system:
317 system:
322 system:
327 system:
331 system:
335 system:
339 system:
[all …]
DREADME.md14 system functionality. The struct created to map the alternate functions is
145 optional properties: `periph`, `extra`, `system`, `lpm`, `wakeup`. The `pincode`
159 special pin configuration to allow system consume less possible power. The
231 The next example shows how to specify `extra`, `wakeup` and `system` functions.
243 system:
284 - function (gpio, periph, extra, system, lpm)
/hal_atmel-3.7.0/asf/sam0/include/same54/instance/
Dpicop.h83 #define REG_PICOP_S1S0 (0x4100E0A0U) /**< \brief (PICOP) System Regs 1 to 0: SR */
84 #define REG_PICOP_S3S2 (0x4100E0A4U) /**< \brief (PICOP) System Regs 3 to 2: CTRL */
85 #define REG_PICOP_S5S4 (0x4100E0A8U) /**< \brief (PICOP) System Regs 5 to 4: SREG, CCR …
86 #define REG_PICOP_S11S10 (0x4100E0B4U) /**< \brief (PICOP) System Regs 11 to 10: Immediat…
131 #define REG_PICOP_S1S0 (*(RwReg *)0x4100E0A0U) /**< \brief (PICOP) System Regs 1 to 0:…
132 #define REG_PICOP_S3S2 (*(RwReg *)0x4100E0A4U) /**< \brief (PICOP) System Regs 3 to 2:…
133 #define REG_PICOP_S5S4 (*(RwReg *)0x4100E0A8U) /**< \brief (PICOP) System Regs 5 to 4:…
134 #define REG_PICOP_S11S10 (*(RwReg *)0x4100E0B4U) /**< \brief (PICOP) System Regs 11 to 1…
/hal_atmel-3.7.0/asf/sam/include/sam4e/instance/
Dpmc.h35 #define REG_PMC_SCER (0x400E0400U) /**< \brief (PMC) System Clock Enable Register */
36 #define REG_PMC_SCDR (0x400E0404U) /**< \brief (PMC) System Clock Disable Register */
37 #define REG_PMC_SCSR (0x400E0408U) /**< \brief (PMC) System Clock Status Register */
61 #define REG_PMC_SCER (*(WoReg*)0x400E0400U) /**< \brief (PMC) System Clock Enable Register */
62 #define REG_PMC_SCDR (*(WoReg*)0x400E0404U) /**< \brief (PMC) System Clock Disable Register */
63 #define REG_PMC_SCSR (*(RoReg*)0x400E0408U) /**< \brief (PMC) System Clock Status Register */
/hal_atmel-3.7.0/asf/sam/include/sam4s/instance/
Dpmc.h35 …#define REG_PMC_SCER (0x400E0400U) /**< \brief (PMC) System Clock Enable Regist…
36 …#define REG_PMC_SCDR (0x400E0404U) /**< \brief (PMC) System Clock Disable Regis…
37 …#define REG_PMC_SCSR (0x400E0408U) /**< \brief (PMC) System Clock Status Regist…
62 …#define REG_PMC_SCER (*(__O uint32_t*)0x400E0400U) /**< \brief (PMC) System Clock Enable Regist…
63 …#define REG_PMC_SCDR (*(__O uint32_t*)0x400E0404U) /**< \brief (PMC) System Clock Disable Regis…
64 …#define REG_PMC_SCSR (*(__I uint32_t*)0x400E0408U) /**< \brief (PMC) System Clock Status Regist…
/hal_atmel-3.7.0/asf/sam/include/sam3x/instance/
Dpmc.h35 …#define REG_PMC_SCER (0x400E0600U) /**< \brief (PMC) System Clock Enable Regist…
36 …#define REG_PMC_SCDR (0x400E0604U) /**< \brief (PMC) System Clock Disable Regis…
37 …#define REG_PMC_SCSR (0x400E0608U) /**< \brief (PMC) System Clock Status Regist…
62 …#define REG_PMC_SCER (*(__O uint32_t*)0x400E0600U) /**< \brief (PMC) System Clock Enable Regist…
63 …#define REG_PMC_SCDR (*(__O uint32_t*)0x400E0604U) /**< \brief (PMC) System Clock Disable Regis…
64 …#define REG_PMC_SCSR (*(__I uint32_t*)0x400E0608U) /**< \brief (PMC) System Clock Status Regist…
/hal_atmel-3.7.0/asf/sam0/include/samd21/instance/
Dsysctrl.h48 #define REG_SYSCTRL_VREG (0x4000083C) /**< \brief (SYSCTRL) Voltage Regulator System (VRE…
49 #define REG_SYSCTRL_VREF (0x40000840) /**< \brief (SYSCTRL) Voltage References System (VR…
69 … (*(RwReg16*)0x4000083CUL) /**< \brief (SYSCTRL) Voltage Regulator System (VREG) Control */
70 … (*(RwReg *)0x40000840UL) /**< \brief (SYSCTRL) Voltage References System (VREF) Control */
87 #define SYSCTRL_SYSTEM_CLOCK 1000000 // Initial system clock frequency
/hal_atmel-3.7.0/asf/sam0/include/samr21/instance/
Dsysctrl.h48 #define REG_SYSCTRL_VREG (0x4000083C) /**< \brief (SYSCTRL) Voltage Regulator System (VRE…
49 #define REG_SYSCTRL_VREF (0x40000840) /**< \brief (SYSCTRL) Voltage References System (VR…
69 … (*(RwReg16*)0x4000083CUL) /**< \brief (SYSCTRL) Voltage Regulator System (VREG) Control */
70 … (*(RwReg *)0x40000840UL) /**< \brief (SYSCTRL) Voltage References System (VREF) Control */
87 #define SYSCTRL_SYSTEM_CLOCK 1000000 // Initial system clock frequency
/hal_atmel-3.7.0/asf/sam0/include/same51/instance/
Dsdhc1.h49 #define REG_SDHC1_SSAR (0x46000000U) /**< \brief (SDHC1) SDMA System Address Register */
71 #define REG_SDHC1_ASAR (0x46000058U) /**< \brief (SDHC1) ADMA System Address Register */
72 #define REG_SDHC1_ASARH (0x4600005CU) /**< \brief (SDHC1) ADMA System Address Register H…
88 #define REG_SDHC1_SSAR (*(RwReg *)0x46000000U) /**< \brief (SDHC1) SDMA System Address…
110 #define REG_SDHC1_ASAR (*(RwReg *)0x46000058U) /**< \brief (SDHC1) ADMA System Address…
111 #define REG_SDHC1_ASARH (*(RwReg *)0x4600005CU) /**< \brief (SDHC1) ADMA System Address…

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