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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/
Dtestcase.yaml11 drivers.clock.stm32_clock_configuration.dev_u5.spi1_sysclk:
12 extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_sysclk.overlay"