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/Zephyr-latest/tests/drivers/spi/spi_controller_peripheral/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
5 int "SPI mode"
8 SPI mode value (clock polarity and phase) used in the test.
9 0: CPOL 0 (Active high), CPHA 0 (leading)
10 1: CPOL 0 (Active high), CPHA 1 (trailing)
11 2: CPOL 1 (Active low), CPHA 0 (leading)
12 3: CPOL 1 (Active low), CPHA 1 (trailing)
DREADME.txt1 In this test suite two instances of the SPI peripheral are connected together.
2 One SPI instance works as a controller, second one is configured as a peripheral.
3 In each test, both instances get identical configuration (CPOL, CPHA, bitrate, etc.).
6 1. spi22-SPIM_SCK connected with spi21-SPIS_SCK,
7 2. spi22-SPIM_MISO connected with spi21-SPIS_MISO,
8 3. spi22-SPIM_MOSI connected with spi21-SPIS_MOSI,
9 4. spi22-cs-gpios connected with spi21-SPIS_CSN.
/Zephyr-latest/boards/shields/x_nucleo_bnrg2a1/
Dx_nucleo_bnrg2a1.overlay4 * SPDX-License-Identifier: Apache-2.0
9 zephyr,bt-hci = &hci_spi;
14 cs-gpios = <&arduino_header 1 GPIO_ACTIVE_LOW>; /* A1 */
16 hci_spi: bluenrg-2@0 {
17 compatible = "st,hci-spi-v2";
19 reset-gpios = <&arduino_header 13 GPIO_ACTIVE_LOW>; /* D7 */
20 irq-gpios = <&arduino_header 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* A0 */
21 spi-cpha; /* CPHA=1 */
22 spi-hold-cs;
23 spi-max-frequency = <DT_FREQ_M(1)>;
[all …]
/Zephyr-latest/boards/shields/x_nucleo_wb05kn1/
Dx_nucleo_wb05kn1_spi.overlay4 * SPDX-License-Identifier: Apache-2.0
9 zephyr,bt-hci = &hci_spi;
14 cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>; /* D10 */
17 compatible = "st,hci-spi-v2";
19 reset-gpios = <&arduino_header 13 GPIO_ACTIVE_LOW>; /* D7 */
20 irq-gpios = <&arduino_header 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* A0 */
21 spi-cpol; /* CPOL=1 */
22 spi-cpha; /* CPHA=1 */
23 spi-hold-cs;
24 spi-max-frequency = <DT_FREQ_M(8)>; /* the maximum supported SPI speed */
[all …]
/Zephyr-latest/dts/bindings/wifi/
Dnordic,nrf70-qspi.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: nRF70 Wi-Fi chip with QSPI interface.
8 on-bus: qspi
11 qspi-frequency:
20 qspi-quad-mode:
24 SPI mode (2 IO lines - MOSI & MISO).
26 qspi-rx-delay:
30 Number of clock cycles from the rising edge of the SPI clock
33 qspi-cpha:
36 Set to indicate phase starts with asserted half-phase (CPHA=1).
[all …]
/Zephyr-latest/dts/bindings/mtd/
Dnordic,qspi-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
7 compatible: "nordic,qspi-nor"
9 include: [base.yaml, "jedec,spi-nor-common.yaml"]
11 on-bus: qspi
17 jedec-id:
23 The size in bits. Set this or size-in-bytes, but not both.
25 size-in-bytes:
31 quad-enable-requirements:
37 - "fastread" # Single data line SPI, FAST_READ (0x0B)
38 - "read2o" # Dual data line SPI, READ2O (0x3B)
[all …]
/Zephyr-latest/samples/subsys/fs/fs_sample/boards/
Dnucleo_f429zi.overlay2 * Copyright (c) 2023 Łukasz Hejnak (LeHack) <lehack-ghub@lehack.pl>
4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "zephyr,sdhc-spi-slot";
13 compatible = "zephyr,sdmmc-disk";
14 disk-name = "SD";
17 spi-max-frequency = <25000000>;
18 spi-clock-mode-cpol;
19 spi-clock-mode-cpha;
/Zephyr-latest/drivers/spi/
Dspi_sedi.c4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/spi.h>
11 #include <zephyr/drivers/spi/rtio.h>
40 struct spi_sedi_data *data = dev->data; in spi_sedi_configure()
41 const struct spi_sedi_config *info = dev->config; in spi_sedi_configure()
42 uint32_t word_size, cpol, cpha, loopback; in spi_sedi_configure() local
44 if (spi_context_configured(&data->ctx, config) == true) { in spi_sedi_configure()
48 word_size = SPI_WORD_SIZE_GET(config->operation); in spi_sedi_configure()
49 sedi_spi_control(info->spi_device, SEDI_SPI_IOCTL_DATA_WIDTH, in spi_sedi_configure()
52 /* CPOL and CPHA */ in spi_sedi_configure()
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Dspi_numaker.c2 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/drivers/spi/rtio.h>
26 SPI_T *spi; member
42 * CPOL/CPHA = 0/0 --> SPI_MODE_0
43 * CPOL/CPHA = 0/1 --> SPI_MODE_1
44 * CPOL/CPHA = 1/0 --> SPI_MODE_2
45 * CPOL/CPHA = 1/1 --> SPI_MODE_3
58 struct spi_numaker_data *data = dev->data; in spi_numaker_configure()
59 const struct spi_numaker_config *dev_cfg = dev->config; in spi_numaker_configure()
62 if (spi_context_configured(&data->ctx, config)) { in spi_numaker_configure()
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Dspi_xmc4xxx.c4 * SPDX-License-Identifier: Apache-2.0
17 #include <zephyr/drivers/spi.h>
18 #include <zephyr/drivers/spi/rtio.h>
37 XMC_USIC_CH_t *spi; member
79 data->dma_status_flags |= SPI_XMC4XXX_DMA_ERROR_FLAG; in spi_xmc4xxx_dma_callback()
81 if (dev_dma == data->dma_tx.dev_dma && dma_channel == data->dma_tx.dma_channel) { in spi_xmc4xxx_dma_callback()
82 data->dma_status_flags |= SPI_XMC4XXX_DMA_TX_DONE_FLAG; in spi_xmc4xxx_dma_callback()
83 } else if (dev_dma == data->dma_rx.dev_dma && in spi_xmc4xxx_dma_callback()
84 dma_channel == data->dma_rx.dma_channel) { in spi_xmc4xxx_dma_callback()
85 data->dma_status_flags |= SPI_XMC4XXX_DMA_RX_DONE_FLAG; in spi_xmc4xxx_dma_callback()
[all …]
Dspi_bitbang.c2 * Copyright (c) 2021 Marc Reilly - Creative Product Design
4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/drivers/spi.h>
15 #include <zephyr/drivers/spi/rtio.h>
35 if (config->operation & SPI_OP_MODE_SLAVE) { in spi_bitbang_configure()
37 return -ENOTSUP; in spi_bitbang_configure()
40 if (config->operation & (SPI_LINES_DUAL | SPI_LINES_QUAD | SPI_LINES_OCTAL)) { in spi_bitbang_configure()
42 return -ENOTSUP; in spi_bitbang_configure()
45 const int bits = SPI_WORD_SIZE_GET(config->operation); in spi_bitbang_configure()
49 return -ENOTSUP; in spi_bitbang_configure()
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/Zephyr-latest/samples/drivers/led/led_strip/boards/
Dmimxrt1050_evk_mimxrt1052_hyperflash.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/led/led.h>
11 compatible = "worldsemi,ws2812-spi";
13 /* SPI */
14 reg = <0>; /* ignored, but necessary for SPI bindings */
15 spi-max-frequency = <6400000>;
18 chain-length = <2>; /* arbitrary; change at will */
19 spi-cpha;
20 spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */
21 spi-zero-frame = <0xc0>; /* 11000000: 312.5 ns high and 937.5 ns low */
[all …]
Dmimxrt1050_evk_qspi.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/led/led.h>
11 compatible = "worldsemi,ws2812-spi";
13 /* SPI */
14 reg = <0>; /* ignored, but necessary for SPI bindings */
15 spi-max-frequency = <6400000>;
18 chain-length = <2>; /* arbitrary; change at will */
19 spi-cpha;
20 spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */
21 spi-zero-frame = <0xc0>; /* 11000000: 312.5 ns high and 937.5 ns low */
[all …]
Desp32c3_devkitm.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/led/led.h>
11 line-idle-low;
14 compatible = "worldsemi,ws2812-spi";
16 /* SPI */
17 reg = <0>; /* ignored, but necessary for SPI bindings */
18 spi-max-frequency = <6400000>;
21 chain-length = <1>; /* arbitrary; change at will */
22 spi-cpha;
23 spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */
[all …]
Desp32s2_saola.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/led/led.h>
11 line-idle-low;
14 compatible = "worldsemi,ws2812-spi";
16 /* SPI */
17 reg = <0>; /* ignored, but necessary for SPI bindings */
18 spi-max-frequency = <6400000>;
21 chain-length = <1>; /* arbitrary; change at will */
22 spi-cpha;
23 spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */
[all …]
Desp32s3_devkitm_procpu.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/led/led.h>
11 line-idle-low;
14 compatible = "worldsemi,ws2812-spi";
16 /* SPI */
17 reg = <0>; /* ignored, but necessary for SPI bindings */
18 spi-max-frequency = <6400000>;
21 chain-length = <1>; /* arbitrary; change at will */
22 spi-cpha;
23 spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */
[all …]
/Zephyr-latest/dts/bindings/sdhc/
Dzephyr,sdhc-spi-slot.yaml1 description: Generic Zephyr SPI based SDHC controller
3 compatible: "zephyr,sdhc-spi-slot"
5 include: [spi-device.yaml]
8 power-delay-ms:
12 Time in ms for SPI SDHC to delay when toggling power to the SD card. This
16 spi-clock-mode-cpol:
19 Clock polarity to use for SPI SDHC. Some cards respond properly
22 spi-clock-mode-cpha:
26 on the clock's polarity. When mode-cpol is set and this option as well,
30 pwr-gpios:
[all …]
/Zephyr-latest/dts/bindings/mipi-dbi/
Dmipi-dbi-spi-device.yaml2 # SPDX-License-Identifier: Apache-2.0
4 # Common fields for MIPI DBI devices using Mode C (SPI)
6 include: [mipi-dbi-device.yaml]
13 SPI Duplex mode, full or half. By default it's always full duplex thus 0
15 Selecting half duplex allows to use SPI MOSI as a bidirectional line,
18 list (see dt-bindings/spi/spi.h)
21 mipi-cpol:
24 SPI clock polarity which indicates the clock idle state.
26 mipi-cpha:
29 SPI clock phase that indicates on which edge data is sampled.
[all …]
/Zephyr-latest/dts/bindings/spi/
Dnxp,dspi.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: ["spi-controller.yaml", "pinctrl-device.yaml"]
20 pcs-sck-delay:
26 sck-pcs-delay:
32 transfer-delay:
38 pinctrl-0:
41 nxp,rx-tx-chn-share:
48 ctar register selection range form 0-1 for master mode, 0 for slave mode
50 sample-point:
54 This field is valid only when the CPHA bit in the CTAR register is 0.
[all …]
Dspi-device.yaml1 # Copyright (c) 2018, I-SENSE group of ICCS
2 # SPDX-License-Identifier: Apache-2.0
4 # Common fields for SPI devices
8 on-bus: spi
13 spi-max-frequency:
16 description: Maximum clock frequency of device's SPI interface in Hz
24 list (see dt-bindings/spi/spi.h)
28 - 0
29 - 2048
30 frame-format:
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Dnordic,nrf-spim.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Nordic nRF family SPIM (SPI master with EasyDMA)
6 compatible: "nordic,nrf-spim"
8 include: ["nordic,nrf-spi-common.yaml", "memory-region.yaml"]
11 anomaly-58-workaround:
18 rx-delay-supported:
24 rx-delay:
27 - 0
28 - 1
29 - 2
[all …]
/Zephyr-latest/boards/espressif/esp32c3_rust/
Desp32c3_rust.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "esp32c3_rust-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/led/led.h>
16 model = "Espressif ESP32C3-RUST";
22 zephyr,shell-uart = &usb_serial;
24 zephyr,code-partition = &slot0_partition;
30 i2c-0 = &i2c0;
32 led-strip = &led_strip;
[all …]
/Zephyr-latest/boards/segger/ip_k66f/
Dip_k66f.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
11 #include "ip_k66f-pinctrl.dtsi"
20 dsa-spi = &spi1;
26 zephyr,code-partition = &slot0_partition;
30 compatible = "gpio-leds";
44 clock-frequency = <120000000>;
48 pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
49 er32k-select = <KINETIS_SIM_ER32KSEL_RTC>;
52 clock-div = <3>;
[all …]
/Zephyr-latest/boards/st/steval_stwinbx1/
Dsteval_stwinbx1.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/u5/stm32u585aiixq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "STMicroelectronics STEVAL-STWINBX1 Development kit";
19 zephyr,code-partition = &slot0_partition;
21 zephyr,bt-hci = &hci_spi;
25 compatible = "gpio-leds";
37 compatible = "pwm-leds";
41 label = "LED_1 - PWM5";
[all …]
/Zephyr-latest/boards/adafruit/qt_py_esp32s3/
Dadafruit_qt_py_esp32s3_procpu.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
11 #include <zephyr/dt-bindings/led/led.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 #include "adafruit_qt_py_esp32s3-pinctrl.dtsi"
19 compatible = "seeed,xiao-esp32s3";
24 zephyr,shell-uart = &usb_serial;
26 zephyr,code-partition = &slot0_partition;
27 zephyr,bt-hci = &esp32_bt_hci;
31 i2c-0 = &i2c0;
[all …]

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