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/Zephyr-Core-3.6.0/include/zephyr/net/
Dphy.h29 /** @brief Ethernet link speeds. */
104 * This route configures the advertised link speeds.
107 * @param speeds OR'd link speeds to be advertised by the PHY
114 enum phy_link_speed speeds) in phy_configure_link() argument
119 return api->cfg_link(dev, speeds); in phy_configure_link()
/Zephyr-Core-3.6.0/dts/bindings/i2c/
Datmel,sam-i2c-twim.yaml8 unique two-wire bus, made up of one clock line and one data line with speeds
15 When using speeds above standard mode, user may need adjust clock and data
33 std-<line> configures fast/fast-plus mode speeds and hs-<line> selects the
/Zephyr-Core-3.6.0/modules/nanopb/
DKconfig36 decoding with memory buffers. Speeds up execution and slightly
/Zephyr-Core-3.6.0/drivers/i2c/
DKconfig.it8xxx210 Supported Speeds: 100kHz, 400kHz and 1MHz.
Di2c_bitbang.c13 * the Standard-mode and Fast-mode speeds and doesn't support optional
/Zephyr-Core-3.6.0/dts/bindings/ethernet/
Datmel,gmac-common.yaml44 value, enables driver to configure 10 and 100Mbit/s speeds.
Dxlnx,gem.yaml48 interval, link-speed and advertise-lower-link-speeds should be checked
75 perty advertise-lower-link-speeds is set, advertisement of the link
83 advertise-lower-link-speeds:
87 the MDIO bus to include link speeds lower than the nominal value
/Zephyr-Core-3.6.0/drivers/ethernet/phy/
Dphy_microchip_ksz8081.c258 enum phy_link_speed speeds) in phy_mc_ksz8081_cfg_link() argument
289 if (speeds & LINK_FULL_100BASE_T) { in phy_mc_ksz8081_cfg_link()
294 if (speeds & LINK_HALF_100BASE_T) { in phy_mc_ksz8081_cfg_link()
299 if (speeds & LINK_FULL_10BASE_T) { in phy_mc_ksz8081_cfg_link()
304 if (speeds & LINK_HALF_10BASE_T) { in phy_mc_ksz8081_cfg_link()
Dphy_mii.c453 /* Advertise all speeds */ in phy_mii_initialize()
/Zephyr-Core-3.6.0/boards/riscv/rv32m1_vega/support/
Dopenocd_rv32m1_vega_zero_riscy.cfg33 # on burst reads and writes to improve download speeds.
Dopenocd_rv32m1_vega_ri5cy.cfg33 # on burst reads and writes to improve download speeds.
/Zephyr-Core-3.6.0/dts/bindings/bluetooth/
Dinfineon,cyw43xxx-bt-hci.yaml34 speeds for firmware download (fw-download-speed) and HCI operation
/Zephyr-Core-3.6.0/subsys/sd/
DKconfig101 reduce code size, at the cost of data transfer speeds.
Dsdmmc.c698 /* Read switch capabilities to determine what speeds card supports */ in sdmmc_card_init()
/Zephyr-Core-3.6.0/tests/kernel/timer/timer_behavior/
DREADME67 depends on the board's clock). Different clocks run at different speeds, so
/Zephyr-Core-3.6.0/drivers/serial/
DKconfig.nrfx_uart_instance61 that with higher speeds and/or high cpu load some data can be lost.
/Zephyr-Core-3.6.0/boards/arm/cy8cproto_062_4343w/
Dcy8cproto_062_4343w.dts63 /* Configuration UART speeds for firmware download (fw-download-speed) and
/Zephyr-Core-3.6.0/doc/hardware/peripherals/
Dw1.rst14 The 1-Wire bus supports longer bus lines than I2C, while it reaches speeds of up
/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/pm/
Dimx_spc.h10 * of set points to determine the clock speeds and states of cores, as well
/Zephyr-Core-3.6.0/tests/boards/native_sim/rtc/src/
Dmain.c58 /* This ratio adjustments lead to test speeds 0.25x, 0.5x, 1x, 2x & 4x*/ in ZTEST()
/Zephyr-Core-3.6.0/include/zephyr/bluetooth/audio/
Dmcs.h33 /** @brief Playback speeds
/Zephyr-Core-3.6.0/doc/project/
Ddev_env_and_tools.rst260 being forgotten, speeds up reviewing, avoids duplicate issue reports, etc.
/Zephyr-Core-3.6.0/drivers/ethernet/
Deth_smsc911x.c291 * Advertise all speeds and pause capabilities
Deth_xlnx_gem_priv.h549 * plus all link speeds supported by the controller (10/100/1000).
/Zephyr-Core-3.6.0/drivers/i2s/
Di2s_sam_ssc.c18 * to handle high speed data. To support higher transfer speeds the DMA

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