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/Zephyr-latest/dts/bindings/clock/
Dst,stm32wb0-lsi-clock.yaml9 allows to adapt all frequency-based calculations to a somewhat accurate value, ensuring
/Zephyr-latest/cmake/compiler/xcc/
Dcompiler_flags.cmake5 # XCC is based on GCC 4.2 which has a somewhat pedantic take on the
/Zephyr-latest/doc/kernel/data_structures/
Drbtree.rst50 implementation, at the cost of a somewhat more cumbersome API for the
98 intrusive, that cannot work. Zephyr must include somewhat more
116 somewhat unique to Zephyr.
Ddlist.rst11 pointers per node, and thus has somewhat higher runtime code and
/Zephyr-latest/scripts/net/
Denumerate_http_status.py11 The output may appear somewhat redundant but it strives
/Zephyr-latest/soc/intel/intel_adsp/common/include/
Dcpu_init.h49 * details of the fields are somewhat complicated, but per the in cpu_early_init()
Dcavs-idc.h14 * is... somewhat needlessly complicated.
/Zephyr-latest/lib/heap/
DKconfig88 a higher runtime overhead and somewhat bigger code footprint.
/Zephyr-latest/include/zephyr/arch/x86/intel64/
Dthread.h57 * Architecturally-defined portion. It is somewhat tedious to
/Zephyr-latest/kernel/
DKconfig.smp22 architecture provides both, _arch_switch incurs more somewhat
/Zephyr-latest/tests/drivers/sensor/temp_sensor/src/
Dmain.c78 /* Set the upper threshold somewhat below the temperature read above. */ in ZTEST()
/Zephyr-latest/dts/riscv/openisa/
Drv32m1_ri5cy.dtsi41 * INTMUX channels below are somewhat arbitrary.
Drv32m1_zero_riscy.dtsi41 * INTMUX channels below are somewhat arbitrary.
/Zephyr-latest/arch/xtensa/core/
DREADME_WINDOWS.rst50 The name "start" is somewhat confusing, this is not a pointer.
DREADME_MMU.txt4 management on Xtensa is somewhat unique. And there is similarly a
129 same way we do for data, but somewhat inexplicably, Xtensa does not
/Zephyr-latest/tests/kernel/threads/dynamic_thread/src/
Dmain.c152 * case to simplify things somewhat. in ZTEST()
/Zephyr-latest/tests/arch/x86/static_idt/src/
Dmain.c25 /* These vectors are somewhat arbitrary. We try and use unused vectors */
/Zephyr-latest/drivers/interrupt_controller/
Dintc_sam0_eic_priv.h23 * Unfortunately the ASF headers define the EIC mappings somewhat painfully:
/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Dxtensa.py115 # Somewhat arbitrary; included only because GDB requests it
/Zephyr-latest/boards/acrn/acrn/doc/
Dindex.rst6 this to work is somewhat involved, however.
/Zephyr-latest/arch/x86/core/ia32/
Dswap.S377 * GDB stack unwinder to stop somewhat gracefully.
/Zephyr-latest/doc/kernel/services/scheduling/
Dindex.rst112 queues will be somewhat slower (though this is not generally a performance
/Zephyr-latest/doc/kernel/services/smp/
Dsmp.rst323 somewhat lower-level context switch primitives for SMP systems:
/Zephyr-latest/drivers/i2c/
Di2c_xilinx_axi.c497 /* TX FIFO empty detection is somewhat fragile because the status register in i2c_xilinx_axi_write()
/Zephyr-latest/doc/services/storage/zms/
Dzms.rst393 Today Zephyr includes at least two other systems that are somewhat comparable in scope and

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