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Searched +full:smps +full:- +full:clock +full:- +full:prescaler (Results 1 – 7 of 7) sorted by relevance

/Zephyr-latest/dts/bindings/power/
Dst,stm32wb0-pwr.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "st,stm32wb0-pwr"
8 include: "st,stm32-pwr.yaml"
11 smps-mode:
15 SMPS mode selection
18 - SMPS converter disabled
19 - LDOs supply voltage: VDD
21 WARNING: The SMPS must not be disabled on board using the
22 'SMPS supply configuration', so this mode should NEVER be
26 Refer to RM0505 §5.5 "SMPS step down regulator" for details.
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/Zephyr-latest/soc/st/stm32/stm32wb0x/
Dsoc.c4 * SPDX-License-Identifier: Apache-2.0
29 * CMSIS System Core Clock: global variable holding the system core clock,
32 * On STM32WB0 series, after RESET, the system clock frequency is 16MHz.
63 "smps-bom must be specified");
87 /* Configure SMPS clock prescaler */ in configure_smps()
91 /* Disable SMPS */ in configure_smps()
95 /* Wait for SMPS to turn off */ in configure_smps()
101 /* Configure low-power mode */ in configure_smps()
104 /* Enable SMPS */ in configure_smps()
108 /* Wait for SMPS to turn on */ in configure_smps()
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/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_h7.c7 * SPDX-License-Identifier: Apache-2.0
22 /* Macros to fill up prescaler values */
51 /* Macro to check for clock feasibility */
52 /* It is Cortex M7's responsibility to setup clock tree */
67 /* Given source clock and dividers, computed the output frequency of PLLP */
78 /* SYSCLKSRC before the D1CPRE prescaler */
89 /* ARM Sys CPU Clock before HPRE prescaler */
162 /* end of clock feasibility check */
169 * D1CPRE prescaler allows to set a HCLK frequency lower than SYSCLK frequency.
171 * So, changing this prescaler is not allowed until it is made possible to
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/Zephyr-latest/boards/st/nucleo_wb05kz/
Dnucleo_wb05kz.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/wb0/stm32wb05kzvx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "STMicroelectronics STM32WB05KZ-NUCLEO board";
16 compatible = "st,stm32wb05kz-nucleo";
18 #address-cells = <1>;
19 #size-cells = <1>;
23 zephyr,shell-uart = &usart1;
26 zephyr,bt-c2h-uart = &usart1;
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/Zephyr-latest/boards/st/nucleo_wb09ke/
Dnucleo_wb09ke.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/wb0/stm32wb09kevx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "STMicroelectronics STM32WB09KE-NUCLEO board";
16 compatible = "st,stm32wb09ke-nucleo";
18 #address-cells = <1>;
19 #size-cells = <1>;
23 zephyr,shell-uart = &usart1;
26 zephyr,bt-c2h-uart = &usart1;
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/Zephyr-latest/doc/releases/
Drelease-notes-2.7.rst17 * Support for M-Profile Vector Extensions (MVE) on ARMv8.1-M
18 * Improved thread safety for Newlib and C++ on SMP-capable systems
20 * New Action-based Power Management API
23 * Linker Support for Tightly-Coupled Memory in RISC-V
25 * Support for extended PCI / PCIe capabilities, improved MIS-X support
33 * The kernel now supports both 32- and 64-bit architectures
36 * We added support for Point-to-Point Protocol (PPP)
37 * We added support for UpdateHub, an end-to-end solution for over-the-air device updates
38 * We added support for ARM Cortex-R Architecture
40 * Expanded support for ARMv6-M architecture
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Drelease-notes-3.0.rst22 * CVE-2021-3835: `Zephyr project bug tracker GHSA-fm6v-8625-99jf
23 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-fm6v-8625-99jf>`_
25 * CVE-2021-3861: `Zephyr project bug tracker GHSA-hvfp-w4h8-gxvj
26 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-hvfp-w4h8-gxvj>`_
28 * CVE-2021-3966: `Zephyr project bug tracker GHSA-hfxq-3w6x-fv2m
29 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-hfxq-3w6x-fv2m>`_
36 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
53 * Added ``ranges`` and ``dma-ranges`` as invalid property to be used with DT_PROP_LEN()
58 CRC-16-ANSI checksum. A new function, :c:func:`crc16_reflect`, has been
69 * The following Kconfig options related to radio front-end modules (FEMs) were
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