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/Zephyr-Core-3.5.0/samples/boards/stm32/uart/single_wire/
DREADME.rst1 .. zephyr:code-sample:: uart-stm32-single-wire
2 :name: STM32 single-wire UART
3 :relevant-api: uart_interface
5 Use single-wire/half-duplex UART functionality of STM32 devices.
10 A simple application demonstrating how to use the single wire / half-duplex UART
23 .. zephyr-app-commands::
24 :zephyr-app: samples/boards/stm32/uart/single_wire
32 .. code-block:: none
Dsample.yaml2 name: STM32 Single Wire UART sample
7 - drivers
8 - uart
14 - "Received c"
/Zephyr-Core-3.5.0/dts/bindings/w1/
Dzephyr,w1-serial.yaml2 # SPDX-License-Identifier: Apache-2.0
4 # Properties for the serial 1-Wire master driver:
7 # the option for a "single-wire Half-duplex" mode, where the TX and RX lines
8 # are internally connected, such that only a single IO
9 # needs to be allocated for the 1-Wire communication.
11 description: 1-Wire master over Zephyr uart
13 compatible: "zephyr,w1-serial"
15 include: [uart-device.yaml, w1-master.yaml]
Dmaxim,ds2477_85_common.yaml2 # SPDX-License-Identifier: Apache-2.0
4 # Common Properties for the DS2477 and DS2485 I2C 1-Wire masters:
6 include: [w1-master.yaml, i2c-device.yaml]
9 switching-threshold:
13 - "low"
14 - "medium"
15 - "high"
16 - "off"
18 Default Low-to-High Switching Threshold.
26 active-pull-threshold:
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Dmaxim,ds2484.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: DS4284 Single-Channel 1-Wire Master
8 include: [i2c-device.yaml, w1-master.yaml]
11 slpz-gpios:
12 type: phandle-array
/Zephyr-Core-3.5.0/samples/boards/stm32/uart/single_wire/boards/
Dstm32f3_disco.overlay4 * SPDX-License-Identifier: Apache-2.0
9 single-line-uart1 = &usart2;
10 single-line-uart2 = &uart4;
15 pinctrl-0 = <&usart2_tx_pa2>;
16 single-wire;
20 pinctrl-0 = <&uart4_tx_pc10>;
21 single-wire;
/Zephyr-Core-3.5.0/drivers/w1/
DKconfig1 # 1-Wire configuration options
4 # SPDX-License-Identifier: Apache-2.0
8 prompt "1-Wire bus drivers"
11 Enable 1-Wire Drivers
16 module-str = W1
24 1-Wire device driver initialization priority.
27 bool "1-Wire Shell"
31 Enable 1-Wire Shell for testing.
37 prompt "1-Wire Shell buffer size"
43 rsource "Kconfig.ds2482-800"
[all …]
DKconfig.ds24842 # SPDX-License-Identifier: Apache-2.0
5 bool "DS2484 Single-Channel 1-Wire Master"
/Zephyr-Core-3.5.0/doc/hardware/peripherals/
Dw1.rst3 1-Wire Bus
9 1-Wire is a low speed half-duplex serial bus using only a single wire plus
11 Similarly to I2C, 1-Wire uses a bidirectional open-collector data line,
12 and is a single master multidrop bus. This means one master initiates all data
14 The 1-Wire bus supports longer bus lines than I2C, while it reaches speeds of up
23 .. figure:: 1-Wire_bus_topology.drawio.svg
25 :alt: 1-Wire bus topology
27 A typical 1-Wire bus topology
30 .. _w1-master-api:
35 Zephyr's 1-Wire Master API is used to interact with 1-Wire slave devices like
[all …]
Despi.rst10 based on SPI. It also features a four-wire interface (receive, transmit, clock
11 and slave select) and three configurations: single IO, dual IO and quad IO.
27 …https://www.intel.com/content/dam/support/us/en/documents/software/chipset-software/327432-004_esp…
/Zephyr-Core-3.5.0/include/zephyr/drivers/
Dw1.h5 * SPDX-License-Identifier: Apache-2.0
10 * @brief Public 1-Wire Driver APIs
27 * @brief 1-Wire Interface
28 * @defgroup w1_interface 1-Wire Interface
38 * only a single slave is present.
44 (FOR_EACH(F1, (+), DT_SUPPORTS_DEP_ORDS(node_id)) - 1)
51 * @brief Defines the 1-Wire master settings types, which are runtime configurable.
72 /** Configuration common to all 1-Wire master implementations. */
78 /** Data common to all 1-Wire master implementations. */
116 struct w1_master_data *ctrl_data = (struct w1_master_data *)dev->data; in z_impl_w1_change_bus_lock()
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/Zephyr-Core-3.5.0/subsys/bluetooth/controller/coex/
Dreadme.rst2 Bluetooth co-existence drivers
5 Co-existence Ticker
8 …cker.c` is designed to utilize co-existence with another transmitter. Chips such as nordic nRF9160…
10 Nordic connect SDK provides detailed description of the 1-wire and 3-wire co-existence interface fo…
12 …ilarly, as in the nordic implementation of the 1-wire interface, the coexistence ticker utilizes a…
14 .. code-block:: DTS
17 compatible = "gpio-radio-coex";
18 grant-gpios = <&gpio0 0 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
19 grant-delay-us = <150>;
22 Whenever the grant pin transitions into non-active (such as 1 for the nRF9160). state the implement…
/Zephyr-Core-3.5.0/dts/bindings/debug/
Darm,armv7m-itm.yaml2 # SPDX-License-Identifier: Apache-2.0
5 ARMv7 instrumentation trace macrocell. Used for single wire output (SWO)
7 compatible: "arm,armv7m-itm"
Darm,armv8m-itm.yaml2 # SPDX-License-Identifier: Apache-2.0
5 ARMv8 instrumentation trace macrocell. Used for single wire output (SWO)
7 compatible: "arm,armv8m-itm"
/Zephyr-Core-3.5.0/dts/bindings/serial/
Dst,stm32-uart-base.yaml2 # SPDX-License-Identifier: Apache-2.0
5 description: STM32 UART-BASE
7 include: [uart-controller.yaml, pinctrl-device.yaml, reset-device.yaml]
22 single-wire:
25 Enable the single wire half-duplex communication.
30 tx-rx-swap:
35 tx-invert:
41 rx-invert:
47 pinctrl-0:
50 pinctrl-names:
[all …]
/Zephyr-Core-3.5.0/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/
Dradio_nrf5_ppi_resources.h4 * SPDX-License-Identifier: Apache-2.0
9 /* PPI channel 20 is pre-programmed with the following fixed settings:
10 * EEP: TIMER0->EVENTS_COMPARE[0]
11 * TEP: RADIO->TASKS_TXEN
14 /* PPI channel 21 is pre-programmed with the following fixed settings:
15 * EEP: TIMER0->EVENTS_COMPARE[0]
16 * TEP: RADIO->TASKS_RXEN
20 /* PPI channel 26 is pre-programmed with the following fixed settings:
21 * EEP: RADIO->EVENTS_ADDRESS
22 * TEP: TIMER0->TASKS_CAPTURE[1]
[all …]
Dradio_nrf5_dppi_resources.h4 * SPDX-License-Identifier: Apache-2.0
10 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
17 * wire the RADIO EVENTS_ADDRESS event to the
24 * wire the EVENT_TIMER EVENTS_COMPARE[<HCTO timer>] event
31 * wire the RADIO EVENTS_END event to the
38 * wire the RTC0 EVENTS_COMPARE[2] event to EVENT_TIMER TASKS_START task.
44 * wire the RADIO EVENTS_READY event to the
51 * wire the RADIO EVENTS_ADDRESS event to the CCM TASKS_CRYPT task.
60 * wire the RADIO EVENTS_BCMATCH event to the AAR TASKS_START task.
83 /* DPPI setup used for SW-based auto-switching during TIFS. */
[all …]
Dradio_nrf5_ppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
20 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
22 * Use the pre-programmed PPI channels if possible (if TIMER0 is used as the
29 /* No need to configure anything for the pre-programmed channels. in hal_radio_enable_on_tick_ppi_config_and_enable()
48 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
49 (uint32_t)&(NRF_RADIO->TASKS_TXEN)); in hal_radio_enable_on_tick_ppi_config_and_enable()
52 NRF_PPI->CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX] = in hal_radio_enable_on_tick_ppi_config_and_enable()
57 (uint32_t)&(NRF_PPI->TASKS_CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX].DIS)); in hal_radio_enable_on_tick_ppi_config_and_enable()
65 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
[all …]
Dradio_nrf5_dppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
20 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
57 * wire the RADIO EVENTS_ADDRESS event to the
70 * wire the EVENT_TIMER EVENTS_COMPARE[<HCTO timer>] event
83 * wire the RADIO EVENTS_END event to the
95 * wire the RTC0 EVENTS_COMPARE[2] event to EVENT_TIMER TASKS_START task.
105 * wire the RADIO EVENTS_READY event to the
118 * wire the RADIO EVENTS_ADDRESS event to the CCM TASKS_CRYPT task.
141 * wire the RADIO EVENTS_BCMATCH event to the CCM TASKS_CRYPT task.
[all …]
/Zephyr-Core-3.5.0/samples/sensor/ds18b20/boards/
Dnucleo_g0b1re.overlay4 * SPDX-License-Identifier: Apache-2.0
12 * b) the UART TX pin only, while the single wire half-duplex mode is enabled.
13 * An external pull-up should be added anyways.
19 drive-open-drain;
20 bias-pull-up;
/Zephyr-Core-3.5.0/drivers/bluetooth/hci/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
28 Bluetooth three-wire (H:5) UART driver. Implementation of HCI
29 Three-Wire UART Transport Layer.
45 HCI packets are sent and received as single Byte transfers,
96 Single CPU mode.
114 bool "ACI message with with BlueNRG-based devices"
117 Stack. Current driver supports: ST BLUENRG-MS.
120 bool "Compatibility with BlueNRG-based devices"
123 Stack. Current driver supports: ST BLUENRG-MS.
140 Infineon's AIROC™ Wi-Fi & combos portfolio integrates
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/Zephyr-Core-3.5.0/drivers/serial/
Duart_stm32.h2 * Copyright (c) 2016 Open-RnD Sp. z o.o.
4 * SPDX-License-Identifier: Apache-2.0
36 /* switch to enable single wire / half duplex feature */
59 /* Device defined as wake-up source */
/Zephyr-Core-3.5.0/drivers/sensor/ds18b20/
Dds18b20.c4 * SPDX-License-Identifier: Apache-2.0
8 * Driver for DS18B20 1-Wire temperature sensors
27 /* measure wait time for 9-bit, 10-bit, 11-bit, 12-bit resolution respectively */
35 val->val1 = temp / 16; in ds18b20_temperature_from_raw()
36 val->val2 = (temp % 16) * 1000000 / 16; in ds18b20_temperature_from_raw()
45 struct ds18b20_data *data = dev->data; in ds18b20_write_scratchpad()
54 return w1_write_read(bus, &data->config, sp_data, sizeof(sp_data), NULL, 0); in ds18b20_write_scratchpad()
60 struct ds18b20_data *data = dev->data; in ds18b20_read_scratchpad()
64 return w1_write_read(bus, &data->config, &cmd, 1, in ds18b20_read_scratchpad()
72 struct ds18b20_data *data = dev->data; in ds18b20_temperature_convert()
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/Zephyr-Core-3.5.0/dts/bindings/i2c/
Datmel,sam-i2c-twim.yaml1 # Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
2 # SPDX-License-Identifier: Apache-2.0
7 The Atmel Two-wire Master Interface (TWIM) interconnects components on a
8 unique two-wire bus, made up of one clock line and one data line with speeds
9 of up to 3.4 Mbit/s, based on a byte-oriented transfer format. The TWIM is
10 always a bus master and can transfer sequential or single bytes. Multiple
20 std-clk-slew-lim = <0>;
21 std-clk-strength-low = "0.5";
22 std-data-slew-lim = <0>;
23 std-data-strength-low = "0.5";
[all …]
/Zephyr-Core-3.5.0/doc/hardware/peripherals/canbus/
Dcontroller.rst13 Controller Area Network is a two-wire serial bus specified by the
14 Bosch CAN Specification, Bosch CAN with Flexible Data-Rate specification and the
15 ISO 11898-1:2003 standard.
20 from the CAN controller to the bus-levels. The bus lines are called
22 The transmit wire from the controller to the transceiver is called CAN TX,
23 and the receive wire is called CAN RX.
24 These wires use the logic levels whereas the bus-level is interpreted
29 To write a dominant bit to the bus, open-drain transistors tie CAN H to Vdd
31 The first and last node use a 120-ohm resistor between CAN H and CAN L to
33 This structure is called a wired-AND.
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