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/Zephyr-Core-3.6.0/drivers/memc/
Dmemc_nxp_s32_qspi.c115 #define QSPI_DLL_CFG(n, side, side_upper) \ argument
119 DT_INST_STRING_UPPER_TOKEN(n, side##_dll_mode)), \
120 .freqEnable = DT_INST_PROP(n, side##_dll_freq_enable), \
121 .coarseDelay = DT_INST_PROP(n, side##_dll_coarse_delay), \
122 .fineDelay = DT_INST_PROP(n, side##_dll_fine_delay), \
123 .tapSelect = DT_INST_PROP(n, side##_dll_tap_select), \
125 .referenceCounter = DT_INST_PROP(n, side##_dll_ref_counter), \
126 .resolution = DT_INST_PROP(n, side##_dll_resolution), \
131 #define QSPI_READ_MODE(n, side, side_upper) \ argument
132 _CONCAT(QSPI_IP_READ_MODE_, DT_INST_STRING_UPPER_TOKEN(n, side##_rx_clock_source))
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/Zephyr-Core-3.6.0/dts/bindings/pwm/
Dinfineon,xmc4xxx-ccu8-pwm.yaml7 The PWM CCU8 module can automatically generate a high-side
8 and a low-side PWM signal, where the two signals are complementary
11 The module supports adding a dead time between the high-side and
12 low-side PWM signals.
15 transitions from 0 to 1, preventing the high-side and low-side
20 two channels. A channel consists of a corresponding high-side
21 and low-side PWM signal.
47 and low side PWM signals.
60 'HIGH_LOW' indicates whether the pin is for the high or low-side signal.
62 It's not necessary to specify both the high and low pinctrls. Only the low-side
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/Zephyr-Core-3.6.0/doc/_doxygen/
Ddoxygen-awesome-sidebar-only.css31 /* side nav width. MUST be = `TREEVIEW_WIDTH`.
34 --side-nav-fixed-width: 335px;
52 #side-nav {
53 min-width: var(--side-nav-fixed-width);
54 max-width: var(--side-nav-fixed-width);
59 #nav-tree, #side-nav {
72 max-width: var(--side-nav-fixed-width);
74 background: var(--side-nav-background);
91 left: var(--side-nav-fixed-width);
101 margin-left: var(--side-nav-fixed-width) !important;
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Ddoxygen-awesome-zephyr.css15 --side-nav-background: #333f67;
16 --side-nav-foreground: #c3e3ff;
24 --side-nav-fixed-width: 300px;
38 --side-nav-background: #252628;
39 --side-nav-foreground: var(--page-foreground-color);
54 --side-nav-background: #252628;
55 --side-nav-foreground: var(--page-foreground-color);
74 background: var(--side-nav-background);
104 color: var(--side-nav-foreground);
Ddoxygen-awesome-sidebar-only-darkmode-toggle.css33 …width: calc(var(--side-nav-fixed-width) - calc(2 * var(--spacing-medium)) - var(--searchbar-height…
37 …width: calc(var(--side-nav-fixed-width) - calc(2 * var(--spacing-medium)) - 66px - var(--searchbar…
/Zephyr-Core-3.6.0/dts/bindings/usb/uac2/
Dzephyr,uac2-channel-cluster.yaml43 side-left:
45 description: Side Left channel present in the cluster
47 side-right:
49 description: Side Right channel present in the cluster
95 top-side-left:
97 description: Top Side Left channel present in the cluster
99 top-side-right:
101 description: Top Side Right channel present in the cluster
/Zephyr-Core-3.6.0/dts/bindings/ipc/
Dzephyr,ipc-icmsg.yaml27 Data cache alignment. If any side of the communication uses cache on
30 If no side of the communication uses data cache this property could be
33 Side A: no data cache
34 Side B: 32 Bytes write-back size, 16 Bytes invalidation size
/Zephyr-Core-3.6.0/lib/utils/
Drb.c21 static struct rbnode *get_child(struct rbnode *n, uint8_t side) in get_child() argument
24 if (side != 0U) { in get_child()
34 static void set_child(struct rbnode *n, uint8_t side, void *val) in set_child() argument
37 if (side != 0U) { in set_child()
87 uint8_t side = tree->lessthan_fn(node, stack[sz - 1]) ? 0U : 1U; in find_and_stack() local
88 struct rbnode *ch = get_child(stack[sz - 1], side); in find_and_stack()
100 struct rbnode *z_rb_get_minmax(struct rbtree *tree, uint8_t side) in z_rb_get_minmax() argument
104 for (n = tree->root; (n != NULL) && (get_child(n, side) != NULL); in z_rb_get_minmax()
105 n = get_child(n, side)) { in z_rb_get_minmax()
121 * its mirror if N is on the other side of P, of course):
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/Zephyr-Core-3.6.0/dts/bindings/qspi/
Dnxp,s32-qspi.yaml119 Selects DQS clock source for sampling read data at side A:
130 This property applies to side A of the controller.
137 This property applies to side A of the controller.
148 This property applies to side A of the controller.
154 This property applies to side A of the controller.
164 This property applies to side A of the controller.
174 This property applies to side A of the controller.
184 This property applies to side A of the controller.
194 This property applies to side A of the controller.
203 This property applies to side A of the controller.
/Zephyr-Core-3.6.0/drivers/serial/
Duart_native_ptty_bottom.c76 * @brief Check if the output descriptor has something connected to the slave side
81 * @retval 1 Something connected to the slave side
103 /* There is now a reader on the slave side */ in np_uart_slave_connected()
110 * Attempt to connect a terminal emulator to the slave side of the pty
131 * Returns the file descriptor of the master side
133 * emulator to its slave side.
153 ERROR("Could not grant access to the slave PTY side (%i)\n", in np_uart_open_ptty()
160 ERROR("Could not unlock the slave PTY side (%i)\n", err_nbr); in np_uart_open_ptty()
223 ERROR("%s: Could not open terminal from the slave side (%i,%s)\n", in np_uart_open_ptty()
229 ERROR("%s: Could not close terminal from the slave side (%i,%s)\n", in np_uart_open_ptty()
/Zephyr-Core-3.6.0/dts/bindings/gpio/
Dmikro-bus.yaml14 This binding provides a nexus mapping for 10 pins, left side pins are
15 numbered 0 - 5 (AN - MOSI), the right side pins are numbered 6 - 10
16 (PWM - SDA). The bottom 2 pins on each side are used for input voltage
Datmel-xplained-pro-header.yaml14 * PWR is right angled at the top right hand side of the board. This
16 * EXT1 is right angled at the top right hand side of the board, located
18 * EXT2 is right angled and at the bottom right hand side of the board.
Darduino-mkr-header.yaml9 * One side of the 14-pin header is analog inputs and digital signals.
13 * The other side 14-pin header is power supplies and peripheral interface.
/Zephyr-Core-3.6.0/tests/bluetooth/host/id/bt_id_add/src/
Dmain.c70 * Test adding key to the resolving list when host side resolving is used
97 * Test adding key to the resolving list if host side resolving isn't used.
114 /* Break the host-side resolving condition */ in ZTEST()
146 * Test adding key to the resolving list if host side resolving isn't used.
168 /* Break the host-side resolving condition */ in ZTEST()
190 * Test adding key to the resolving list if host side resolving isn't used.
213 /* Break the host-side resolving condition */ in ZTEST()
231 * Test adding key to the resolving list if host side resolving isn't used.
262 /* Break the host-side resolving condition */ in ZTEST()
316 /* Break the host-side resolving condition */ in ZTEST()
/Zephyr-Core-3.6.0/tests/bluetooth/host/id/bt_id_del/src/
Dmain.c103 * Test deleting key from the resolving list if host side resolving isn't used.
120 /* Break the host-side resolving condition */ in ZTEST()
152 * Test deleting key from the resolving list if host side resolving isn't used.
174 /* Break the host-side resolving condition */ in ZTEST()
196 * Test deleting key from the resolving list when host side resolving isn't used.
222 /* Break the host-side resolving condition */ in ZTEST()
247 * Test deleting key from the resolving list when host side resolving isn't used.
274 /* Break the host-side resolving condition */ in ZTEST()
299 * Test deleting key from the resolving list when host side resolving isn't used.
324 /* Break the host-side resolving condition */ in ZTEST()
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/Zephyr-Core-3.6.0/samples/tfm_integration/tfm_ipc/
Dsample.yaml2 description: This app provides an example of using TF-M on the secure side, with
3 Zephyr on the NS side, using IPC.
/Zephyr-Core-3.6.0/subsys/console/
DKconfig35 large host-side clipboard pastes. Set to 0 to disable
44 large host-side clipboard pastes. Set to 0 to disable
/Zephyr-Core-3.6.0/scripts/west_commands/zspdx/
Ddatatypes.py113 # side)
137 # for the "owner" element (e.g., the left side of the Relationship),
150 # for the "other" element (e.g., the right side of the Relationship),
174 # SPDX ID for left side of relationship
178 # SPDX ID for right side of relationship
224 # Relationships "owned" by this File (e.g., this File is left side)
/Zephyr-Core-3.6.0/samples/drivers/ipm/ipm_ivshmem/src/
Dmain.c43 "Send notification to other side using IPM",
49 "Send notification to other side using IPM",
/Zephyr-Core-3.6.0/soc/xtensa/intel_adsp/common/include/
Dintel_adsp_ipc.h25 * complete and return notification to the other side (via the TDA
35 * @param data Message data from other side (low bits of TDR register).
47 * received from the other side of the connection (indicating that a
115 * Notify the other side that the current in-progress message is
137 * Sends a message to the other side of an IPC link. The data and
170 * Sends a message to the other side of an IPC link. The data and ext_data parameters are passed
/Zephyr-Core-3.6.0/subsys/ipc/ipc_service/lib/
Dipc_rpmsg.c31 * *NOT* called on the REMOTE side. The bound_cb() in ns_bind_cb()
33 * REMOTE side if needed. in ns_bind_cb()
63 * the ns_bind_cb() callback function on the HOST side. in ipc_rpmsg_register_ept()
/Zephyr-Core-3.6.0/tests/unit/rbtree/
Dmain.c94 int side, bheight = blacks_above + z_rb_is_black(node); in check_rbnode() local
96 for (side = 0; side < 2; side++) { in check_rbnode()
97 struct rbnode *ch = z_rb_child(node, side); in check_rbnode()
101 if (side == 0) { in check_rbnode()
/Zephyr-Core-3.6.0/doc/_static/css/
Dcustom.css515 .wy-side-nav-search > a img.logo {
517 … /* A 5 pixel margin is added on each side. The logo itself displays at 200×100 at 100% scaling. */
522 .wy-side-nav-search {
526 .wy-side-nav-search.fixed {
533 .wy-side-nav-search.fixed-and-scrolled::after {
545 .wy-side-nav-search > a:hover,
546 .wy-side-nav-search .wy-dropdown > a:hover {
550 .wy-side-nav-search > a:active,
551 .wy-side-nav-search .wy-dropdown > a:active {
555 .wy-side-nav-search input[type=search] {
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/Zephyr-Core-3.6.0/dts/bindings/clock/
Dst,stm32mp1-rcc.yaml6 On STM32MP1 platforms, clock control configuration is performed on A9 side.
/Zephyr-Core-3.6.0/samples/drivers/adc/boards/
Dlpcxpresso55s69_cpu0.overlay34 * CH0A (plus side) is routed to P19 pin 4
35 * CH0B (minus side) is routed to P19 pin 2

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