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/Zephyr-Core-3.5.0/include/zephyr/dsp/
Dprint_format.h32 static inline int64_t ___PRIq_arg_shift(int64_t q, int shift) in ___PRIq_arg_shift() argument
34 if (shift < 0) { in ___PRIq_arg_shift()
35 return llabs(q) >> -shift; in ___PRIq_arg_shift()
37 return llabs(q) << shift; in ___PRIq_arg_shift()
45 #define __PRIq_arg_shift(q, shift) ___PRIq_arg_shift(q, ((shift) + (8 * (4 - (int)sizeof(q))))) argument
46 #define __PRIq_arg_get(q, shift, h, l) FIELD_GET(GENMASK64(h, l), __PRIq_arg_shift(q, shift)) argument
47 #define __PRIq_arg_get_int(q, shift) __PRIq_arg_get(q, shift, 63, 31) argument
48 #define __PRIq_arg_get_frac(q, precision, shift) \ argument
49 ((__PRIq_arg_get(q, shift, 30, 0) * __CONSTPOW(1, precision)) / INT32_MAX)
56 * @param[in] shift The "scale" to shift @p q by
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/Zephyr-Core-3.5.0/drivers/sensor/icm42688/
Dicm42688_emul.c125 * sensitivity and shift. See datasheet section 3.2, table 2.
128 int8_t *shift) in icm42688_emul_get_accel_settings() argument
141 /* shift is based on `fs_g * 9.8` since the final numbers will be in SI units of in icm42688_emul_get_accel_settings()
171 if (shift) { in icm42688_emul_get_accel_settings()
172 *shift = shift_out; in icm42688_emul_get_accel_settings()
181 q31_t *epsilon, int8_t *shift) in icm42688_emul_get_accel_ranges() argument
186 icm42688_emul_get_accel_settings(target, &fs_g, &sensitivity, shift); in icm42688_emul_get_accel_ranges()
189 *epsilon = (3 * SENSOR_G * Q31_SCALE / sensitivity / 1000000LL / 2) >> *shift; in icm42688_emul_get_accel_ranges()
190 *upper = (fs_g * SENSOR_G * Q31_SCALE / 1000000LL) >> *shift; in icm42688_emul_get_accel_ranges()
196 * along with corresponding sensitivity and shift. See datasheet section 3.1, table 1.
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Dicm42688_decoder.c17 static int icm42688_get_shift(enum sensor_channel channel, int accel_fs, int gyro_fs, int8_t *shift) in icm42688_get_shift() argument
26 *shift = 5; in icm42688_get_shift()
29 *shift = 6; in icm42688_get_shift()
32 *shift = 7; in icm42688_get_shift()
35 *shift = 8; in icm42688_get_shift()
46 *shift = -1; in icm42688_get_shift()
49 *shift = 0; in icm42688_get_shift()
52 *shift = 1; in icm42688_get_shift()
55 *shift = 2; in icm42688_get_shift()
58 *shift = 3; in icm42688_get_shift()
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/Zephyr-Core-3.5.0/include/zephyr/drivers/
Demul_sensor.h30 int8_t shift);
33 q31_t *upper, q31_t *epsilon, int8_t *shift);
57 * @param shift Shift value (scaling factor) applied to \p value
64 q31_t value, int8_t shift) in emul_sensor_backend_set_channel() argument
73 return api->set_channel(target, ch, value, shift); in emul_sensor_backend_set_channel()
88 * @param[out] shift The shift value (scaling factor) associated with \p lower, \p upper, and
97 q31_t *upper, q31_t *epsilon, int8_t *shift) in emul_sensor_backend_get_sample_range() argument
106 return api->get_sample_range(target, ch, lower, upper, epsilon, shift); in emul_sensor_backend_get_sample_range()
/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-rcar-common.h16 * @param shift the bit shift for this alternate function.
20 * Function shift [ 4 : 9 ]
23 #define IPSR(bank, shift, func) (((bank) << 10U) | ((shift) << 4U) | (func)) argument
/Zephyr-Core-3.5.0/tests/drivers/build_all/sensor/src/
Dgeneric_test.c112 int8_t shift; in run_generic_test() local
115 &channel_table[ch].epsilon, &shift) == 0) { in run_generic_test()
119 LOG_INF("CH %d: lower=%d, upper=%d, eps=%d, shift=%d", ch, lower, upper, in run_generic_test()
120 channel_table[ch].epsilon, shift); in run_generic_test()
129 channel_table[ch].expected_value_shift = shift; in run_generic_test()
214 int8_t shift; in run_generic_test() local
222 shift = decoded_data.three_axis.shift; in run_generic_test()
228 shift = decoded_data.three_axis.shift; in run_generic_test()
234 shift = decoded_data.three_axis.shift; in run_generic_test()
240 shift = decoded_data.q31.shift; in run_generic_test()
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/Zephyr-Core-3.5.0/subsys/bluetooth/mesh/
Drpl.c240 int shift = 0; in bt_mesh_rpl_reset() local
250 shift++; in bt_mesh_rpl_reset()
254 if (shift > 0) { in bt_mesh_rpl_reset()
255 replay_list[i - shift] = *rpl; in bt_mesh_rpl_reset()
263 (void)memset(&replay_list[last - shift + 1], 0, sizeof(struct bt_mesh_rpl) * shift); in bt_mesh_rpl_reset()
346 int shift = 0; in bt_mesh_rpl_pending_store() local
373 shift++; in bt_mesh_rpl_pending_store()
375 if (shift > 0) { in bt_mesh_rpl_pending_store()
376 replay_list[i - shift] = *rpl; in bt_mesh_rpl_pending_store()
379 store_rpl(&replay_list[i - shift]); in bt_mesh_rpl_pending_store()
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/Zephyr-Core-3.5.0/dts/arm64/ti/
Dti_am62x_a53.dtsi67 reg-shift = <2>;
78 reg-shift = <2>;
89 reg-shift = <2>;
100 reg-shift = <2>;
111 reg-shift = <2>;
122 reg-shift = <2>;
133 reg-shift = <2>;
/Zephyr-Core-3.5.0/samples/net/eth_native_posix/
Dnet_setup_host25 shift
26 shift;;
34 shift
35 shift;;
37 shift;;
/Zephyr-Core-3.5.0/samples/drivers/virtualization/ivshmem/doorbell/
Dwrite_shared_memory.sh46 shift
50 shift
57 shift
71 shift
/Zephyr-Core-3.5.0/tests/bsim/bluetooth/mesh/
D_mesh_test.sh27 shift 1
35 shift 1
47 shift 1
88 shift 1
103 shift 1
/Zephyr-Core-3.5.0/drivers/sensor/akm09918c/
Dakm09918c_emul.c137 q31_t value, int8_t shift) in akm09918c_emul_backend_set_channel() argument
165 int32_t microgauss = (shift < 0 ? ((int64_t)value >> -shift) : ((int64_t)value << shift)) * in akm09918c_emul_backend_set_channel()
181 q31_t *upper, q31_t *epsilon, int8_t *shift) in akm09918c_emul_backend_get_sample_range() argument
185 if (!lower || !upper || !epsilon || !shift) { in akm09918c_emul_backend_get_sample_range()
194 *shift = 6; in akm09918c_emul_backend_get_sample_range()
195 *upper = (int64_t)(49.12 * ((int64_t)INT32_MAX + 1)) >> *shift; in akm09918c_emul_backend_get_sample_range()
197 *epsilon = (int64_t)(0.0015 * ((int64_t)INT32_MAX + 1)) >> *shift; in akm09918c_emul_backend_get_sample_range()
/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/clock/
Dstm32l1_clock.h40 * - shift (0..31) [ 8 : 12 ]
45 * @param shift Position within RCC_CCIPRx.
49 #define STM32_CLOCK(val, mask, shift, reg) \ argument
51 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32f1_clock.h41 * - shift (0..31) [ 8 : 12 ]
46 * @param shift Position within RCC_CFGRx.
50 #define STM32_CLOCK(val, mask, shift, reg) \ argument
52 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32f4_clock.h53 * - shift (0..31) [ 8 : 12 ]
58 * @param shift Position within RCC_CFGRx.
62 #define STM32_CLOCK(val, mask, shift, reg) \ argument
64 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32f0_clock.h45 * - shift (0..31) [ 8 : 12 ]
50 * @param shift Position within RCC_CFGRx.
54 #define STM32_CLOCK(val, mask, shift, reg) \ argument
56 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32c0_clock.h44 * - shift (0..31) [ 8 : 12 ]
49 * @param shift Position within RCC_CCIPRx.
53 #define STM32_CLOCK(val, mask, shift, reg) \ argument
55 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32l0_clock.h45 * - shift (0..31) [ 8 : 12 ]
50 * @param shift Position within RCC_CCIPRx.
54 #define STM32_CLOCK(val, mask, shift, reg) \ argument
56 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
/Zephyr-Core-3.5.0/tests/lib/cmsis_dsp/fastmath/src/
Dq15.c123 uint16_t *shift; in ZTEST() local
129 shift = malloc(length * sizeof(uint16_t)); in ZTEST()
130 zassert_not_null(shift, ASSERT_MSG_BUFFER_ALLOC_FAILED); in ZTEST()
136 &output[index], &shift[index]); in ZTEST()
150 memcmp(shift, ref_divide_shift, in ZTEST()
156 free(shift); in ZTEST()
/Zephyr-Core-3.5.0/drivers/watchdog/
Dwdt_fwdgt_gd32.c57 uint8_t shift = 0U; in gd32_fwdgt_calc_timeout() local
62 shift++; in gd32_fwdgt_calc_timeout()
63 divider = 4U << shift; in gd32_fwdgt_calc_timeout()
66 if (!IS_VALID_FWDGT_PRESCALER(PSC_PSC(shift)) || timeout == 0U) { in gd32_fwdgt_calc_timeout()
70 /* convert the 'shift' to prescaler value */ in gd32_fwdgt_calc_timeout()
71 *prescaler = PSC_PSC(shift); in gd32_fwdgt_calc_timeout()
Dwdt_wwdgt_gd32.c83 for (uint32_t shift = 0U; shift <= WWDGT_PRESCALER_EXP_MAX; shift++) { in gd32_wwdgt_calc_window() local
84 uint32_t max_count = gd32_wwdgt_calc_ticks(dev, win->max, shift); in gd32_wwdgt_calc_window()
88 *prescaler = CFG_PSC(shift); in gd32_wwdgt_calc_window()
92 *wval = gd32_wwdgt_calc_ticks(dev, win->min, shift); in gd32_wwdgt_calc_window()
/Zephyr-Core-3.5.0/dts/bindings/serial/
Dns16550.yaml8 reg-shift:
11 description: quantity to shift the register offsets by
/Zephyr-Core-3.5.0/drivers/sensor/f75303/
Df75303_emul.c107 q31_t value, int8_t shift) in f75303_emul_set_channel() argument
132 scaled_value = (int64_t)value << shift; in f75303_emul_set_channel()
143 q31_t *lower, q31_t *upper, q31_t *epsilon, int8_t *shift) in f75303_emul_get_sample_range() argument
151 *shift = 8; in f75303_emul_get_sample_range()
153 *upper = (int64_t)(255.875 * ((int64_t)INT32_MAX + 1)) >> *shift; in f75303_emul_get_sample_range()
154 *epsilon = (int64_t)(0.125 * ((int64_t)INT32_MAX + 1)) >> *shift; in f75303_emul_get_sample_range()
/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/adc/
Dstm32_adc.h26 * - shift (0..31) [ 8 : 12 ]
32 * @param shift Position within ADC_x.
37 #define STM32_ADC(real_val, reg_val, mask, shift, reg) \ argument
39 (((shift) & STM32_ADC_SHIFT_MASK) << STM32_ADC_SHIFT_SHIFT) | \
/Zephyr-Core-3.5.0/doc/hardware/peripherals/
Dsensor.rst40 in the range of (-1.0, 1.0) and require a shift operation in order to scale
146 int8_t shift[3];
153 /* First, we need to know by how much to shift the values */
154 lid_accel_decoder->get_shift(buf, channels[0], &shift[0]);
155 lid_accel_decoder->get_shift(buf, channels[1], &shift[1]);
156 lid_accel_decoder->get_shift(buf, channels[2], &shift[2]);
158 /* Shift the values to get the SI units */
160 (int64_t)values[0] << shift[0],
161 (int64_t)values[1] << shift[1],
162 (int64_t)values[2] << shift[2],

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