share (full) in projects: hal_espressif-3.5.0

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/hal_espressif-3.5.0/components/esp_hw_support/port/esp32/
D	spiram_psram.h	`42 …PSRAM_VADDR_MODE_LOWHIGH, ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app… 43 …PSRAM_VADDR_MODE_EVENODD, ///< App and pro CPU share external RAM caches: pro CPU does even 32yte…`
/hal_espressif-3.5.0/components/esp_hw_support/port/esp32s2/
D	spiram_psram.h	`38 …PSRAM_VADDR_MODE_LOWHIGH, ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app… 39 …PSRAM_VADDR_MODE_EVENODD, ///< App and pro CPU share external RAM caches: pro CPU does even 32yte…`
/hal_espressif-3.5.0/components/esp_hw_support/port/esp32s3/
D	spiram_psram.h	`38 …PSRAM_VADDR_MODE_LOWHIGH, ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app… 39 …PSRAM_VADDR_MODE_EVENODD, ///< App and pro CPU share external RAM caches: pro CPU does even 32yte…`
D	esp_crypto_lock.c	`21 * SHA and AES share a reserved GDMA channel.`
/hal_espressif-3.5.0/components/driver/include/driver/
D	pcnt.h	`173 * Each Pulse counter unit has five watch point events that share the same interrupt. 202 …* All enabled events share the same interrupt (one interrupt per pulse counter uni… 215 …* All enabled events share the same interrupt (one interrupt per pulse counter uni… 228 …* All enabled events share the same interrupt (one interrupt per pulse counter uni… 244 …* All enabled events share the same interrupt (one interrupt per pulse counter uni…`
/hal_espressif-3.5.0/components/bt/common/api/include/api/
D	esp_blufi_api.h	`312 * @brief BLUFI encrypt the data after negotiate a share key 321 * @brief BLUFI decrypt the data after negotiate a share key 342 …andler_t negotiate_data_handler; /!< BLUFI negotiate data function for negotiate share key / 343 … encrypt_func; /!< BLUFI encrypt data function with share key generated by n… 344 … decrypt_func; /!< BLUFI decrypt data function with share key generated by n…`
/hal_espressif-3.5.0/components/spi_flash/
D	spi_flash_timing_tuning.c	102 … //Set SPI1 core clock. SPI0 and SPI1 share the register for core clock. So we only set SPI0 here. in init_spi1_for_tuning() 390 …spi_timing_config_flash_set_din_mode_num(0, 0, 0); //SPI0 and SPI1 share the registers for flash … in clear_timing_tuning_regs() 405 …* Because SPI0 and SPI1 share the din_num and din_mode regs, so if we clear SPI1 din_num and din_m… in spi_timing_enter_mspi_low_speed_mode() 412 …spi_timing_config_set_core_clock(0, SPI_TIMING_CONFIG_CORE_CLOCK_80M); //SPI0 and SPI1 share the … in spi_timing_enter_mspi_low_speed_mode() 427 … //SPI0 and SPI1 share the registers for flash din mode and num setting, so we only set SPI0's reg in set_timing_tuning_regs_as_required() 453 …spi_timing_config_set_core_clock(0, core_clock); //SPI0 and SPI1 share the register for core clock… in spi_timing_enter_mspi_high_speed_mode()
/hal_espressif-3.5.0/docs/en/api-reference/system/
D	intr_alloc.rst	23 Because there are more interrupt sources than interrupts, sometimes it makes sense to share an inte… 40 For example, let's say DevA and DevB share an interrupt. DevB signals an interrupt, so INT line goe… 88 …- Multiple external interrupt sources can share an interrupt slot by passing ``ESP_INTR_FLAG_SHARE…
/hal_espressif-3.5.0/docs/en/api-reference/protocols/
D	esp_crt_bundle.rst	`16 …ificates to around 35 while still having around 90 % coverage according to market share statistics. 57 The common certificates bundle were made by selecting the authorities with a market share of more t…`
/hal_espressif-3.5.0/components/spi_flash/esp32s3/
D	spi_timing_config.c	327 * SPI0 and SPI1 share the SPI_MEM_DINx_MODE(0), SPI_MEM_DINx_NUM(0) for FLASH timing tuning in spi_timing_config_flash_tune_din_num_mode() 342 …* SPI0 and SPI1 share the SPI_MEM_SPI_SMEM_DINx_MODE(0), SPI_MEM_SPI_SMEM_DINx_NUM(0) for PSRAM… in spi_timing_config_psram_tune_din_num_mode() 351 //On 728, for SPI1, flash and psram share the extra dummy register in spi_timing_config_psram_tune_dummy() 379 …* @note On ESP32-S3, SPI0/1 share the Flash CS timing registers. Therefore, we should not change t…
/hal_espressif-3.5.0/components/esp_common/
D	common.lf	`29 .share.mem`
/hal_espressif-3.5.0/components/driver/esp32c3/
D	adc2_init_cal.c	`16 …* @brief Set initial code to ADC2 after calibration. ADC2 RTC and ADC2 PWDET controller share the …`
/hal_espressif-3.5.0/components/driver/esp32s2/
D	adc2_init_cal.c	`16 …* @brief Set initial code to ADC2 after calibration. ADC2 RTC and ADC2 PWDET controller share the …`
/hal_espressif-3.5.0/components/heap/include/
D	esp_heap_caps.h	`222 …* Calls multi_heap_info() on all heaps which share the given capabilities. The information return… 238 * Calls multi_heap_info on all heaps which share the given capabilities, and 264 * Calls multi_heap_check on all heaps which share the given capabilities. Optionally`
/hal_espressif-3.5.0/docs/en/api-guides/
D	flash_psram_config.rst	`22 …On {IDF_TARGET_NAME}, MSPI stands for the SPI0/1. SPI0 and SPI1 share a common SPI bus. The main F… 57 - Flash and PSRAM share the same internal clock.`
/hal_espressif-3.5.0/components/bootloader_support/src/
D	bootloader_flash_config_esp32s3.c	`36 …//SPI0/1 share the cs_hold / cs_setup, cd_hold_time / cd_setup_time, cs_hold_delay registers for F… in bootloader_flash_cs_timing_config()`
/hal_espressif-3.5.0/components/hal/esp32s3/include/hal/
D	i2s_ll.h	`193 * TX and RX share the same clock setting 205 * TX and RX share the same clock setting 834 * MONO in software means two channel share same data 863 * @param ena Set true to share BCK and WS signal for tx module and rx module.`
/hal_espressif-3.5.0/components/heap/
D	heap_private.h	`28 for heap_caps_init.c to share heap information with heap_caps.c`
/hal_espressif-3.5.0/examples/peripherals/sdio/slave/main/
D	app_main.c	`251 … * But here we wants to show how to share large buffers between drivers here (we share the buffer in app_main()`
/hal_espressif-3.5.0/examples/protocols/modbus/tcp/
D	README.md	`32 …itions of parameter structures for master and slave device (both projects share the same parameter…`
/hal_espressif-3.5.0/components/bootloader_support/
D	component.mk	`4 # share "include_bootloader" headers with bootloader main component`
/hal_espressif-3.5.0/examples/storage/semihost_vfs/
D	README.md	`24 bin/openocd -s share/openocd/scripts -c 'set ESP_SEMIHOST_BASEDIR '$IDF_PATH/examples/storage/semih…`
/hal_espressif-3.5.0/tools/
D	zephyr_tools.json	`12 "OPENOCD_SCRIPTS": "${TOOL_PATH}/openocd-esp32/share/openocd/scripts"`
/hal_espressif-3.5.0/components/spi_flash/esp32/
D	flash_ops_esp32.c	`49 that share a key (as derived from flash address). in spi_flash_write_encrypted_chip()`
/hal_espressif-3.5.0/components/bt/common/osi/include/osi/
D	buffer.h	`49 // and slices that share overlapping bytes will also be written to when`

12 3 4 5 6

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0